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Updated F7 mcuconf.h files to enable CRY driver. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12784 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2019-05-11 08:04:43 +00:00
parent 5714d98aac
commit f3919b8e45
21 changed files with 109 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
demos/STM32/NASA-OSAL-STM32F746G-DISCOVERY/cfg/mcuconf.h
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@ -148,9 +148,14 @@
#define STM32_CRY_USE_HASH1 FALSE #define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9 #define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9 #define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
#define STM32_CRY_HASH1_DMA_PRIORITY 0 #define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024 #define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure") #define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/* /*

5
demos/STM32/NIL-STM32F746G-DISCOVERY/cfg/mcuconf.h
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@ -148,9 +148,14 @@
#define STM32_CRY_USE_HASH1 FALSE #define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9 #define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9 #define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
#define STM32_CRY_HASH1_DMA_PRIORITY 0 #define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024 #define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure") #define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/* /*

5
demos/STM32/RT-STM32-LWIP-FATFS-USB-HTTPS/cfg/stm32f746_discovery/mcuconf.h
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@ -148,9 +148,14 @@
#define STM32_CRY_USE_HASH1 FALSE #define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9 #define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9 #define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
#define STM32_CRY_HASH1_DMA_PRIORITY 0 #define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024 #define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure") #define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/* /*

5
demos/STM32/RT-STM32-LWIP-FATFS-USB/cfg/stm32f746_discovery/mcuconf.h
View File

@ -148,9 +148,14 @@
#define STM32_CRY_USE_HASH1 FALSE #define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9 #define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9 #define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
#define STM32_CRY_HASH1_DMA_PRIORITY 0 #define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024 #define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure") #define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/* /*

5
demos/STM32/RT-STM32F746G-DISCOVERY/cfg/mcuconf.h
View File

@ -148,9 +148,14 @@
#define STM32_CRY_USE_HASH1 FALSE #define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9 #define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9 #define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
#define STM32_CRY_HASH1_DMA_PRIORITY 0 #define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024 #define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure") #define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/* /*

5
demos/STM32/RT-STM32F746ZG-NUCLEO144/cfg/mcuconf.h
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@ -148,9 +148,14 @@
#define STM32_CRY_USE_HASH1 FALSE #define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9 #define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9 #define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
#define STM32_CRY_HASH1_DMA_PRIORITY 0 #define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024 #define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure") #define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/* /*

5
demos/STM32/RT-STM32F756ZG-NUCLEO144/cfg/mcuconf.h
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@ -148,9 +148,14 @@
#define STM32_CRY_USE_HASH1 FALSE #define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9 #define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9 #define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
#define STM32_CRY_HASH1_DMA_PRIORITY 0 #define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024 #define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure") #define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/* /*

8
os/hal/ports/STM32/LLD/CRYPv1/hal_crypto_lld.c
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@ -174,9 +174,9 @@ static void cry_lld_serve_cryp_in_interrupt(CRYDriver *cryp, uint32_t flags) {
(void)cryp; (void)cryp;
/* DMA errors handling.*/ /* DMA errors handling.*/
#if defined(STM32_CRY_CRYP_IN_DMA_ERROR_HOOK) #if defined(STM32_CRY_CRYP_DMA_ERROR_HOOK)
if ((flags & (STM32_DMA_ISR_TEIF | STM32_DMA_ISR_DMEIF)) != 0U) { if ((flags & (STM32_DMA_ISR_TEIF | STM32_DMA_ISR_DMEIF)) != 0U) {
STM32_CRY_CRYP_IN_DMA_ERROR_HOOK(cryp); STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp);
} }
#endif #endif
} }
@ -190,9 +190,9 @@ static void cry_lld_serve_cryp_in_interrupt(CRYDriver *cryp, uint32_t flags) {
static void cry_lld_serve_cryp_out_interrupt(CRYDriver *cryp, uint32_t flags) { static void cry_lld_serve_cryp_out_interrupt(CRYDriver *cryp, uint32_t flags) {
/* DMA errors handling.*/ /* DMA errors handling.*/
#if defined(STM32_CRY_CRYP_OUT_DMA_ERROR_HOOK) #if defined(STM32_CRY_CRYP_DMA_ERROR_HOOK)
if ((flags & (STM32_DMA_ISR_TEIF | STM32_DMA_ISR_DMEIF)) != 0U) { if ((flags & (STM32_DMA_ISR_TEIF | STM32_DMA_ISR_DMEIF)) != 0U) {
STM32_CRY_CRYP_OUT_DMA_ERROR_HOOK(cryp); STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp);
} }
#endif #endif

15
os/hal/ports/STM32/LLD/CRYPv1/hal_crypto_lld.h
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@ -104,21 +104,12 @@
#endif #endif
/** /**
* @brief CRYP-IN DMA error hook. * @brief CRYP DMA error hook.
* @note The default action for DMA errors is a system halt because DMA * @note The default action for DMA errors is a system halt because DMA
* error can only happen because programming errors. * error can only happen because programming errors.
*/ */
#if !defined(STM32_CRY_CRYP_IN_DMA_ERROR_HOOK) || defined(__DOXYGEN__) #if !defined(STM32_CRY_CRYP_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
#define STM32_CRY_CRYP_IN_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure") #define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
#endif
/**
* @brief CRYP-OUT DMA error hook.
* @note The default action for DMA errors is a system halt because DMA
* error can only happen because programming errors.
*/
#if !defined(STM32_CRY_CRYP_OUT_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
#define STM32_CRY_CRYP_OUT_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
#endif #endif
/** @} */ /** @} */

5
testhal/STM32/STM32F7xx/GPT-ADC/mcuconf.h
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@ -148,9 +148,14 @@
#define STM32_CRY_USE_HASH1 FALSE #define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9 #define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9 #define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
#define STM32_CRY_HASH1_DMA_PRIORITY 0 #define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024 #define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure") #define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/* /*

5
testhal/STM32/STM32F7xx/IRQ_STORM/mcuconf.h
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@ -148,9 +148,14 @@
#define STM32_CRY_USE_HASH1 FALSE #define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9 #define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9 #define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
#define STM32_CRY_HASH1_DMA_PRIORITY 0 #define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024 #define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure") #define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/* /*

5
testhal/STM32/STM32F7xx/PWM-ICU/mcuconf.h
View File

@ -148,9 +148,14 @@
#define STM32_CRY_USE_HASH1 FALSE #define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9 #define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9 #define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
#define STM32_CRY_HASH1_DMA_PRIORITY 0 #define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024 #define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure") #define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/* /*

5
testhal/STM32/STM32F7xx/SPI/mcuconf.h
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@ -148,9 +148,14 @@
#define STM32_CRY_USE_HASH1 FALSE #define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9 #define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9 #define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
#define STM32_CRY_HASH1_DMA_PRIORITY 0 #define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024 #define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure") #define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/* /*

5
testhal/STM32/STM32F7xx/USB_RAW/mcuconf.h
View File

@ -148,9 +148,14 @@
#define STM32_CRY_USE_HASH1 FALSE #define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9 #define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9 #define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
#define STM32_CRY_HASH1_DMA_PRIORITY 0 #define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024 #define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure") #define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/* /*

7
testhal/STM32/multi/CRYPTO/cfg/stm32f756zg_nucleo144/mcuconf.h
View File

@ -144,13 +144,18 @@
/* /*
* CRY driver system settings. * CRY driver system settings.
*/ */
#define STM32_CRY_USE_CRYP1 FALSE #define STM32_CRY_USE_CRYP1 TRUE
#define STM32_CRY_USE_HASH1 TRUE #define STM32_CRY_USE_HASH1 TRUE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9 #define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9 #define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
#define STM32_CRY_HASH1_DMA_PRIORITY 0 #define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024 #define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure") #define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/* /*

11
testhal/STM32/multi/CRYPTO/main.c
View File

@ -66,6 +66,11 @@ int main(void) {
/* Normal main() thread activity, in this demo it does nothing.*/ /* Normal main() thread activity, in this demo it does nothing.*/
while (true) { while (true) {
uint8_t digest[32]; uint8_t digest[32];
static uint8_t key[16] = {00, 00, 00, 00, 00, 00, 00, 00,
00, 00, 00, 00, 00, 00, 00, 00};
static uint8_t data[16] = {00, 00, 00, 00, 00, 00, 00, 00,
00, 00, 00, 00, 00, 00, 00, 00};
uint8_t out[16];
if (palReadLine(PORTAB_LINE_BUTTON) == PORTAB_BUTTON_PRESSED) { if (palReadLine(PORTAB_LINE_BUTTON) == PORTAB_BUTTON_PRESSED) {
SHA256Context ctx256; SHA256Context ctx256;
@ -81,6 +86,12 @@ int main(void) {
crySHA256Init(&CRYD1, &ctx256); crySHA256Init(&CRYD1, &ctx256);
crySHA256Update(&CRYD1, &ctx256, 56U, (const uint8_t *)"abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq"); crySHA256Update(&CRYD1, &ctx256, 56U, (const uint8_t *)"abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq");
crySHA256Final(&CRYD1, &ctx256, digest); crySHA256Final(&CRYD1, &ctx256, digest);
cryLoadAESTransientKey(&CRYD1, sizeof (key), key);
cryEncryptAES(&CRYD1, (crykey_t)0, data, out);
cryDecryptAES(&CRYD1, (crykey_t)0, data, out);
cryEncryptAES_ECB(&CRYD1, (crykey_t)0, 16U, data, out);
cryDecryptAES_ECB(&CRYD1, (crykey_t)0, 16U, data, out);
} }
chThdSleepMilliseconds(500); chThdSleepMilliseconds(500);
} }

5
testhal/STM32/multi/PAL/cfg/stm32f746_discovery/mcuconf.h
View File

@ -148,9 +148,14 @@
#define STM32_CRY_USE_HASH1 FALSE #define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9 #define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9 #define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
#define STM32_CRY_HASH1_DMA_PRIORITY 0 #define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024 #define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure") #define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/* /*

5
testhal/STM32/multi/RTC/cfg/stm32f746_discovery/mcuconf.h
View File

@ -148,9 +148,14 @@
#define STM32_CRY_USE_HASH1 FALSE #define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9 #define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9 #define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
#define STM32_CRY_HASH1_DMA_PRIORITY 0 #define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024 #define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure") #define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/* /*

5
testhal/STM32/multi/UART/cfg/stm32f746_discovery/mcuconf.h
View File

@ -148,9 +148,14 @@
#define STM32_CRY_USE_HASH1 FALSE #define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9 #define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9 #define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
#define STM32_CRY_HASH1_DMA_PRIORITY 0 #define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024 #define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure") #define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/* /*

5
testhal/STM32/multi/USB_CDC/cfg/stm32f746_discovery/mcuconf.h
View File

@ -148,9 +148,14 @@
#define STM32_CRY_USE_HASH1 FALSE #define STM32_CRY_USE_HASH1 FALSE
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9 #define STM32_CRY_CRYP1_IRQ_PRIORITY 9
#define STM32_CRY_HASH1_IRQ_PRIORITY 9 #define STM32_CRY_HASH1_IRQ_PRIORITY 9
#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
#define STM32_CRY_HASH1_DMA_PRIORITY 0 #define STM32_CRY_HASH1_DMA_PRIORITY 0
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024 #define STM32_CRY_HASH_SIZE_THRESHOLD 1024
#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure") #define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
/* /*

5
tools/ftl/processors/conf/mcuconf_stm32f746xx/mcuconf.h.ftl
View File

@ -159,9 +159,14 @@
#define STM32_CRY_USE_HASH1 ${doc.STM32_CRY_USE_HASH1!"FALSE"} #define STM32_CRY_USE_HASH1 ${doc.STM32_CRY_USE_HASH1!"FALSE"}
#define STM32_CRY_CRYP1_IRQ_PRIORITY ${doc.STM32_CRY_CRYP1_IRQ_PRIORITY!"9"} #define STM32_CRY_CRYP1_IRQ_PRIORITY ${doc.STM32_CRY_CRYP1_IRQ_PRIORITY!"9"}
#define STM32_CRY_HASH1_IRQ_PRIORITY ${doc.STM32_CRY_HASH1_IRQ_PRIORITY!"9"} #define STM32_CRY_HASH1_IRQ_PRIORITY ${doc.STM32_CRY_HASH1_IRQ_PRIORITY!"9"}
#define STM32_CRY_CRYP1_IN_DMA_STREAM ${doc.STM32_CRY_CRYP1_IN_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 6)"}
#define STM32_CRY_CRYP1_OUT_DMA_STREAM ${doc.STM32_CRY_CRYP1_OUT_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 5)"}
#define STM32_CRY_HASH1_DMA_STREAM ${doc.STM32_CRY_HASH1_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 7)"} #define STM32_CRY_HASH1_DMA_STREAM ${doc.STM32_CRY_HASH1_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 7)"}
#define STM32_CRY_CRYP1_IN_DMA_PRIORITY ${doc.STM32_CRY_CRYP1_IN_DMA_PRIORITY!"0"}
#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY ${doc.STM32_CRY_CRYP1_OUT_DMA_PRIORITY!"1"}
#define STM32_CRY_HASH1_DMA_PRIORITY ${doc.STM32_CRY_HASH1_DMA_PRIORITY!"0"} #define STM32_CRY_HASH1_DMA_PRIORITY ${doc.STM32_CRY_HASH1_DMA_PRIORITY!"0"}
#define STM32_CRY_HASH_SIZE_THRESHOLD ${doc.STM32_CRY_HASH_SIZE_THRESHOLD!"1024"} #define STM32_CRY_HASH_SIZE_THRESHOLD ${doc.STM32_CRY_HASH_SIZE_THRESHOLD!"1024"}
#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) ${doc.STM32_CRY_CRYP_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) ${doc.STM32_CRY_HASH_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"} #define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) ${doc.STM32_CRY_HASH_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
/* /*