Updated F7 mcuconf.h files to enable CRY driver.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12784 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
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@ -148,9 +148,14 @@
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#define STM32_CRY_USE_HASH1 FALSE
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#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
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#define STM32_CRY_HASH1_IRQ_PRIORITY 9
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#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
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#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
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#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
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#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
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#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
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#define STM32_CRY_HASH1_DMA_PRIORITY 0
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#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
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#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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/*
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@ -148,9 +148,14 @@
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#define STM32_CRY_USE_HASH1 FALSE
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#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
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#define STM32_CRY_HASH1_IRQ_PRIORITY 9
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#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
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#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
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#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
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#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
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#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
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#define STM32_CRY_HASH1_DMA_PRIORITY 0
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#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
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#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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/*
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@ -148,9 +148,14 @@
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#define STM32_CRY_USE_HASH1 FALSE
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#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
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#define STM32_CRY_HASH1_IRQ_PRIORITY 9
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#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
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#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
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#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
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#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
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#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
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#define STM32_CRY_HASH1_DMA_PRIORITY 0
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#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
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#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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/*
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@ -148,9 +148,14 @@
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#define STM32_CRY_USE_HASH1 FALSE
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#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
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#define STM32_CRY_HASH1_IRQ_PRIORITY 9
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#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
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#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
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#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
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#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
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#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
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#define STM32_CRY_HASH1_DMA_PRIORITY 0
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#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
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#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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/*
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@ -148,9 +148,14 @@
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#define STM32_CRY_USE_HASH1 FALSE
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#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
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#define STM32_CRY_HASH1_IRQ_PRIORITY 9
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#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
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#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
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#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
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#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
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#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
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#define STM32_CRY_HASH1_DMA_PRIORITY 0
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#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
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#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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/*
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@ -148,9 +148,14 @@
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#define STM32_CRY_USE_HASH1 FALSE
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#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
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#define STM32_CRY_HASH1_IRQ_PRIORITY 9
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#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
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#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
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#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
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#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
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#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
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#define STM32_CRY_HASH1_DMA_PRIORITY 0
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#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
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#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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/*
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@ -148,9 +148,14 @@
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#define STM32_CRY_USE_HASH1 FALSE
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#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
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#define STM32_CRY_HASH1_IRQ_PRIORITY 9
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#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
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#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
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#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
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#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
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#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
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#define STM32_CRY_HASH1_DMA_PRIORITY 0
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#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
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#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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/*
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@ -174,9 +174,9 @@ static void cry_lld_serve_cryp_in_interrupt(CRYDriver *cryp, uint32_t flags) {
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(void)cryp;
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/* DMA errors handling.*/
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#if defined(STM32_CRY_CRYP_IN_DMA_ERROR_HOOK)
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#if defined(STM32_CRY_CRYP_DMA_ERROR_HOOK)
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if ((flags & (STM32_DMA_ISR_TEIF | STM32_DMA_ISR_DMEIF)) != 0U) {
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STM32_CRY_CRYP_IN_DMA_ERROR_HOOK(cryp);
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STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp);
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}
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#endif
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}
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@ -190,9 +190,9 @@ static void cry_lld_serve_cryp_in_interrupt(CRYDriver *cryp, uint32_t flags) {
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static void cry_lld_serve_cryp_out_interrupt(CRYDriver *cryp, uint32_t flags) {
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/* DMA errors handling.*/
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#if defined(STM32_CRY_CRYP_OUT_DMA_ERROR_HOOK)
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#if defined(STM32_CRY_CRYP_DMA_ERROR_HOOK)
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if ((flags & (STM32_DMA_ISR_TEIF | STM32_DMA_ISR_DMEIF)) != 0U) {
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STM32_CRY_CRYP_OUT_DMA_ERROR_HOOK(cryp);
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STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp);
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}
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#endif
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@ -104,21 +104,12 @@
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#endif
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/**
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* @brief CRYP-IN DMA error hook.
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* @brief CRYP DMA error hook.
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* @note The default action for DMA errors is a system halt because DMA
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* error can only happen because programming errors.
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*/
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#if !defined(STM32_CRY_CRYP_IN_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
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#define STM32_CRY_CRYP_IN_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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#endif
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/**
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* @brief CRYP-OUT DMA error hook.
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* @note The default action for DMA errors is a system halt because DMA
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* error can only happen because programming errors.
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*/
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#if !defined(STM32_CRY_CRYP_OUT_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
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#define STM32_CRY_CRYP_OUT_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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#if !defined(STM32_CRY_CRYP_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
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#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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#endif
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/** @} */
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#define STM32_CRY_USE_HASH1 FALSE
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#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
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#define STM32_CRY_HASH1_IRQ_PRIORITY 9
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#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
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#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
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#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
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#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
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#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
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#define STM32_CRY_HASH1_DMA_PRIORITY 0
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#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
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#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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/*
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#define STM32_CRY_USE_HASH1 FALSE
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#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
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#define STM32_CRY_HASH1_IRQ_PRIORITY 9
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#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
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#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
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#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
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#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
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#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
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#define STM32_CRY_HASH1_DMA_PRIORITY 0
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#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
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#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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/*
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#define STM32_CRY_USE_HASH1 FALSE
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#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
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#define STM32_CRY_HASH1_IRQ_PRIORITY 9
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#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
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#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
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#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
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#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
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#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
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#define STM32_CRY_HASH1_DMA_PRIORITY 0
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#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
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#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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/*
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#define STM32_CRY_USE_HASH1 FALSE
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#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
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#define STM32_CRY_HASH1_IRQ_PRIORITY 9
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#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
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#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
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#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
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#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
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#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
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#define STM32_CRY_HASH1_DMA_PRIORITY 0
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#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
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#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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/*
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#define STM32_CRY_USE_HASH1 FALSE
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#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
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#define STM32_CRY_HASH1_IRQ_PRIORITY 9
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#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
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#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
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#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
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#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
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#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
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#define STM32_CRY_HASH1_DMA_PRIORITY 0
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#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
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#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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/*
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/*
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* CRY driver system settings.
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*/
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#define STM32_CRY_USE_CRYP1 FALSE
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#define STM32_CRY_USE_CRYP1 TRUE
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#define STM32_CRY_USE_HASH1 TRUE
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#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
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#define STM32_CRY_HASH1_IRQ_PRIORITY 9
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#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
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#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
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#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
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#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
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#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
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#define STM32_CRY_HASH1_DMA_PRIORITY 0
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#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
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#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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/*
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/* Normal main() thread activity, in this demo it does nothing.*/
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while (true) {
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uint8_t digest[32];
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static uint8_t key[16] = {00, 00, 00, 00, 00, 00, 00, 00,
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00, 00, 00, 00, 00, 00, 00, 00};
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static uint8_t data[16] = {00, 00, 00, 00, 00, 00, 00, 00,
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00, 00, 00, 00, 00, 00, 00, 00};
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uint8_t out[16];
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if (palReadLine(PORTAB_LINE_BUTTON) == PORTAB_BUTTON_PRESSED) {
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SHA256Context ctx256;
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crySHA256Init(&CRYD1, &ctx256);
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crySHA256Update(&CRYD1, &ctx256, 56U, (const uint8_t *)"abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq");
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crySHA256Final(&CRYD1, &ctx256, digest);
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cryLoadAESTransientKey(&CRYD1, sizeof (key), key);
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cryEncryptAES(&CRYD1, (crykey_t)0, data, out);
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cryDecryptAES(&CRYD1, (crykey_t)0, data, out);
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cryEncryptAES_ECB(&CRYD1, (crykey_t)0, 16U, data, out);
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cryDecryptAES_ECB(&CRYD1, (crykey_t)0, 16U, data, out);
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}
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chThdSleepMilliseconds(500);
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}
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#define STM32_CRY_USE_HASH1 FALSE
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#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
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#define STM32_CRY_HASH1_IRQ_PRIORITY 9
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#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
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#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
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#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
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#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
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#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
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#define STM32_CRY_HASH1_DMA_PRIORITY 0
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#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
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#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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/*
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#define STM32_CRY_USE_HASH1 FALSE
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#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
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#define STM32_CRY_HASH1_IRQ_PRIORITY 9
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#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
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#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
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#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
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#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
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#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
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#define STM32_CRY_HASH1_DMA_PRIORITY 0
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||||
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
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||||
#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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||||
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
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||||
|
||||
/*
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||||
|
|
|
@ -148,9 +148,14 @@
|
|||
#define STM32_CRY_USE_HASH1 FALSE
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||||
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
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||||
#define STM32_CRY_HASH1_IRQ_PRIORITY 9
|
||||
#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
|
||||
#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
|
||||
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
|
||||
#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
|
||||
#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
|
||||
#define STM32_CRY_HASH1_DMA_PRIORITY 0
|
||||
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
|
||||
#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
|
||||
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
|
|
|
@ -148,9 +148,14 @@
|
|||
#define STM32_CRY_USE_HASH1 FALSE
|
||||
#define STM32_CRY_CRYP1_IRQ_PRIORITY 9
|
||||
#define STM32_CRY_HASH1_IRQ_PRIORITY 9
|
||||
#define STM32_CRY_CRYP1_IN_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
|
||||
#define STM32_CRY_CRYP1_OUT_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
|
||||
#define STM32_CRY_HASH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
|
||||
#define STM32_CRY_CRYP1_IN_DMA_PRIORITY 0
|
||||
#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY 1
|
||||
#define STM32_CRY_HASH1_DMA_PRIORITY 0
|
||||
#define STM32_CRY_HASH_SIZE_THRESHOLD 1024
|
||||
#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
|
||||
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
|
|
|
@ -159,9 +159,14 @@
|
|||
#define STM32_CRY_USE_HASH1 ${doc.STM32_CRY_USE_HASH1!"FALSE"}
|
||||
#define STM32_CRY_CRYP1_IRQ_PRIORITY ${doc.STM32_CRY_CRYP1_IRQ_PRIORITY!"9"}
|
||||
#define STM32_CRY_HASH1_IRQ_PRIORITY ${doc.STM32_CRY_HASH1_IRQ_PRIORITY!"9"}
|
||||
#define STM32_CRY_CRYP1_IN_DMA_STREAM ${doc.STM32_CRY_CRYP1_IN_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 6)"}
|
||||
#define STM32_CRY_CRYP1_OUT_DMA_STREAM ${doc.STM32_CRY_CRYP1_OUT_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 5)"}
|
||||
#define STM32_CRY_HASH1_DMA_STREAM ${doc.STM32_CRY_HASH1_DMA_STREAM!"STM32_DMA_STREAM_ID(2, 7)"}
|
||||
#define STM32_CRY_CRYP1_IN_DMA_PRIORITY ${doc.STM32_CRY_CRYP1_IN_DMA_PRIORITY!"0"}
|
||||
#define STM32_CRY_CRYP1_OUT_DMA_PRIORITY ${doc.STM32_CRY_CRYP1_OUT_DMA_PRIORITY!"1"}
|
||||
#define STM32_CRY_HASH1_DMA_PRIORITY ${doc.STM32_CRY_HASH1_DMA_PRIORITY!"0"}
|
||||
#define STM32_CRY_HASH_SIZE_THRESHOLD ${doc.STM32_CRY_HASH_SIZE_THRESHOLD!"1024"}
|
||||
#define STM32_CRY_CRYP_DMA_ERROR_HOOK(cryp) ${doc.STM32_CRY_CRYP_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
|
||||
#define STM32_CRY_HASH_DMA_ERROR_HOOK(cryp) ${doc.STM32_CRY_HASH_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
|
||||
|
||||
/*
|
||||
|
|
Loading…
Reference in New Issue