I2C. Async transmit done. Need much of testing.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@2697 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -61,12 +61,10 @@ typedef enum {
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I2C_UNINIT = 0, /**< Not initialized. */
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I2C_STOP = 1, /**< Stopped. */
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I2C_READY = 2, /**< Ready. */
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I2C_MACTIVE = 3, /**< START condition sent. */
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I2C_MTXREADY = 4, /**< address sent when tx-flag set. */
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I2C_MTRANSMIT = 5, /**< Master transmitting. */
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I2C_MRECEIVE = 6, /**< Master receiving. */
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I2C_MTRANSMIT = 4, /**< Master transmitting. */
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I2C_MRECEIVE = 5, /**< Master receiving. */
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I2C_MWAIT_TF = 6, /**< Master wait Transmission Finished */
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I2C_MERROR = 7 /**< Error condition. */
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} i2cstate_t;
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@ -123,14 +121,14 @@ extern "C" {
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void i2cObjectInit(I2CDriver *i2cp);
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void i2cStart(I2CDriver *i2cp, I2CConfig *config);
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void i2cStop(I2CDriver *i2cp);
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void i2cMasterTransmit(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg, bool_t restart);
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void i2cMasterTransmit(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg);
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void i2cMasterReceive(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg);
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void i2cMasterStartI(I2CDriver *i2cp,uint16_t header,i2ccallback_t callback);
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void i2cMasterStopI(I2CDriver *i2cp, i2ccallback_t callback);
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void i2cMasterRestartI(I2CDriver *i2cp, i2ccallback_t callback);
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void i2cMasterTransmitI(I2CDriver *i2cp, size_t n, const uint8_t *txbuf, i2ccallback_t callback);
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void i2cMasterReceiveI(I2CDriver *i2cp, size_t n, uint8_t *rxbuf, i2ccallback_t callback);
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void i2cMasterStartI(I2CDriver *i2cp,uint16_t header);
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void i2cMasterStopI(I2CDriver *i2cp);
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void i2cMasterRestartI(I2CDriver *i2cp);
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void i2cMasterTransmitI(I2CDriver *i2cp, size_t n, const uint8_t *txbuf);
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void i2cMasterReceiveI(I2CDriver *i2cp, size_t n, uint8_t *rxbuf);
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#if I2C_USE_MUTUAL_EXCLUSION
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void i2cAcquireBus(I2CDriver *i2cp);
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void i2cReleaseBus(I2CDriver *i2cp);
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@ -61,9 +61,10 @@ static i2cflags_t translate_errors(uint16_t sr) {
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/* This function handle all regular interrupt conditions
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*
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*/
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static void i2c_serve_event_interrupt(I2CDriver *i2cp) {
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// TODO: enable interrupts in config registers
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if ((i2cp->id_state == I2C_READY) && (i2cp->id_i2c->SR1 & I2C_SR1_SB)){// start bit sent
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i2cp->id_state = I2C_MACTIVE;
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@ -71,24 +72,104 @@ static void i2c_serve_event_interrupt(I2CDriver *i2cp) {
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i2cp->id_slave_config->rw_bit; // write slave address in DR
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}
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// now wait interrupt with ADDR flag
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// now "wait" interrupt with ADDR flag
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// TODO: 10 bit address handling here
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// TODO: setup here transmission via DMA like in ADC
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if ((i2cp->id_state == I2C_MACTIVE) && (i2cp->id_i2c->SR1 & I2C_SR1_ADDR)){// address successfully sent
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if(i2cp->id_slave_config->rw_bit == I2C_WRITE){
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i2cp->id_state = I2C_MTRANSMIT;
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// TODO: setup here transmission via DMA like in ADC
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i2c_lld_txbyte(i2cp); // send first byte
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i2cp->id_state = I2C_MTRANSMIT; // change state
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}
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else {
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i2cp->id_state = I2C_MRECEIVE;
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// TODO: setup here transmission via DMA like in ADC
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i2c_lld_rxbyte(i2cp); // read first byte
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i2cp->id_state = I2C_MRECEIVE; // change stat
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}
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}
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// transmitting bytes one by one
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if ((i2cp->id_state == I2C_MTRANSMIT) && (i2cp->id_i2c->SR1 & I2C_SR1_TXE)){
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if (i2c_lld_txbyte(i2cp))
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i2cp->id_state = I2C_MWAIT_TF; // last byte written
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}
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//receiving bytes one by one
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if ((i2cp->id_state == I2C_MRECEIVE) && (i2cp->id_i2c->SR1 & I2C_SR1_RXNE)){
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if (i2c_lld_txbyte(i2cp))
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i2cp->id_state = I2C_MWAIT_TF; // last byte read
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}
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// "wait" BTF bit in status register
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if ((i2cp->id_state == I2C_MWAIT_TF) && (i2cp->id_i2c->SR1 & I2C_SR1_BTF)){
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if (i2cp->id_slave_config->restart){ // restart need
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i2cp->id_state = I2C_MACTIVE;
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//i2cp->id_i2c->CR1 |= I2C_CR1_START; // send restart
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i2cp->id_slave_config->id_restart_callback(i2cp, i2cp->id_slave_config); // callback call
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}
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else {
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i2cp->id_state = I2C_READY;
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i2cp->id_i2c->CR1 |= I2C_CR1_STOP; // stop communication
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i2cp->id_slave_config->id_stop_callback(i2cp, i2cp->id_slave_config); // callback call
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}
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}
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}
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/* helper function, not API
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* write bytes in DR register
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* return TRUE if last byte written
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*/
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bool_t i2c_lld_txbyte(I2CDriver *i2cp) {
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// temporal variables
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#define txbuf i2cp->id_slave_config->txbuf
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#define txbufhead i2cp->id_slave_config->txbufhead
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#define txdepth i2cp->id_slave_config->txdepth
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if (txbufhead < txdepth){
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i2cp->id_i2c->DR = txbuf[txbufhead];
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txbufhead++;
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return(FALSE);
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}
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txbufhead = 0;
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#undef txbuf
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#undef txbufhead
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#undef txdepth
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return(TRUE); // last byte written
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}
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/* helper function, not API
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* read bytes from DR register
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* return TRUE if last byte read
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*/
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bool_t i2c_lld_rxbyte(I2CDriver *i2cp) {
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// temporal variables
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#define rxbuf i2cp->id_slave_config->rxbuf
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#define rxbufhead i2cp->id_slave_config->rxbufhead
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#define rxdepth i2cp->id_slave_config->rxdepth
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if (rxbufhead < rxdepth){
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rxbuf[rxbufhead] = i2cp->id_i2c->DR;
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rxbufhead++;
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return(FALSE);
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}
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rxbufhead = 0;
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#undef rxbuf
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#undef rxbufhead
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#undef rxdepth
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return(TRUE); // last byte read
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}
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static void i2c_serve_error_interrupt(I2CDriver *i2cp) {
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// TODO:remove this stub
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//simply trap for errors
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while TRUE{
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translate_errors(i2cp->id_i2c->SR1);
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}
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}
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#if STM32_I2C_USE_I2C1 || defined(__DOXYGEN__)
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@ -186,9 +267,9 @@ void i2c_lld_start(I2CDriver *i2cp) {
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i2cp->id_i2c->CR1 = i2cp->id_config->i2cc_cr1;
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i2cp->id_i2c->CR2 = i2cp->id_config->i2cc_cr2 |
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//I2C_CR2_ITERREN |
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//I2C_CR2_ITEVTEN |
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//I2C_CR2_ITBUFEN |
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I2C_CR2_ITERREN |
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I2C_CR2_ITEVTEN |
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I2C_CR2_ITBUFEN |
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36; //TODO: replace this by macro calculation
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/* TODO:
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* 1. macro timing calculator
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@ -230,10 +311,32 @@ void i2c_lld_stop(I2CDriver *i2cp) {
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void i2c_lld_master_transmitI(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg, bool_t restart){
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;
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void i2c_lld_master_transmitI(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){
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//TODO: check txbytes <= sizeof(i2cscfg->txbuf) here, or in hylevel API
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i2cp->id_slave_config = i2cscfg;
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i2cp->id_slave_config->rw_bit = I2C_WRITE;
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// generate start condition. Later transmission goes asynchronously
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i2cp->id_i2c->CR1 |= I2C_CR1_START;
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}
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void i2c_lld_master_receiveI(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){
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//TODO: check txbytes <= sizeof(i2cscfg->txbuf) here, or in hylevel API
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i2cp->id_slave_config = i2cscfg;
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i2cp->id_slave_config->rw_bit = I2C_READ;
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// reset restart flag
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i2cp->id_slave_config->restart = FALSE;
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// generate (re)start condition. Later connection goes asynchronously
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i2cp->id_i2c->CR1 |= I2C_CR1_START;
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// TODO: need to clear ACK bit somewhere
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}
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/**
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* @brief Transmits data ever the I2C bus as master.
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i2cp->id_slave_config = i2cscfg;
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i2cp->id_slave_config->rw_bit = I2C_WRITE;
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//TODO: setup DMA channel here
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//
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//
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i2cp->id_i2c->CR1 |= I2C_CR1_START; // generate start condition
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while (!(i2cp->id_i2c->SR1 & I2C_SR1_SB)){
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@ -77,13 +77,25 @@
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief Type of a structure representing an I2C driver.
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*/
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typedef struct I2CDriver I2CDriver;
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/**
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* @brief Type of a structure representing an I2C driver.
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*/
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typedef struct I2CSlaveConfig I2CSlaveConfig;
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/**
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* @brief I2C notification callback type.
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*
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* @param[in] i2cp FIXME: pointer to the @p I2CDriver object triggering the
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* callback
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*/
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typedef void (*i2ccallback_t)(void);
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typedef void (*i2ccallback_t)(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg);
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//typedef void (*i2ccallback_t)(void);
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/**
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* @brief I2C error notification callback type.
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*/
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typedef void (*i2cerrorcallback_t)(void);
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/**
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* @brief Driver configuration structure.
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*/
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* @brief Structure representing an I2C slave configuration.
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* @details Each slave has its own data buffers, adress, and error flags.
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*/
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typedef struct {
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struct I2CSlaveConfig{
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/**
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* @brief Callback pointer.
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* @note Transfer finished callback. Invoke when all data transferred, or
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* by DMA buffer events
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* @p NULL then the callback is disabled.
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*/
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i2ccallback_t id_stop_callback;
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i2ccallback_t id_restart_callback;
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/**
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* @brief Callback pointer.
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* @note TODO: I don't know, when this callback is inwoked
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* @p NULL then the callback is disabled.
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*/
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i2ccallback_t id_callback;
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/**
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* @brief Callback pointer.
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* @note TODO: I don't know, when this callback is inwoked
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* @p NULL then the callback is disabled.
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*/
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i2cerrorcallback_t id_errcallback;
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i2cerrorcallback_t id_err_callback;
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i2cblock_t *rxbuf; // pointer to buffer
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size_t rxdepth;// depth of buffer
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size_t rxbytes;// count of bytes to sent in one sending
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i2cblock_t *rxbuf; // pointer to buffer
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size_t rxdepth; // depth of buffer
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size_t rxbytes; // count of bytes to sent in one sending
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size_t rxbufhead; // head pointer to current data byte
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i2cblock_t *txbuf;
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size_t txdepth;
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size_t txbytes;
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size_t txbufhead;
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uint8_t slave_addr1; // 7-bit address of the slave
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uint8_t slave_addr2; // used in 10-bit address mode
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bool_t restart; // send restart or stop event after complete data tx/rx
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}I2CSlaveConfig;
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};
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/**
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* @brief Structure representing an I2C driver.
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*/
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typedef struct {
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struct I2CDriver{
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/**
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* @brief Driver state.
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*/
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*/
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I2C_TypeDef *id_i2c;
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} I2CDriver;
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} ;
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/*===========================================================================*/
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void i2c_lld_stop(I2CDriver *i2cp);
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void i2c_lld_master_start(I2CDriver *i2cp, uint16_t header);
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void i2c_lld_master_stop(I2CDriver *i2cp);
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void i2c_lld_master_transmit(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg, bool_t restart);
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void i2c_lld_master_transmitI(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg, bool_t restart);
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bool_t i2c_lld_txbyte(I2CDriver *i2cp); // helper function
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void i2c_lld_master_transmitI(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg);
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void i2c_lld_master_receive(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg);
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void i2c_lld_master_receiveI(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg);
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bool_t i2c_lld_rxbyte(I2CDriver *i2cp);
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//static i2cflags_t translate_errors(uint16_t sr);
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#ifdef __cplusplus
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@ -126,7 +126,7 @@ void i2cStop(I2CDriver *i2cp) {
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* @param[in] txbuf the pointer to the transmit buffer
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*
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*/
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void i2cMasterTransmit(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg, bool_t restart) {
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void i2cMasterTransmit(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg) {
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chDbgCheck((i2cp != NULL) && (i2cscfg != NULL),
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"i2cMasterTransmit");
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"i2cMasterTransmit(), #1",
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"not active");
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i2c_lld_master_transmit(i2cp, i2cscfg, restart);
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i2c_lld_master_transmitI(i2cp, i2cscfg);
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}
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"i2cMasterReceive(), #1",
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"not active");
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i2c_lld_master_receive(i2cp, i2cscfg);
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i2c_lld_master_receiveI(i2cp, i2cscfg);
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}
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