diff --git a/demos/STM32/RT-STM32L432KC-NUCLEO32/Makefile b/demos/STM32/RT-STM32L432KC-NUCLEO32/Makefile
index 08925d42f..abac4c81d 100644
--- a/demos/STM32/RT-STM32L432KC-NUCLEO32/Makefile
+++ b/demos/STM32/RT-STM32L432KC-NUCLEO32/Makefile
@@ -91,7 +91,7 @@ CHIBIOS = ../../..
 include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l4xx.mk
 # HAL-OSAL files (optional).
 include $(CHIBIOS)/os/hal/hal.mk
-include $(CHIBIOS)/os/hal/ports/STM32/STM32L4xx/platform.mk
+include $(CHIBIOS)/os/hal/ports/STM32/STM32L4xx/platform_l432.mk
 include $(CHIBIOS)/os/hal/boards/ST_NUCLEO32_L432KC/board.mk
 include $(CHIBIOS)/os/hal/osal/rt/osal.mk
 # RTOS files (optional).
diff --git a/os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.h b/os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.h
index 7971189ae..4872cc9c4 100644
--- a/os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.h
+++ b/os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.h
@@ -448,6 +448,16 @@ struct USBDriver {
 #endif
 #endif /* STM32L1XX */
 
+#if defined(STM32L432xx)
+#if !defined(usb_lld_connect_bus)
+#define usb_lld_connect_bus(usbp) (USB->BCDR |= USB_BCDR_DPPU)
+#endif
+
+#if !defined(usb_lld_disconnect_bus)
+#define usb_lld_disconnect_bus(usbp) (USB->BCDR &= ~USB_BCDR_DPPU)
+#endif
+#endif /* STM32L432xx */
+
 /*===========================================================================*/
 /* External declarations.                                                    */
 /*===========================================================================*/
diff --git a/os/hal/ports/STM32/STM32L4xx/hal_lld.h b/os/hal/ports/STM32/STM32L4xx/hal_lld.h
index b1594d99c..476c288be 100644
--- a/os/hal/ports/STM32/STM32L4xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32L4xx/hal_lld.h
@@ -1974,6 +1974,7 @@
 #else
 #error "invalid source selected for 48CLK clock"
 #endif
+#define STM32_USBCLK                STM32_48CLK
 
 /**
  * @brief   ADC clock frequency.
diff --git a/os/hal/ports/STM32/STM32L4xx/platform_l432.mk b/os/hal/ports/STM32/STM32L4xx/platform_l432.mk
new file mode 100644
index 000000000..74337edc8
--- /dev/null
+++ b/os/hal/ports/STM32/STM32L4xx/platform_l432.mk
@@ -0,0 +1,103 @@
+# List of all the STM32L432 platform files.
+ifeq ($(USE_SMART_BUILD),yes)
+HALCONF := $(strip $(shell cat halconf.h | egrep -e "\#define"))
+
+PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
+               $(CHIBIOS)/os/hal/ports/STM32/STM32L4xx/hal_lld.c \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c
+ifneq ($(findstring HAL_USE_ADC TRUE,$(HALCONF)),)
+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c
+endif
+ifneq ($(findstring HAL_USE_CAN TRUE,$(HALCONF)),)
+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c
+endif
+ifneq ($(findstring HAL_USE_DAC TRUE,$(HALCONF)),)
+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c
+endif
+ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),)
+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/hal_ext_lld.c \
+               $(CHIBIOS)/os/hal/ports/STM32/STM32L4xx/hal_ext_lld_isr.c
+endif
+ifneq ($(findstring HAL_USE_PAL TRUE,$(HALCONF)),)
+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c
+endif
+ifneq ($(findstring HAL_USE_I2C TRUE,$(HALCONF)),)
+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.c
+endif
+ifneq ($(findstring HAL_USE_USB TRUE,$(HALCONF)),)
+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c
+endif
+ifneq ($(findstring HAL_USE_QSPI TRUE,$(HALCONF)),)
+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c
+endif
+ifneq ($(findstring HAL_USE_RTC TRUE,$(HALCONF)),)
+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c
+endif
+ifneq ($(findstring HAL_USE_SDC TRUE,$(HALCONF)),)
+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c
+endif
+ifneq ($(findstring HAL_USE_SPI TRUE,$(HALCONF)),)
+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c
+endif
+ifneq ($(findstring HAL_USE_GPT TRUE,$(HALCONF)),)
+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c
+endif
+ifneq ($(findstring HAL_USE_ICU TRUE,$(HALCONF)),)
+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c
+endif
+ifneq ($(findstring HAL_USE_PWM TRUE,$(HALCONF)),)
+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c
+endif
+ifneq ($(findstring HAL_USE_SERIAL TRUE,$(HALCONF)),)
+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c
+endif
+ifneq ($(findstring HAL_USE_UART TRUE,$(HALCONF)),)
+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c
+endif
+ifneq ($(findstring HAL_USE_WDG TRUE,$(HALCONF)),)
+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/xWDGv1/hal_wdg_lld.c
+endif
+else
+PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
+               $(CHIBIOS)/os/hal/ports/STM32/STM32L4xx/hal_lld.c \
+               $(CHIBIOS)/os/hal/ports/STM32/STM32L4xx/hal_ext_lld_isr.c \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/hal_ext_lld.c \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv3/hal_pal_lld.c \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.c \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/xWDGv1/hal_wdg_lld.c
+endif
+
+# Required include directories
+PLATFORMINC := $(CHIBIOS)/os/hal/ports/common/ARMCMx \
+               $(CHIBIOS)/os/hal/ports/STM32/STM32L4xx \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/ADCv3 \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1 \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1 \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/DMAv1 \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1 \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv3 \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv2 \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/USBv1 \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/QUADSPIv1 \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2 \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/SDMMCv1 \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv2 \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1 \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/USARTv2 \
+               $(CHIBIOS)/os/hal/ports/STM32/LLD/xWDGv1
diff --git a/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h b/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h
index 9c771276c..384449d25 100644
--- a/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h
+++ b/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h
@@ -1127,6 +1127,36 @@
 #define rccResetLPUART1() rccResetAPB1R2(RCC_APB1RSTR2_LPUART1RST)
 /** @} */
 
+/**
+ * @name    USB peripheral specific RCC operations
+ * @{
+ */
+/**
+ * @brief   Enables the USB peripheral clock.
+ *
+ * @param[in] lp        low power enable flag
+ *
+ * @api
+ */
+#define rccEnableUSB(lp) rccEnableAPB1R1(RCC_APB1ENR1_USBFSEN, lp)
+
+/**
+ * @brief   Disables the USB peripheral clock.
+ *
+ * @param[in] lp        low power enable flag
+ *
+ * @api
+ */
+#define rccDisableUSB(lp) rccDisableAPB1R1(RCC_APB1ENR1_USBFSEN, lp)
+
+/**
+ * @brief   Resets the USB peripheral.
+ *
+ * @api
+ */
+#define rccResetUSB() rccResetAPB1R1(RCC_APB1RSTR1_USBFSRST)
+/** @} */
+
 /**
  * @name    FSMC peripherals specific RCC operations
  * @{
diff --git a/os/hal/ports/STM32/STM32L4xx/stm32_registry.h b/os/hal/ports/STM32/STM32L4xx/stm32_registry.h
index 9648c9f99..3b48d81ce 100644
--- a/os/hal/ports/STM32/STM32L4xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32L4xx/stm32_registry.h
@@ -324,6 +324,11 @@
 #define STM32_USB_ACCESS_SCHEME_2x16        FALSE
 #define STM32_USB_PMA_SIZE                  512
 #define STM32_USB_HAS_BCDR                  FALSE
+#define STM32_USB1_HP_HANDLER               Vector14C
+#define STM32_USB1_LP_HANDLER               Vector14C
+#define STM32_USB1_HP_NUMBER                67
+#define STM32_USB1_LP_NUMBER                67
+
 #define STM32_HAS_OTG1                      FALSE
 #define STM32_HAS_OTG2                      FALSE