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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@624 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2009-01-17 18:16:26 +00:00
parent b66044d969
commit f6ff614e9b
8 changed files with 185 additions and 165 deletions
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8
ports/ARM7-LPC214x/chcore.c
View File

@ -38,7 +38,7 @@
* @param msg pointer to the message
*/
__attribute__((weak))
void sys_puts(char *msg) {
void port_puts(char *msg) {
}
/**
@ -46,7 +46,7 @@ void sys_puts(char *msg) {
* when an interrupt becomes pending.
*/
__attribute__((weak))
void sys_wait_for_interrupt(void) {
void port_wait_for_interrupt(void) {
#if ENABLE_WFI_IDLE != 0
PCON = 1;
@ -57,9 +57,9 @@ void sys_wait_for_interrupt(void) {
* Halts the system.
*/
__attribute__((weak))
void sys_halt(void) {
void port_halt(void) {
sys_disable_all();
port_disable();
while (TRUE) {
}
}

169
ports/ARM7/chcore.h
View File

@ -99,7 +99,7 @@ typedef struct {
sizeof(struct intctx)); \
tp->p_ctx.r13->r4 = pf; \
tp->p_ctx.r13->r5 = arg; \
tp->p_ctx.r13->lr = _sys_thread_start; \
tp->p_ctx.r13->lr = _port_thread_start; \
}
/**
@ -149,15 +149,15 @@ typedef struct {
* it is transparent to the user code.
*/
#ifdef THUMB
#define SYS_IRQ_PROLOGUE() { \
asm volatile (".code 32 \n\t" \
"stmfd sp!, {r0-r3, r12, lr} \n\t" \
"add r0, pc, #1 \n\t" \
"bx r0 \n\t" \
#define PORT_IRQ_PROLOGUE() { \
asm volatile (".code 32 \n\t" \
"stmfd sp!, {r0-r3, r12, lr} \n\t" \
"add r0, pc, #1 \n\t" \
"bx r0 \n\t" \
".code 16"); \
}
#else /* THUMB */
#define SYS_IRQ_PROLOGUE() { \
#define PORT_IRQ_PROLOGUE() { \
asm volatile ("stmfd sp!, {r0-r3, r12, lr}"); \
}
#endif /* !THUMB */
@ -169,100 +169,115 @@ typedef struct {
* ARM or THUMB mode.
*/
#ifdef THUMB
#define SYS_IRQ_EPILOGUE() { \
asm volatile ("ldr r0, =_sys_irq_common \n\t" \
"bx r0"); \
#define PORT_IRQ_EPILOGUE() { \
asm volatile ("ldr r0, =_port_irq_common \n\t" \
"bx r0"); \
}
#else /* THUMB */
#define SYS_IRQ_EPILOGUE() { \
asm volatile ("b _sys_irq_common"); \
#define PORT_IRQ_EPILOGUE() { \
asm volatile ("b _port_irq_common"); \
}
#endif /* !THUMB */
/**
* IRQ handler function modifier.
*/
#define SYS_IRQ_HANDLER __attribute__((naked))
#define PORT_IRQ_HANDLER __attribute__((naked))
/**
* This function is empty in this port.
*/
#define port_init()
/**
* Disables the IRQ sources and keeps the FIQ sources enabled.
*/
#ifdef THUMB
#define port_lock() _port_lock_thumb()
#else /* THUMB */
#define port_lock() asm volatile ("msr CPSR_c, #0x9F")
#endif /* !THUMB */
/**
* Enables both the IRQ and FIQ sources.
*/
#ifdef THUMB
#define port_unlock() _port_unlock_thumb()
#else /* THUMB */
#define port_unlock() asm volatile ("msr CPSR_c, #0x1F")
#endif /* !THUMB */
/**
* This function is empty in this port.
*/
#define port_lock_from_isr()
/**
* This function is empty in this port.
*/
#define port_unlock_from_isr()
/**
* Disables both the IRQ and FIQ sources.
*/
#ifdef THUMB
#define port_disable() _port_disable_thumb()
#else /* THUMB */
#define port_disable() { \
asm volatile ("mrs r3, CPSR \n\t" \
"orr r3, #0x80 \n\t" \
"msr CPSR_c, r3 \n\t" \
"orr r3, #0x40 \n\t" \
"msr CPSR_c, r3" : : : "r3"); \
}
#endif /* !THUMB */
/**
* Disables the IRQ sources and enables the FIQ sources.
*/
#ifdef THUMB
#define port_suspend() _port_suspend_thumb()
#else /* THUMB */
#define port_suspend() asm volatile ("msr CPSR_c, #0x9F")
#endif /* !THUMB */
/**
* Enables both the IRQ and FIQ sources.
*/
#ifdef THUMB
#define port_enable() _port_enable_thumb()
#else /* THUMB */
#define port_enable() asm volatile ("msr CPSR_c, #0x1F")
#endif /* !THUMB */
/**
* Performs a context switch between two threads.
* @param otp the thread to be switched out
* @param ntp the thread to be switched in
* @note This macro has a different implementation depending if compiled in
* ARM or THUMB mode.
* @note This macro assumes to be invoked in ARM system mode.
*/
#ifdef THUMB
#define sys_switch(otp, ntp) _sys_switch_thumb(otp, ntp)
#define port_switch(otp, ntp) _port_switch_thumb(otp, ntp)
#else /* THUMB */
#define sys_switch(otp, ntp) _sys_switch_arm(otp, ntp)
#endif /* !THUMB */
/**
* In this port this macro disables the IRQ sources.
* @note This macro has a different implementation depending if compiled in
* ARM or THUMB mode.
* @note This macro assumes to be invoked in ARM system mode.
*/
#ifdef THUMB
#define sys_disable() _sys_disable_thumb()
#else /* THUMB */
#define sys_disable() asm volatile ("msr CPSR_c, #0x9F")
#endif /* !THUMB */
/**
* This port function is implemented as inlined code for performance reasons.
* @note This macro has a different implementation depending if compiled in
* ARM or THUMB mode.
* @note This macro assumes to be invoked in ARM system mode.
*/
#ifdef THUMB
#define sys_enable() _sys_enable_thumb()
#else /* THUMB */
#define sys_enable() asm volatile ("msr CPSR_c, #0x1F")
#endif /* !THUMB */
/**
* This function is empty in this port.
*/
#define sys_disable_from_isr()
/**
* This function is empty in this port.
*/
#define sys_enable_from_isr()
/**
* Disables all the interrupt sources, even those having a priority higher
* to the kernel.
* In the ARM7 port this code disables both IRQ and FIQ sources.
*/
#ifdef THUMB
#define sys_disable_all() _sys_disable_all_thumb()
#else /* THUMB */
#define sys_disable_all() { \
asm volatile ("mrs r3, CPSR \n\t" \
"orr r3, #0x80 \n\t" \
"msr CPSR_c, r3 \n\t" \
"orr r3, #0x40 \n\t" \
"msr CPSR_c, r3" : : : "r3"); \
}
#define port_switch(otp, ntp) _port_switch_arm(otp, ntp)
#endif /* !THUMB */
#ifdef __cplusplus
extern "C" {
#endif
void sys_puts(char *msg);
void sys_wait_for_interrupt(void);
void sys_halt(void);
void _sys_enable_thumb(void);
void _sys_disable_thumb(void);
void port_puts(char *msg);
void port_wait_for_interrupt(void);
void port_halt(void);
#ifdef THUMB
void _sys_switch_thumb(Thread *otp, Thread *ntp);
void _port_lock_thumb(void);
void _port_unlock_thumb(void);
void _port_disable_thumb(void);
void _port_suspend_thumb(void);
void _port_enable_thumb(void);
void _port_switch_thumb(Thread *otp, Thread *ntp);
#else /* THUMB */
void _sys_switch_arm(Thread *otp, Thread *ntp);
void _port_switch_arm(Thread *otp, Thread *ntp);
#endif /* !THUMB */
void _sys_thread_start(void);
void _port_thread_start(void);
#ifdef __cplusplus
}
#endif

75
ports/ARM7/chsysasm.s
View File

@ -44,30 +44,8 @@
.balign 16
.code 16
.thumb_func
.global _sys_disable_thumb
_sys_disable_thumb:
mov r0, pc
bx r0
.code 32
msr CPSR_c, #MODE_SYS | I_BIT
bx lr
.balign 16
.code 16
.thumb_func
.global _sys_enable_thumb
_sys_enable_thumb:
mov r0, pc
bx r0
.code 32
msr CPSR_c, #MODE_SYS
bx lr
.balign 16
.code 16
.thumb_func
.global _sys_disable_all_thumb
_sys_disable_all_thumb:
.global _port_disable_all_thumb
_port_disable_all_thumb:
mov r0, pc
bx r0
.code 32
@ -77,21 +55,48 @@ _sys_disable_all_thumb:
orr r0, #F_BIT
msr CPSR_c, r0
bx lr
.balign 16
.code 16
.thumb_func
.global _port_suspend_thumb
_port_disable_thumb:
.global _port_lock_thumb
_port_lock_thumb:
mov r0, pc
bx r0
.code 32
msr CPSR_c, #MODE_SYS | I_BIT
bx lr
.balign 16
.code 16
.thumb_func
.global _port_enable_thumb
_port_enable_thumb:
.global _port_unlock_thumb
_port_unlock_thumb:
mov r0, pc
bx r0
.code 32
msr CPSR_c, #MODE_SYS
bx lr
#endif
.balign 16
#ifdef THUMB_PRESENT
.code 16
.thumb_func
.global _sys_switch_thumb
_sys_switch_thumb:
.global _port_switch_thumb
_port_switch_thumb:
mov r2, pc
bx r2
// Jumps into _sys_switch_arm in ARM mode
// Jumps into _port_switch_arm in ARM mode
#endif
.code 32
.global _sys_switch_arm
_sys_switch_arm:
.global _port_switch_arm
_port_switch_arm:
#ifdef CH_CURRP_REGISTER_CACHE
stmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr}
str sp, [r0, #16]
@ -145,16 +150,16 @@ _sys_switch_arm:
#ifdef THUMB_NO_INTERWORKING
.code 16
.thumb_func
.globl _sys_irq_common
_sys_irq_common:
.globl _port_irq_common
_port_irq_common:
bl chSchRescRequiredI
mov lr, pc
bx lr
.code 32
#else /* !THUMB_NO_INTERWORKING */
.code 32
.globl _sys_irq_common
_sys_irq_common:
.globl _port_irq_common
_port_irq_common:
bl chSchRescRequiredI
#endif /* !THUMB_NO_INTERWORKING */
cmp r0, #0 // Simply returns if a
@ -200,8 +205,8 @@ _sys_irq_common:
*/
.balign 16
.code 32
.globl _sys_thread_start
_sys_thread_start:
.globl _port_thread_start
_port_thread_start:
msr CPSR_c, #MODE_SYS
#ifndef THUMB_NO_INTERWORKING
mov r0, r5

4
ports/ARM7/crt0.s
View File

@ -123,7 +123,7 @@ bssloop:
mov r0, #0
mov r1, r0
bl main
bl sys_halt
bl port_halt
#else
add r0, pc, #1
bx r0
@ -132,7 +132,7 @@ bssloop:
mov r0, #0
mov r1, r0
bl main
bl sys_halt
bl port_halt
.code 32
#endif

8
src/chsys.c
View File

@ -38,7 +38,7 @@ static WORKING_AREA(idle_thread_wa, IDLE_THREAD_STACK_SIZE);
static void idle_thread(void *p) {
while (TRUE) {
sys_wait_for_interrupt();
port_wait_for_interrupt();
}
}
@ -52,7 +52,7 @@ static void idle_thread(void *p) {
void chSysInit(void) {
static Thread mainthread;
sys_init();
port_init();
chSchInit();
chDbgInit();
chVTInit();
@ -100,14 +100,14 @@ void chSysLock(void) {
chDbgAssert(currp->p_locks >= 0, "chinit.c, chSysLock()");
if (currp->p_locks++ == 0)
sys_lock();
port_lock();
}
void chSysUnlock(void) {
chDbgAssert(currp->p_locks > 0, "chinit.c, chSysUnlock()");
if (--currp->p_locks == 0)
sys_unlock();
port_unlock();
}
#endif /* defined(CH_USE_NESTED_LOCKS) && !defined(CH_OPTIMIZE_SPEED) */

30
src/include/sys.h
View File

@ -29,14 +29,14 @@
* Prints a message on the system console (if any).
* @param msg the message to be printed on the system console
*/
#define chSysPuts(msg) sys_puts(msg)
#define chSysPuts(msg) port_puts(msg)
/**
* Halts the system. This function is invoked by the operating system when an
* unrecoverable error is detected (as example because a programming error in
* the application code that triggers an assertion while in debug mode).
*/
#define chSysHalt() sys_halt()
#define chSysHalt() port_halt()
/**
* Performs a context switch.
@ -47,7 +47,7 @@
* @note The implementation of this code affects <b>directly</b> the context
* switch performance so optimize here as much as you can.
*/
#define chSysSwitchI(otp, ntp) sys_switch(otp, ntp)
#define chSysSwitchI(otp, ntp) port_switch(otp, ntp)
/**
* Raises the system interrupt priority mask to the maximum level.
@ -57,7 +57,7 @@
* interrupts or be exactly equivalent to @p chSysDisable().
* @note Do not invoke this API from within a kernel lock.
*/
#define chSysDisable() sys_disable()
#define chSysDisable() port_disable()
/**
* Raises the system interrupt priority mask to system level.
@ -69,7 +69,7 @@
* @note This API is no replacement for @p chSysLock(), the @p chSysLock()
* could do more than just disable the interrupts.
*/
#define chSysSuspend() sys_suspend()
#define chSysSuspend() port_suspend()
/**
* Lowers the system interrupt priority mask to user level.
@ -80,7 +80,7 @@
* @note This API is no replacement for @p chSysUnlock(), the @p chSysUnlock()
* could do more than just enable the interrupts.
*/
#define chSysEnable() sys_enable()
#define chSysEnable() port_enable()
/**
* Enters the kernel lock mode.
@ -92,11 +92,11 @@
#if defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
#define chSysLock() { \
if (currp->p_locks++ == 0) \
sys_lock(); \
port_lock(); \
}
#endif /* defined(CH_OPTIMIZE_SPEED) */
#else /* !defined(CH_USE_NESTED_LOCKS) */
#define chSysLock() sys_lock()
#define chSysLock() port_lock()
#endif /* !defined(CH_USE_NESTED_LOCKS) */
/**
@ -109,11 +109,11 @@
#if defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
#define chSysUnlock() { \
if (--currp->p_locks == 0) \
sys_unlock(); \
port_unlock(); \
}
#endif /* defined(CH_OPTIMIZE_SPEED) */
#else /* !defined(CH_USE_NESTED_LOCKS) */
#define chSysUnlock() sys_unlock()
#define chSysUnlock() port_unlock()
#endif /* !defined(CH_USE_NESTED_LOCKS) */
/**
@ -126,7 +126,7 @@
* syscall from an interrupt handler.
* @note This API must be invoked exclusively from interrupt handlers.
*/
#define chSysLockI() sys_lock_from_isr()
#define chSysLockI() port_lock_from_isr()
/**
* Leaves the kernel lock mode from within an interrupt handler.
@ -138,14 +138,14 @@
* syscall from an interrupt handler.
* @note This API must be invoked exclusively from interrupt handlers.
*/
#define chSysUnlockI() sys_unlock_from_isr()
#define chSysUnlockI() port_unlock_from_isr()
/**
* IRQ handler enter code.
* @note Usually IRQ handlers functions are also declared naked.
* @note On some architectures this macro can be empty.
*/
#define CH_IRQ_PROLOGUE() SYS_IRQ_PROLOGUE()
#define CH_IRQ_PROLOGUE() PORT_IRQ_PROLOGUE()
/**
* IRQ handler exit code.
@ -153,12 +153,12 @@
* @note This macro usually performs the final reschedulation by using
* @p chSchRescRequiredI() and @p chSchDoRescheduleI().
*/
#define CH_IRQ_EPILOGUE() SYS_IRQ_EPILOGUE()
#define CH_IRQ_EPILOGUE() PORT_IRQ_EPILOGUE()
/**
* Standard modifier for IRQ handler functions.
*/
#define CH_IRQ_HANDLER SYS_IRQ_HANDLER
#define CH_IRQ_HANDLER PORT_IRQ_HANDLER
#ifdef __cplusplus
extern "C" {

26
src/templates/chcore.c
View File

@ -35,21 +35,21 @@
* Port-related initialization code.
* @note This function is usually empty.
*/
void sys_init(void){
void port_init(void){
}
/**
* Kernel-unlock action. Usually this function just disables interrupts but
* may perform more actions.
*/
void sys_lock(void) {
void port_lock(void) {
}
/**
* Kernel-unlock action. Usually this function just disables interrupts but
* may perform more actions.
*/
void sys_unlock(void) {
void port_unlock(void) {
}
/**
@ -57,7 +57,7 @@ void sys_unlock(void) {
* before invoking I-class APIs from interrupt handlers. The implementation
* is architecture dependent, in its simplest form it is void.
*/
void sys_lock_from_isr(void) {
void port_lock_from_isr(void) {
}
/**
@ -65,26 +65,26 @@ void sys_lock_from_isr(void) {
* after invoking I-class APIs from interrupt handlers. The implementation
* is architecture dependent, in its simplest form it is void.
*/
void sys_unlock_from_isr(void) {
void port_unlock_from_isr(void) {
}
/**
* Disables all the interrupt sources.
* @note Of course non maskable interrupt sources are not included.
*/
void sys_disable() {
void port_disable() {
}
/**
* Disables the interrupt sources that are not supposed to preempt the kernel.
*/
void sys_suspend(void) {
void port_suspend(void) {
}
/**
* Enables all the interrupt sources.
*/
void sys_enable(void) {
void port_enable(void) {
}
/**
@ -93,7 +93,7 @@ void sys_enable(void) {
* function but this will not take advantage of architecture-specific power
* saving modes.
*/
void sys_wait_for_interrupt(void) {
void port_wait_for_interrupt(void) {
}
/**
@ -101,9 +101,9 @@ void sys_wait_for_interrupt(void) {
* unrecoverable error is detected (as example because a programming error in
* the application code that triggers an assertion while in debug mode).
*/
void sys_halt(void) {
void port_halt(void) {
sys_disable_all();
port_disable_all();
while (TRUE) {
}
}
@ -113,14 +113,14 @@ void sys_halt(void) {
* @param otp the thread to be switched out
* @param ntp the thread to be switched in
*/
void sys_switch(Thread *otp, Thread *ntp) {
void port_switch(Thread *otp, Thread *ntp) {
}
/**
* Prints a message on the system console.
* @param msg pointer to the message
*/
void sys_puts(char *msg) {
void port_puts(char *msg) {
}
/** @} */

30
src/templates/chcore.h
View File

@ -113,34 +113,34 @@ typedef struct {
* IRQ prologue code, inserted at the start of all IRQ handlers enabled to
* invoke system APIs.
*/
#define SYS_IRQ_PROLOGUE()
#define PORT_IRQ_PROLOGUE()
/**
* IRQ epilogue code, inserted at the end of all IRQ handlers enabled to
* invoke system APIs.
*/
#define SYS_IRQ_EPILOGUE()
#define PORT_IRQ_EPILOGUE()
/**
* IRQ handler function modifier.
*/
#define SYS_IRQ_HANDLER
#define PORT_IRQ_HANDLER
#ifdef __cplusplus
extern "C" {
#endif
void sys_init(void);
void sys_disable(void);
void sys_suspend(void);
void sys_enable(void);
void sys_lock(void);
void sys_unlock(void);
void sys_disable_from_isr(void);
void sys_enable_from_isr(void);
void sys_wait_for_interrupt(void);
void sys_halt(void);
void sys_switch(Thread *otp, Thread *ntp);
void sys_puts(char *msg);
void port_init(void);
void port_lock(void);
void port_unlock(void);
void port_lock_from_isr(void);
void port_unlock_from_isr(void);
void port_disable(void);
void port_suspend(void);
void port_enable(void);
void port_wait_for_interrupt(void);
void port_halt(void);
void port_switch(Thread *otp, Thread *ntp);
void port_puts(char *msg);
#ifdef __cplusplus
}
#endif