Doxygen-related fixes.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1038 35acf78f-673a-0410-8e92-d51de3d6d3f4

ports/ARM7-AT91SAM7X/port.dox

@@ -25,7 +25,7 @@
  * - EMAC driver with MII support.
  * - A demo supporting the kernel test suite.
  * - A Web server demo using the uIP TCP/IP stack.
- *
+ * .
  * @ingroup ARM7
  */
 

ports/ARM7-LPC214x/port.dox

@@ -30,7 +30,7 @@
  * - A minimal demo, useful as project template.
  * - A demo supporting the kernel test suite.
  * - A C++ demo supporting the kernel test suite.
- *
+ * .
  * @ingroup ARM7
  */
 

ports/ARM7/port.dox

@@ -34,7 +34,7 @@
  *   THUMB modules then the interworking compiler option is enabled. This is
  *   usually the slowest mode and the code size is not as good as in pure
  *   THUMB mode.
- *
+ * .
  * @section ARM7_STATES Mapping of the System States in the ARM7 port
  * The ChibiOS/RT logical @ref system_states are mapped as follow in the ARM7
  * port:
@@ -69,7 +69,7 @@
  * - <b>Halted</b>. Implemented as an infinite loop after disabling both IRQ
  *   and FIQ sources. The ARM state is whatever the processor was running when
  *   @p chSysHalt() was invoked.
- *
+ * .
  * @section ARM7_NOTES The ARM7 port notes
  * The ARM7 port makes some assumptions on the application code organization:
  * - The @p main() function is invoked in system mode.
@@ -90,7 +90,7 @@
  * - FIQ sources can preempt the kernel (by design) so it is not possible to
  *   invoke the kernel APIs from inside a FIQ handler. FIQ handlers are not
  *   affected by the kernel activity so there is not added jitter.
- *
+ * .
  * @section ARM7_IH ARM7 Interrupt Handlers
  * ARM7 Interrupt handlers do not save function-saved registers so you need to
  * make sure your code saves them or does not use them (this happens
@@ -138,7 +138,7 @@
  *   can trim this down by defining the macro externally. This would save
  *   some valuable RAM space for each thread present in the system.<br>
  *   The default value is set into <b>./ports/ARM7/chcore.h</b>.
- *
+ * .
  * @ingroup ARM7
  */
 

ports/ARMCM3/port.dox

@@ -60,7 +60,7 @@
  * - <b>Halted</b>. Implemented as an infinite loop after globally masking all
  *   the maskable interrupt sources. The ARM state is whatever the processor
  *   was running when @p chSysHalt() was invoked.
- *
+ * .
  * @section ARMCM3_NOTES The ARM Cortex-M3 port notes
  * The ARM Cortex-M3 port is organized as follow:
  * - The @p main() function is invoked in thread-privileged mode.
@@ -78,7 +78,7 @@
  *   It is possible to share the SVC handler at the cost of slower context
  *   switching.
  * - The PendSV vector is internally used for preemption context switching.
- *
+ * .
  * @ingroup Ports
  */
 
@@ -107,7 +107,7 @@
  *   instruction from within the idle loop. This is defaulted to 0 because
  *   it can create problems with some debuggers. Setting this option to 1
  *   reduces the system power requirements.
- *
+ * .
  * @ingroup ARMCM3
  */
 

ports/AVR/port.dox

@@ -19,7 +19,6 @@
 
 /**
  * @defgroup AVR MegaAVR
- * @{
  * @details AVR port details. This section how the ChibiOS/RT features are
  * implemented on this architecture.
  *
@@ -44,20 +43,18 @@
  * - <b>Serving Fast Interrupt</b>. Not present in this architecture.
  * - <b>Serving Non-Maskable Interrupt</b>. Not present in this architecture.
  * - <b>Halted</b>. Implemented as an infinite loop with interrupts disabled.
- *
+ * .
  * @section AVR_NOTES The AVR port notes
  * - The AVR does not have a dedicated interrupt stack, make sure to reserve
  *   enough stack space for interrupts in each thread stack. This can be done
  *   by modifying the @p INT_REQUIRED_STACK macro into
  *   <b>./ports/AVR/chcore.h</b>.
- *
+ * .
  * @ingroup Ports
  */
-/** @} */
 
 /**
  * @defgroup AVR_CONF Configuration Options
- * @{
  * @brief AVR Configuration Options.
  * @details The AVR port allows some architecture-specific configurations
  * settingsthat can be specified externally, as example on the compiler
@@ -67,14 +64,12 @@
  *   The default for this value is @p 32, this space is allocated for each
  *   thread so be careful in order to not waste precious RAM space.<br>
  *   The default value is set into <b>./ports/AVR/chcore.h</b>.
- *
+ * .
  * @ingroup AVR
  */
-/** @} */
 
 /**
  * @defgroup AVR_CORE AVR Core Implementation
- * @{
  * @brief AVR specific port code, structures and macros.
  *
  * @ingroup AVR
@@ -82,24 +77,19 @@
  * @file ports/AVR/chcore.h Port related structures and macros.
  * @file ports/AVR/chcore.c Port related code.
  */
-/** @} */
 
 /**
  * @defgroup AVR_DRIVERS AVR Drivers
- * @{
  * @brief Device drivers included in the AVR support.
  *
  * @ingroup AVR
  */
-/** @} */
 
 /**
  * @defgroup AVR_SERIAL USART Support
- * @{
  * @brief USART support.
  * @details The serial driver supports both the AVR USARTs in asynchronous
  * mode.
  *
  * @ingroup AVR_DRIVERS
  */
-/** @} */

ports/MSP430/port.dox

@@ -43,7 +43,7 @@
  * - <b>Serving Non-Maskable Interrupt</b>. The MSP430 has several non
  *   maskable interrupt sources that can be associated to this state.
  * - <b>Halted</b>. Implemented as an infinite loop with interrupts disabled.
- *
+ * .
  * @section MSP430_NOTES The MSP430 port notes
  * - The MSP430 does not have a dedicated interrupt stack, make sure to reserve
  *     enough stack space for interrupts in each thread stack. This can be done
@@ -55,7 +55,7 @@
  *   idle thread because the MSP430 has several low power modes. You can
  *   select the proper low power mode for you application by defining the
  *   macro @p port_wait_for_interrupt().
- *
+ * .
  * @ingroup Ports
  */
 
@@ -70,7 +70,7 @@
  *   The default for this value is @p 32, this space is allocated for each
  *   thread so be careful in order to not waste precious RAM space.<br>
  *   The default value is set into <b>./ports/MSP430/chcore.h</b>.
- *
+ * .
  * @ingroup MSP430
  */