From f87e32d85c6fc2b400c4dc8db15af1cb4c626907 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 20 Feb 2008 16:29:27 +0000 Subject: [PATCH] git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@197 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- demos/ARM7-AT91SAM7X-GCC/Makefile | 2 +- demos/ARM7-AT91SAM7X-GCC/board.c | 28 ++-- demos/ARM7-AT91SAM7X-GCC/main.c | 8 +- ports/ARM7-AT91SAM7X/GCC/sam7x_serial.c | 180 ++++++++++++++++++++++++ ports/ARM7-AT91SAM7X/GCC/sam7x_serial.h | 42 ++++++ 5 files changed, 248 insertions(+), 12 deletions(-) create mode 100644 ports/ARM7-AT91SAM7X/GCC/sam7x_serial.c create mode 100644 ports/ARM7-AT91SAM7X/GCC/sam7x_serial.h diff --git a/demos/ARM7-AT91SAM7X-GCC/Makefile b/demos/ARM7-AT91SAM7X-GCC/Makefile index 737752687..b5768f619 100644 --- a/demos/ARM7-AT91SAM7X-GCC/Makefile +++ b/demos/ARM7-AT91SAM7X-GCC/Makefile @@ -62,7 +62,7 @@ UDEFS = UADEFS = # List ARM-mode C source files here -ASRC = ../../ports/ARM7-AT91SAM7X/GCC/chcore.c \ +ASRC = ../../ports/ARM7-AT91SAM7X/GCC/chcore.c ../../ports\ARM7-AT91SAM7X\GCC\sam7x_serial.c \ ../../src/chinit.c ../../src/chdebug.c ../../src/chlists.c ../../src/chdelta.c \ ../../src/chschd.c ../../src/chthreads.c ../../src/chsem.c ../../src/chmtx.c \ ../../src/chevents.c ../../src/chmsg.c ../../src/chsleep.c ../../src/chqueues.c \ diff --git a/demos/ARM7-AT91SAM7X-GCC/board.c b/demos/ARM7-AT91SAM7X-GCC/board.c index aef835ffa..4231780bf 100644 --- a/demos/ARM7-AT91SAM7X-GCC/board.c +++ b/demos/ARM7-AT91SAM7X-GCC/board.c @@ -20,6 +20,7 @@ #include #include "board.h" +#include "sam7x_serial.h" #include "at91lib/aic.h" extern void FiqHandler(void); @@ -39,7 +40,6 @@ static void SYSIrqHandler(void) { chSysIRQEnterI(); if (AT91C_BASE_PITC->PITC_PISR & AT91C_PITC_PITS) { -// AT91C_BASE_PIOB->PIO_SODR = PIOB_LCD_BL; // LCD on. chSysTimerHandlerI(); (void) AT91C_BASE_PITC->PITC_PIVR; } @@ -90,9 +90,9 @@ void hwinit(void) { /* * I/O setup, enable clocks, initially all pins are inputs with pullups. */ - AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_PIOA) | (1 << AT91C_ID_PIOB); - AT91C_BASE_PIOA->PIO_PER = 0xFFFFFFFF; - AT91C_BASE_PIOB->PIO_PER = 0xFFFFFFFF; + AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_PIOA) | (1 << AT91C_ID_PIOB); + AT91C_BASE_PIOA->PIO_PER = 0xFFFFFFFF; + AT91C_BASE_PIOB->PIO_PER = 0xFFFFFFFF; /* * Default AIC setup, the device drivers will modify it as needed. @@ -110,30 +110,38 @@ void hwinit(void) { */ AT91C_BASE_PIOB->PIO_CODR = PIOB_LCD_BL; // Set to low. AT91C_BASE_PIOB->PIO_OER = PIOB_LCD_BL; // Configure as output. - AT91C_BASE_SYS->PIOA_PPUDR = PIOB_LCD_BL; // Disable internal pullup resistor. + AT91C_BASE_PIOA->PIO_PPUDR = PIOB_LCD_BL; // Disable internal pullup resistor. AT91C_BASE_PIOA->PIO_SODR = PIOA_LCD_RESET; // Set to high. AT91C_BASE_PIOA->PIO_OER = PIOA_LCD_RESET; // Configure as output. - AT91C_BASE_SYS->PIOB_PPUDR = PIOA_LCD_RESET; // Disable internal pullup resistor. + AT91C_BASE_PIOA->PIO_PPUDR = PIOA_LCD_RESET; // Disable internal pullup resistor. /* * Joystick and buttons, disable pullups, already inputs. */ - AT91C_BASE_SYS->PIOA_PPUDR = PIOA_B1 | PIOA_B2 | PIOA_B3 | PIOA_B4 | PIOA_B5; - AT91C_BASE_SYS->PIOB_PPUDR = PIOB_SW1 | PIOB_SW2; + AT91C_BASE_PIOA->PIO_PPUDR = PIOA_B1 | PIOA_B2 | PIOA_B3 | PIOA_B4 | PIOA_B5; + AT91C_BASE_PIOB->PIO_PPUDR = PIOB_SW1 | PIOB_SW2; /* * MMC/SD slot, disable pullups, already inputs. */ - AT91C_BASE_SYS->PIOB_PPUDR = PIOB_MMC_WP | PIOB_MMC_CP; + AT91C_BASE_SYS->PIOB_PPUDR = PIOB_MMC_WP | PIOB_MMC_CP; /* * PIT Initialization. */ AIC_ConfigureIT(AT91C_ID_SYS, - AT91C_AIC_SRCTYPE_POSITIVE_EDGE | (AT91C_AIC_PRIOR_HIGHEST -1), + AT91C_AIC_SRCTYPE_HIGH_LEVEL | (AT91C_AIC_PRIOR_HIGHEST - 1), SYSIrqHandler); AIC_EnableIT(AT91C_ID_SYS); AT91C_BASE_PITC->PITC_PIMR = (MCK / 16 / CH_FREQUENCY) - 1; AT91C_BASE_PITC->PITC_PIMR |= AT91C_PITC_PITEN | AT91C_PITC_PITIEN; + + /* + * Serial driver initialization, RTS/CTS pins enabled for USART0 only. + */ + InitSerial(AT91C_AIC_PRIOR_HIGHEST - 2, AT91C_AIC_PRIOR_HIGHEST - 2); + AT91C_BASE_PIOA->PIO_PDR = AT91C_PA3_RTS0 | AT91C_PA4_CTS0; + AT91C_BASE_PIOA->PIO_ASR = AT91C_PIO_PA3 | AT91C_PIO_PA4; + AT91C_BASE_PIOA->PIO_PPUDR = AT91C_PIO_PA3 | AT91C_PIO_PA4; } diff --git a/demos/ARM7-AT91SAM7X-GCC/main.c b/demos/ARM7-AT91SAM7X-GCC/main.c index 80eab874e..67031c421 100644 --- a/demos/ARM7-AT91SAM7X-GCC/main.c +++ b/demos/ARM7-AT91SAM7X-GCC/main.c @@ -20,6 +20,7 @@ #include #include "board.h" +#include "sam7x_serial.h" static WorkingArea(waThread1, 64); static t_msg Thread1(void *arg) { @@ -37,6 +38,7 @@ static t_msg Thread1(void *arg) { * Entry point, the interrupts are disabled on entry. */ int main(int argc, char **argv) { + t_msg TestThread(void *p); /* * The main() function becomes a thread here then the interrupts are @@ -47,7 +49,11 @@ int main(int argc, char **argv) { chThdCreate(NORMALPRIO, 0, waThread1, sizeof(waThread1), Thread1, NULL); while (TRUE) { - chThdSleep(1000); + chThdSleep(500); + if (!(AT91C_BASE_PIOB->PIO_PDSR & PIOB_SW1)) + chFDDWrite(&COM1, (BYTE8 *)"Hello World!\r\n", 14); + if (!(AT91C_BASE_PIOB->PIO_PDSR & PIOB_SW2)) + TestThread(&COM1); } return 0; diff --git a/ports/ARM7-AT91SAM7X/GCC/sam7x_serial.c b/ports/ARM7-AT91SAM7X/GCC/sam7x_serial.c new file mode 100644 index 000000000..e7a882cb7 --- /dev/null +++ b/ports/ARM7-AT91SAM7X/GCC/sam7x_serial.c @@ -0,0 +1,180 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include + +#include "board.h" +#include "sam7x_serial.h" +#include "at91lib/aic.h" + +FullDuplexDriver COM1; +BYTE8 ib1[SERIAL_BUFFERS_SIZE]; +BYTE8 ob1[SERIAL_BUFFERS_SIZE]; + +FullDuplexDriver COM2; +BYTE8 ib2[SERIAL_BUFFERS_SIZE]; +BYTE8 ob2[SERIAL_BUFFERS_SIZE]; + +static void SetError(AT91_REG csr, FullDuplexDriver *com) { + UWORD16 sts = 0; + + if (csr & AT91C_US_OVRE) + sts |= SD_OVERRUN_ERROR; + if (csr & AT91C_US_PARE) + sts |= SD_PARITY_ERROR; + if (csr & AT91C_US_FRAME) + sts |= SD_FRAMING_ERROR; + if (csr & AT91C_US_RXBRK) + sts |= SD_BREAK_DETECTED; + chFDDAddFlagsI(com, sts); +} + +/* + * Tries hard to clear all the pending interrupt sources, we dont want to + * go through the whole ISR and have another interrupt soon after. + */ +static void ServeInterrupt(AT91PS_USART u, FullDuplexDriver *com) { + + while (u->US_CSR & u->US_IMR) { + + if (u->US_CSR & AT91C_US_RXRDY) { + chFDDIncomingDataI(com, u->US_RHR); + } + else if (u->US_CSR & AT91C_US_TXRDY) { + t_msg b = chFDDRequestDataI(com); + if (b < Q_OK) + u->US_IDR = AT91C_US_TXRDY; + else + u->US_THR = b; + } + else { + SetError(u->US_CSR, com); + u->US_CR = AT91C_US_RSTSTA; + } + } +} + +__attribute__((naked, weak)) +void USART0IrqHandler(void) { + + chSysIRQEnterI(); + + ServeInterrupt(AT91C_BASE_US0, &COM1); + + chSysIRQExitI(); +} + +__attribute__((naked, weak)) +void USART1IrqHandler(void) { + + chSysIRQEnterI(); + + ServeInterrupt(AT91C_BASE_US1, &COM2); + + chSysIRQExitI(); +} + +/* + * Invoked by the high driver when one or more bytes are inserted in the + * output queue. + */ +static void OutNotify1(void) { + + AT91C_BASE_US0->US_IER = AT91C_US_TXRDY; +} + +/* + * Invoked by the high driver when one or more bytes are inserted in the + * output queue. + */ +static void OutNotify2(void) { + + AT91C_BASE_US1->US_IER = AT91C_US_TXRDY; +} + +/* + * USART setup, must be invoked with interrupts disabled. + * NOTE: Does not reset I/O queues. + */ +void SetUSARTI(AT91PS_USART u, int speed, int mode) { + + /* Disables IRQ sources and stop operations.*/ + u->US_IDR = 0xFFFFFFFF; + u->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RSTSTA; + + /* New parameters setup.*/ + if (mode & AT91C_US_OVER) + u->US_BRGR = MCK / (speed * 8); + else + u->US_BRGR = MCK / (speed * 16); + u->US_MR = mode; + u->US_RTOR = 0; + u->US_TTGR = 0; + + /* Enables operations and IRQ sources.*/ + u->US_CR = AT91C_US_RXEN | AT91C_US_TXEN | AT91C_US_DTREN | AT91C_US_RTSEN; + u->US_IER = AT91C_US_RXRDY | AT91C_US_OVRE | AT91C_US_FRAME | AT91C_US_PARE | + AT91C_US_RXBRK; +} + +/* + * Serial subsystem initialization. + * NOTE: Handshake pins are not switched to their function because they may have + * another use. Enable them externally if needed. + */ +void InitSerial(int prio0, int prio1) { + + /* I/O queues setup.*/ + chFDDInit(&COM1, ib1, sizeof ib1, NULL, ob1, sizeof ob1, OutNotify1); + chFDDInit(&COM2, ib2, sizeof ib2, NULL, ob2, sizeof ob2, OutNotify2); + + /* Switches the I/O pins to the peripheral function A, disables pullups.*/ + AT91C_BASE_PIOA->PIO_PDR = AT91C_PA0_RXD0 | AT91C_PA1_TXD0 | + AT91C_PA5_RXD1 | AT91C_PA6_TXD1; + AT91C_BASE_PIOA->PIO_ASR = AT91C_PIO_PA0 | AT91C_PIO_PA1 | + AT91C_PIO_PA5 | AT91C_PIO_PA6; + AT91C_BASE_PIOA->PIO_PPUDR = AT91C_PIO_PA0 | AT91C_PIO_PA1 | + AT91C_PIO_PA5 | AT91C_PIO_PA6; + + /* Starts the clock and clears possible sources of immediate interrupts.*/ + AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_US0) | (1 << AT91C_ID_US1); + AT91C_BASE_US0->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RSTSTA; + AT91C_BASE_US1->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RSTSTA; + + /* Interrupts setup.*/ + AIC_ConfigureIT(AT91C_ID_US0, + AT91C_AIC_SRCTYPE_HIGH_LEVEL | prio0, + USART0IrqHandler); + AIC_EnableIT(AT91C_ID_US0); + AIC_ConfigureIT(AT91C_ID_US1, + AT91C_AIC_SRCTYPE_HIGH_LEVEL | prio1, + USART1IrqHandler); + AIC_EnableIT(AT91C_ID_US1); + + SetUSARTI(AT91C_BASE_US0, 38400, AT91C_US_USMODE_NORMAL | + AT91C_US_CLKS_CLOCK | + AT91C_US_CHRL_8_BITS | + AT91C_US_PAR_NONE | + AT91C_US_NBSTOP_1_BIT); + SetUSARTI(AT91C_BASE_US1, 38400, AT91C_US_USMODE_NORMAL | + AT91C_US_CLKS_CLOCK | + AT91C_US_CHRL_8_BITS | + AT91C_US_PAR_NONE | + AT91C_US_NBSTOP_1_BIT); +} diff --git a/ports/ARM7-AT91SAM7X/GCC/sam7x_serial.h b/ports/ARM7-AT91SAM7X/GCC/sam7x_serial.h new file mode 100644 index 000000000..396aaeaf1 --- /dev/null +++ b/ports/ARM7-AT91SAM7X/GCC/sam7x_serial.h @@ -0,0 +1,42 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#ifndef _SAM7X_SERIAL_H_ +#define _SAM7X_SERIAL_H_ + +/* + * Configuration parameter, you can change the depth of the queue buffers + * depending on the requirements of your application. + */ +#define SERIAL_BUFFERS_SIZE 128 + +#ifdef __cplusplus +} +#endif + void InitSerial(int prio0, int prio1); + void UART0IrqHandler(void); + void UART1IrqHandler(void); + void SetUSARTI(AT91PS_USART u, int speed, int mode); +#ifdef __cplusplus +} +#endif + +extern FullDuplexDriver COM1, COM2; + +#endif /* _SAM7X_SERIAL_H_ */