Tick-less mode support for RP.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14102 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
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@ -52,7 +52,7 @@
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* setting also defines the system tick time unit.
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* setting also defines the system tick time unit.
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*/
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*/
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#if !defined(CH_CFG_ST_FREQUENCY)
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#if !defined(CH_CFG_ST_FREQUENCY)
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#define CH_CFG_ST_FREQUENCY 1000
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#define CH_CFG_ST_FREQUENCY 1000000
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#endif
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#endif
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/**
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/**
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@ -80,7 +80,7 @@
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* this value.
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* this value.
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*/
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*/
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#if !defined(CH_CFG_ST_TIMEDELTA)
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#if !defined(CH_CFG_ST_TIMEDELTA)
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#define CH_CFG_ST_TIMEDELTA 0
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#define CH_CFG_ST_TIMEDELTA 20
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#endif
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#endif
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/** @} */
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/** @} */
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@ -0,0 +1,551 @@
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/*
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ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file templates/halconf.h
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* @brief HAL configuration header.
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* @details HAL configuration file, this file allows to enable or disable the
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* various device drivers from your application. You may also use
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* this file in order to override the device drivers default settings.
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*
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* @addtogroup HAL_CONF
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* @{
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*/
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#ifndef HALCONF_H
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#define HALCONF_H
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#define _CHIBIOS_HAL_CONF_
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#define _CHIBIOS_HAL_CONF_VER_7_1_
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#include "mcuconf.h"
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/**
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* @brief Enables the PAL subsystem.
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*/
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#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
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#define HAL_USE_PAL TRUE
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#endif
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/**
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* @brief Enables the ADC subsystem.
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*/
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#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
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#define HAL_USE_ADC FALSE
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#endif
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/**
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* @brief Enables the CAN subsystem.
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*/
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#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
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#define HAL_USE_CAN FALSE
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#endif
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/**
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* @brief Enables the cryptographic subsystem.
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*/
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#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
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#define HAL_USE_CRY FALSE
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#endif
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/**
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* @brief Enables the DAC subsystem.
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*/
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#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
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#define HAL_USE_DAC FALSE
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#endif
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/**
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* @brief Enables the EFlash subsystem.
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*/
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#if !defined(HAL_USE_EFL) || defined(__DOXYGEN__)
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#define HAL_USE_EFL FALSE
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#endif
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/**
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* @brief Enables the GPT subsystem.
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*/
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#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
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#define HAL_USE_GPT FALSE
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#endif
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/**
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* @brief Enables the I2C subsystem.
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*/
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#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
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#define HAL_USE_I2C FALSE
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#endif
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/**
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* @brief Enables the I2S subsystem.
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*/
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#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
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#define HAL_USE_I2S FALSE
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#endif
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/**
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* @brief Enables the ICU subsystem.
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*/
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#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
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#define HAL_USE_ICU FALSE
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#endif
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/**
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* @brief Enables the MAC subsystem.
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*/
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#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
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#define HAL_USE_MAC FALSE
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#endif
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/**
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* @brief Enables the MMC_SPI subsystem.
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*/
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#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
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#define HAL_USE_MMC_SPI FALSE
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#endif
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/**
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* @brief Enables the PWM subsystem.
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*/
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#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
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#define HAL_USE_PWM FALSE
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#endif
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/**
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* @brief Enables the RTC subsystem.
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*/
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#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
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#define HAL_USE_RTC FALSE
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#endif
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/**
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* @brief Enables the SDC subsystem.
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*/
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#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
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#define HAL_USE_SDC FALSE
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#endif
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/**
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* @brief Enables the SERIAL subsystem.
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*/
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#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
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#define HAL_USE_SERIAL FALSE
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#endif
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/**
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* @brief Enables the SERIAL over USB subsystem.
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*/
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#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
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#define HAL_USE_SERIAL_USB FALSE
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#endif
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/**
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* @brief Enables the SIO subsystem.
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*/
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#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__)
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#define HAL_USE_SIO TRUE
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#endif
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/**
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* @brief Enables the SPI subsystem.
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*/
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#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
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#define HAL_USE_SPI FALSE
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#endif
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/**
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* @brief Enables the TRNG subsystem.
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*/
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#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__)
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#define HAL_USE_TRNG FALSE
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#endif
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/**
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* @brief Enables the UART subsystem.
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*/
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#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
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#define HAL_USE_UART FALSE
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#endif
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/**
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* @brief Enables the USB subsystem.
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*/
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#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
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#define HAL_USE_USB FALSE
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#endif
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/**
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* @brief Enables the WDG subsystem.
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*/
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#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
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#define HAL_USE_WDG FALSE
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#endif
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/**
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* @brief Enables the WSPI subsystem.
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*/
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#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__)
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#define HAL_USE_WSPI FALSE
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#endif
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/*===========================================================================*/
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/* PAL driver related settings. */
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/*===========================================================================*/
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/**
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* @brief Enables synchronous APIs.
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* @note Disabling this option saves both code and data space.
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*/
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#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)
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#define PAL_USE_CALLBACKS FALSE
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#endif
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/**
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* @brief Enables synchronous APIs.
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* @note Disabling this option saves both code and data space.
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*/
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#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
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#define PAL_USE_WAIT FALSE
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#endif
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/*===========================================================================*/
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/* ADC driver related settings. */
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/*===========================================================================*/
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/**
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* @brief Enables synchronous APIs.
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* @note Disabling this option saves both code and data space.
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*/
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#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
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#define ADC_USE_WAIT TRUE
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#endif
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/**
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* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
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* @note Disabling this option saves both code and data space.
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*/
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#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
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#define ADC_USE_MUTUAL_EXCLUSION TRUE
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#endif
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/*===========================================================================*/
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/* CAN driver related settings. */
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/*===========================================================================*/
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/**
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* @brief Sleep mode related APIs inclusion switch.
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*/
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#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
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#define CAN_USE_SLEEP_MODE TRUE
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#endif
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/**
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* @brief Enforces the driver to use direct callbacks rather than OSAL events.
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*/
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#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__)
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#define CAN_ENFORCE_USE_CALLBACKS FALSE
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#endif
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/*===========================================================================*/
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/* CRY driver related settings. */
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/*===========================================================================*/
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/**
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* @brief Enables the SW fall-back of the cryptographic driver.
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* @details When enabled, this option, activates a fall-back software
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* implementation for algorithms not supported by the underlying
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* hardware.
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* @note Fall-back implementations may not be present for all algorithms.
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*/
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#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
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#define HAL_CRY_USE_FALLBACK FALSE
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#endif
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/**
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* @brief Makes the driver forcibly use the fall-back implementations.
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*/
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#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
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#define HAL_CRY_ENFORCE_FALLBACK FALSE
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#endif
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/*===========================================================================*/
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/* DAC driver related settings. */
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/*===========================================================================*/
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/**
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* @brief Enables synchronous APIs.
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* @note Disabling this option saves both code and data space.
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*/
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#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__)
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#define DAC_USE_WAIT TRUE
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#endif
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/**
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* @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs.
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* @note Disabling this option saves both code and data space.
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*/
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#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
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#define DAC_USE_MUTUAL_EXCLUSION TRUE
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#endif
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/*===========================================================================*/
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/* I2C driver related settings. */
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/*===========================================================================*/
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/**
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* @brief Enables the mutual exclusion APIs on the I2C bus.
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*/
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#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
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#define I2C_USE_MUTUAL_EXCLUSION TRUE
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#endif
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/*===========================================================================*/
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/* MAC driver related settings. */
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/*===========================================================================*/
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/**
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* @brief Enables the zero-copy API.
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*/
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#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
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#define MAC_USE_ZERO_COPY FALSE
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#endif
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/**
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* @brief Enables an event sources for incoming packets.
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*/
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#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
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#define MAC_USE_EVENTS TRUE
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#endif
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/*===========================================================================*/
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/* MMC_SPI driver related settings. */
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/*===========================================================================*/
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/**
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* @brief Delays insertions.
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* @details If enabled this options inserts delays into the MMC waiting
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* routines releasing some extra CPU time for the threads with
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* lower priority, this may slow down the driver a bit however.
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* This option is recommended also if the SPI driver does not
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* use a DMA channel and heavily loads the CPU.
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*/
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#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
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#define MMC_NICE_WAITING TRUE
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#endif
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/*===========================================================================*/
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/* SDC driver related settings. */
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/*===========================================================================*/
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/**
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* @brief Number of initialization attempts before rejecting the card.
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* @note Attempts are performed at 10mS intervals.
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*/
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#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
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#define SDC_INIT_RETRY 100
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#endif
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/**
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* @brief Include support for MMC cards.
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* @note MMC support is not yet implemented so this option must be kept
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* at @p FALSE.
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*/
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#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
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#define SDC_MMC_SUPPORT FALSE
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#endif
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/**
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* @brief Delays insertions.
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* @details If enabled this options inserts delays into the MMC waiting
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* routines releasing some extra CPU time for the threads with
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* lower priority, this may slow down the driver a bit however.
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*/
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#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
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#define SDC_NICE_WAITING TRUE
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#endif
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/**
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* @brief OCR initialization constant for V20 cards.
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*/
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#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__)
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#define SDC_INIT_OCR_V20 0x50FF8000U
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#endif
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/**
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* @brief OCR initialization constant for non-V20 cards.
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*/
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#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__)
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#define SDC_INIT_OCR 0x80100000U
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#endif
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/*===========================================================================*/
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/* SERIAL driver related settings. */
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/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Default bit rate.
|
||||||
|
* @details Configuration parameter, this is the baud rate selected for the
|
||||||
|
* default configuration.
|
||||||
|
*/
|
||||||
|
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
|
||||||
|
#define SERIAL_DEFAULT_BITRATE 38400
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Serial buffers size.
|
||||||
|
* @details Configuration parameter, you can change the depth of the queue
|
||||||
|
* buffers depending on the requirements of your application.
|
||||||
|
* @note The default is 16 bytes for both the transmission and receive
|
||||||
|
* buffers.
|
||||||
|
*/
|
||||||
|
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||||
|
#define SERIAL_BUFFERS_SIZE 16
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* SIO driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Default bit rate.
|
||||||
|
* @details Configuration parameter, this is the baud rate selected for the
|
||||||
|
* default configuration.
|
||||||
|
*/
|
||||||
|
#if !defined(SIO_DEFAULT_BITRATE) || defined(__DOXYGEN__)
|
||||||
|
#define SIO_DEFAULT_BITRATE 115200
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Support for thread synchronization API.
|
||||||
|
*/
|
||||||
|
#if !defined(SIO_USE_SYNCHRONIZATION) || defined(__DOXYGEN__)
|
||||||
|
#define SIO_USE_SYNCHRONIZATION TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* SERIAL_USB driver related setting. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Serial over USB buffers size.
|
||||||
|
* @details Configuration parameter, the buffer size must be a multiple of
|
||||||
|
* the USB data endpoint maximum packet size.
|
||||||
|
* @note The default is 256 bytes for both the transmission and receive
|
||||||
|
* buffers.
|
||||||
|
*/
|
||||||
|
#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||||
|
#define SERIAL_USB_BUFFERS_SIZE 256
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Serial over USB number of buffers.
|
||||||
|
* @note The default is 2 buffers.
|
||||||
|
*/
|
||||||
|
#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
|
||||||
|
#define SERIAL_USB_BUFFERS_NUMBER 2
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* SPI driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables synchronous APIs.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
|
||||||
|
#define SPI_USE_WAIT TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables circular transfers APIs.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__)
|
||||||
|
#define SPI_USE_CIRCULAR FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||||
|
#define SPI_USE_MUTUAL_EXCLUSION TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Handling method for SPI CS line.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__)
|
||||||
|
#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* UART driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables synchronous APIs.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
|
||||||
|
#define UART_USE_WAIT FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||||
|
#define UART_USE_MUTUAL_EXCLUSION FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* USB driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables synchronous APIs.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
|
||||||
|
#define USB_USE_WAIT FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* WSPI driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables synchronous APIs.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__)
|
||||||
|
#define WSPI_USE_WAIT TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||||
|
#define WSPI_USE_MUTUAL_EXCLUSION TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* HALCONF_H */
|
||||||
|
|
||||||
|
/** @} */
|
|
@ -0,0 +1,48 @@
|
||||||
|
/*
|
||||||
|
ChibiOS - Copyright (C) 2006..2021 Giovanni Di Sirio
|
||||||
|
|
||||||
|
Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
|
you may not use this file except in compliance with the License.
|
||||||
|
You may obtain a copy of the License at
|
||||||
|
|
||||||
|
http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
|
||||||
|
Unless required by applicable law or agreed to in writing, software
|
||||||
|
distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
See the License for the specific language governing permissions and
|
||||||
|
limitations under the License.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef MCUCONF_H
|
||||||
|
#define MCUCONF_H
|
||||||
|
|
||||||
|
/*
|
||||||
|
* RP2040_MCUCONF drivers configuration.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define RP2040_MCUCONF
|
||||||
|
|
||||||
|
/*
|
||||||
|
* HAL driver system settings.
|
||||||
|
*/
|
||||||
|
#define RP_NO_INIT FALSE
|
||||||
|
|
||||||
|
/*
|
||||||
|
* IRQ system settings.
|
||||||
|
*/
|
||||||
|
#define RP_IRQ_SYSTICK_PRIORITY 2
|
||||||
|
#define RP_IRQ_TIMER_ALARM0_PRIORITY 2
|
||||||
|
#define RP_IRQ_TIMER_ALARM1_PRIORITY 2
|
||||||
|
#define RP_IRQ_TIMER_ALARM2_PRIORITY 2
|
||||||
|
#define RP_IRQ_TIMER_ALARM3_PRIORITY 2
|
||||||
|
#define RP_IRQ_UART0_PRIORITY 3
|
||||||
|
#define RP_IRQ_UART1_PRIORITY 3
|
||||||
|
|
||||||
|
/*
|
||||||
|
* SIO driver system settings.
|
||||||
|
*/
|
||||||
|
#define RP_SIO_USE_UART0 TRUE
|
||||||
|
#define RP_SIO_USE_UART1 TRUE
|
||||||
|
|
||||||
|
#endif /* MCUCONF_H */
|
|
@ -186,10 +186,7 @@ typedef struct {
|
||||||
__IO uint32_t TIMELW;
|
__IO uint32_t TIMELW;
|
||||||
__I uint32_t TIMEHR;
|
__I uint32_t TIMEHR;
|
||||||
__I uint32_t TIMELR;
|
__I uint32_t TIMELR;
|
||||||
__IO uint32_t ALARM0;
|
__IO uint32_t ALARM[4];
|
||||||
__IO uint32_t ALARM1;
|
|
||||||
__IO uint32_t ALARM2;
|
|
||||||
__IO uint32_t ALARM3;
|
|
||||||
__IO uint32_t ARMED;
|
__IO uint32_t ARMED;
|
||||||
__I uint32_t TIMERAWH;
|
__I uint32_t TIMERAWH;
|
||||||
__I uint32_t TIMERAWL;
|
__I uint32_t TIMERAWL;
|
||||||
|
|
|
@ -31,6 +31,7 @@
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
|
||||||
#if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING
|
#if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING
|
||||||
|
#define ST_HANDLER SysTick_Handler
|
||||||
#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */
|
#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */
|
||||||
|
|
||||||
#if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC
|
#if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC
|
||||||
|
@ -57,13 +58,34 @@
|
||||||
/* Driver interrupt handlers. */
|
/* Driver interrupt handlers. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
#if (OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC) || defined(__DOXYGEN__)
|
||||||
#if !defined(ST_SYSTICK_SUPPRESS_ISR)
|
#if !defined(ST_SYSTICK_SUPPRESS_ISR)
|
||||||
/**
|
/**
|
||||||
* @brief Interrupt handler.
|
* @brief SysTick interrupt handler.
|
||||||
*
|
*
|
||||||
* @isr
|
* @isr
|
||||||
*/
|
*/
|
||||||
OSAL_IRQ_HANDLER(ST_HANDLER) {
|
OSAL_IRQ_HANDLER(SysTick_Handler) {
|
||||||
|
|
||||||
|
OSAL_IRQ_PROLOGUE();
|
||||||
|
|
||||||
|
osalSysLockFromISR();
|
||||||
|
osalOsTimerHandlerI();
|
||||||
|
osalSysUnlockFromISR();
|
||||||
|
|
||||||
|
OSAL_IRQ_EPILOGUE();
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */
|
||||||
|
|
||||||
|
#if (OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING) || defined(__DOXYGEN__)
|
||||||
|
#if !defined(ST_TIMER_ALARM0_SUPPRESS_ISR)
|
||||||
|
/**
|
||||||
|
* @brief TIMER alarm 0 interrupt handler.
|
||||||
|
*
|
||||||
|
* @isr
|
||||||
|
*/
|
||||||
|
OSAL_IRQ_HANDLER(RP_TIMER_IRQ0_HANDLER) {
|
||||||
|
|
||||||
OSAL_IRQ_PROLOGUE();
|
OSAL_IRQ_PROLOGUE();
|
||||||
|
|
||||||
|
@ -73,6 +95,56 @@ OSAL_IRQ_HANDLER(ST_HANDLER) {
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if !defined(ST_TIMER_ALARM1_SUPPRESS_ISR)
|
||||||
|
/**
|
||||||
|
* @brief TIMER alarm 1 interrupt handler.
|
||||||
|
*
|
||||||
|
* @isr
|
||||||
|
*/
|
||||||
|
OSAL_IRQ_HANDLER(RP_TIMER_IRQ1_HANDLER) {
|
||||||
|
|
||||||
|
OSAL_IRQ_PROLOGUE();
|
||||||
|
|
||||||
|
st_lld_serve_interrupt();
|
||||||
|
|
||||||
|
OSAL_IRQ_EPILOGUE();
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(ST_TIMER_ALARM2_SUPPRESS_ISR)
|
||||||
|
/**
|
||||||
|
* @brief TIMER alarm 2 interrupt handler.
|
||||||
|
*
|
||||||
|
* @isr
|
||||||
|
*/
|
||||||
|
OSAL_IRQ_HANDLER(RP_TIMER_IRQ2_HANDLER) {
|
||||||
|
|
||||||
|
OSAL_IRQ_PROLOGUE();
|
||||||
|
|
||||||
|
st_lld_serve_interrupt();
|
||||||
|
|
||||||
|
OSAL_IRQ_EPILOGUE();
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(ST_TIMER_ALARM3_SUPPRESS_ISR)
|
||||||
|
/**
|
||||||
|
* @brief TIMER alarm 3 interrupt handler.
|
||||||
|
*
|
||||||
|
* @isr
|
||||||
|
*/
|
||||||
|
OSAL_IRQ_HANDLER(RP_TIMER_IRQ3_HANDLER) {
|
||||||
|
|
||||||
|
OSAL_IRQ_PROLOGUE();
|
||||||
|
|
||||||
|
st_lld_serve_interrupt();
|
||||||
|
|
||||||
|
OSAL_IRQ_EPILOGUE();
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */
|
||||||
|
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
/* Driver exported functions. */
|
/* Driver exported functions. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
@ -83,14 +155,40 @@ OSAL_IRQ_HANDLER(ST_HANDLER) {
|
||||||
* @notapi
|
* @notapi
|
||||||
*/
|
*/
|
||||||
void st_lld_init(void) {
|
void st_lld_init(void) {
|
||||||
uint32_t timer_clk;
|
|
||||||
|
|
||||||
#if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING
|
#if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING
|
||||||
|
/* The timer need to stop during debug or the virtual timers list would
|
||||||
|
go out of sync.*/
|
||||||
|
TIMER->DBGPAUSE = TIMER_DBGPAUSE_DBG0 | TIMER_DBGPAUSE_DBG1;
|
||||||
|
|
||||||
|
/* Comparators and counter initially at zero.*/
|
||||||
|
TIMER->TIMELW = 0U;
|
||||||
|
TIMER->TIMEHW = 0U;
|
||||||
|
TIMER->ALARM[0] = 0U;
|
||||||
|
TIMER->ALARM[1] = 0U;
|
||||||
|
TIMER->ALARM[2] = 0U;
|
||||||
|
TIMER->ALARM[3] = 0U;
|
||||||
|
TIMER->INTR = TIMER_INTR_ALARM3 | TIMER_INTR_ALARM2 |
|
||||||
|
TIMER_INTR_ALARM1 | TIMER_INTR_ALARM0;
|
||||||
|
|
||||||
|
/* IRQs enabled.*/
|
||||||
|
#if !defined(ST_TIMER_ALARM0_SUPPRESS_ISR)
|
||||||
|
nvicEnableVector(RP_TIMER_IRQ0_NUMBER, RP_IRQ_TIMER_ALARM0_PRIORITY);
|
||||||
|
#endif
|
||||||
|
#if !defined(ST_TIMER_ALARM1_SUPPRESS_ISR)
|
||||||
|
nvicEnableVector(RP_TIMER_IRQ1_NUMBER, RP_IRQ_TIMER_ALARM1_PRIORITY);
|
||||||
|
#endif
|
||||||
|
#if !defined(ST_TIMER_ALARM2_SUPPRESS_ISR)
|
||||||
|
nvicEnableVector(RP_TIMER_IRQ2_NUMBER, RP_IRQ_TIMER_ALARM2_PRIORITY);
|
||||||
|
#endif
|
||||||
|
#if !defined(ST_TIMER_ALARM3_SUPPRESS_ISR)
|
||||||
|
nvicEnableVector(RP_TIMER_IRQ3_NUMBER, RP_IRQ_TIMER_ALARM3_PRIORITY);
|
||||||
|
#endif
|
||||||
|
|
||||||
#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */
|
#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */
|
||||||
|
|
||||||
#if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC
|
#if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC
|
||||||
timer_clk = RP_CORE_CLK;
|
uint32_t timer_clk = RP_CORE_CLK;
|
||||||
|
|
||||||
osalDbgAssert(timer_clk % OSAL_ST_FREQUENCY != 0U,
|
osalDbgAssert(timer_clk % OSAL_ST_FREQUENCY != 0U,
|
||||||
"division remainder");
|
"division remainder");
|
||||||
|
@ -114,18 +212,29 @@ void st_lld_init(void) {
|
||||||
* @brief IRQ handling code.
|
* @brief IRQ handling code.
|
||||||
*/
|
*/
|
||||||
void st_lld_serve_interrupt(void) {
|
void st_lld_serve_interrupt(void) {
|
||||||
|
uint32_t ints;
|
||||||
|
|
||||||
#if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING
|
ints = TIMER->INTS;
|
||||||
|
TIMER->INTR = ints;
|
||||||
|
|
||||||
#endif
|
/* Alarms 0 and 1 are used for system ticks for core 0 and core 1.*/
|
||||||
{
|
if ((ints & (TIMER_INTS_ALARM1 | TIMER_INTS_ALARM0)) != 0U) {
|
||||||
osalSysLockFromISR();
|
osalSysLockFromISR();
|
||||||
osalOsTimerHandlerI();
|
osalOsTimerHandlerI();
|
||||||
osalSysUnlockFromISR();
|
osalSysUnlockFromISR();
|
||||||
}
|
}
|
||||||
#if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING
|
|
||||||
|
|
||||||
#endif
|
if ((ints & TIMER_INTS_ALARM2) != 0U) {
|
||||||
|
if (st_callbacks[0] != NULL) {
|
||||||
|
st_callbacks[0](2U);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if ((ints & TIMER_INTS_ALARM3) != 0U) {
|
||||||
|
if (st_callbacks[1] != NULL) {
|
||||||
|
st_callbacks[1](3U);
|
||||||
|
}
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* OSAL_ST_MODE != OSAL_ST_MODE_NONE */
|
#endif /* OSAL_ST_MODE != OSAL_ST_MODE_NONE */
|
||||||
|
|
|
@ -31,6 +31,16 @@
|
||||||
/* Driver constants. */
|
/* Driver constants. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Number of supported alarms.
|
||||||
|
*/
|
||||||
|
#define ST_LLD_NUM_ALARMS 4U
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Number of supported callbacks.
|
||||||
|
*/
|
||||||
|
#define ST_LLD_NUM_CALLBACKS (ST_LLD_NUM_ALARMS - 2U)
|
||||||
|
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
/* Driver pre-compile time settings. */
|
/* Driver pre-compile time settings. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
@ -43,7 +53,35 @@
|
||||||
* @brief SysTick timer IRQ priority.
|
* @brief SysTick timer IRQ priority.
|
||||||
*/
|
*/
|
||||||
#if !defined(RP_IRQ_SYSTICK_PRIORITY) || defined(__DOXYGEN__)
|
#if !defined(RP_IRQ_SYSTICK_PRIORITY) || defined(__DOXYGEN__)
|
||||||
#define RP_IRQ_SYSTICK_PRIORITY 1
|
#define RP_IRQ_SYSTICK_PRIORITY 2
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief TIMER alarm 0 IRQ priority.
|
||||||
|
*/
|
||||||
|
#if !defined(RP_IRQ_TIMER_ALARM0_PRIORITY) || defined(__DOXYGEN__)
|
||||||
|
#define RP_IRQ_TIMER_ALARM0_PRIORITY 2
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief TIMER alarm 1 IRQ priority.
|
||||||
|
*/
|
||||||
|
#if !defined(RP_IRQ_TIMER_ALARM1_PRIORITY) || defined(__DOXYGEN__)
|
||||||
|
#define RP_IRQ_TIMER_ALARM1_PRIORITY 2
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief TIMER alarm 2 IRQ priority.
|
||||||
|
*/
|
||||||
|
#if !defined(RP_IRQ_TIMER_ALARM2_PRIORITY) || defined(__DOXYGEN__)
|
||||||
|
#define RP_IRQ_TIMER_ALARM2_PRIORITY 2
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief TIMER alarm 3 IRQ priority.
|
||||||
|
*/
|
||||||
|
#if !defined(RP_IRQ_TIMER_ALARM3_PRIORITY) || defined(__DOXYGEN__)
|
||||||
|
#define RP_IRQ_TIMER_ALARM3_PRIORITY 2
|
||||||
#endif
|
#endif
|
||||||
/** @} */
|
/** @} */
|
||||||
|
|
||||||
|
@ -51,19 +89,26 @@
|
||||||
/* Derived constants and error checks. */
|
/* Derived constants and error checks. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
|
||||||
|
#if (OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING) && \
|
||||||
|
(OSAL_ST_RESOLUTION != 32)
|
||||||
|
#error "OSAL_ST_RESOLUTION must be 32 in OSAL_ST_MODE_FREERUNNING mode"
|
||||||
|
#endif
|
||||||
|
|
||||||
#if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING
|
#if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING
|
||||||
|
|
||||||
#define RP_ST_USE_SYSTICK FALSE
|
#define RP_ST_USE_SYSTICK FALSE
|
||||||
|
#define RP_ST_USE_TIMER TRUE
|
||||||
#error "OSAL_ST_MODE_FREERUNNING not yet supported"
|
|
||||||
|
|
||||||
#elif OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC
|
#elif OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC
|
||||||
|
|
||||||
#define RP_ST_USE_SYSTICK TRUE
|
#define RP_ST_USE_SYSTICK TRUE
|
||||||
|
#define RP_ST_USE_TIMER FALSE
|
||||||
|
|
||||||
#else
|
#else
|
||||||
|
|
||||||
#define RP_ST_USE_SYSTICK FALSE
|
#define RP_ST_USE_SYSTICK FALSE
|
||||||
|
#define RP_ST_USE_TIMER FALSE
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
@ -83,7 +128,9 @@
|
||||||
extern "C" {
|
extern "C" {
|
||||||
#endif
|
#endif
|
||||||
void st_lld_init(void);
|
void st_lld_init(void);
|
||||||
|
#if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING
|
||||||
void st_lld_serve_interrupt(void);
|
void st_lld_serve_interrupt(void);
|
||||||
|
#endif
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
@ -92,7 +139,6 @@ extern "C" {
|
||||||
/* Driver inline functions. */
|
/* Driver inline functions. */
|
||||||
/*===========================================================================*/
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
|
||||||
#if (OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING) || defined(__DOXYGEN__)
|
#if (OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING) || defined(__DOXYGEN__)
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -102,8 +148,9 @@ extern "C" {
|
||||||
*
|
*
|
||||||
* @notapi
|
* @notapi
|
||||||
*/
|
*/
|
||||||
static inline systime_t st_lld_get_counter(void) {
|
__STATIC_INLINE systime_t st_lld_get_counter(void) {
|
||||||
|
|
||||||
|
return (systime_t)TIMER->TIMERAWL;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -115,8 +162,11 @@ static inline systime_t st_lld_get_counter(void) {
|
||||||
*
|
*
|
||||||
* @notapi
|
* @notapi
|
||||||
*/
|
*/
|
||||||
static inline void st_lld_start_alarm(systime_t abstime) {
|
__STATIC_INLINE void st_lld_start_alarm(systime_t abstime) {
|
||||||
|
|
||||||
|
TIMER->ALARM[0] = (uint32_t)abstime;
|
||||||
|
TIMER->INTR = (1U << 0);
|
||||||
|
TIMER->INTE |= (1U << 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -124,8 +174,9 @@ static inline void st_lld_start_alarm(systime_t abstime) {
|
||||||
*
|
*
|
||||||
* @notapi
|
* @notapi
|
||||||
*/
|
*/
|
||||||
static inline void st_lld_stop_alarm(void) {
|
__STATIC_INLINE void st_lld_stop_alarm(void) {
|
||||||
|
|
||||||
|
TIMER->INTE &= ~(1U << 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -135,8 +186,9 @@ static inline void st_lld_stop_alarm(void) {
|
||||||
*
|
*
|
||||||
* @notapi
|
* @notapi
|
||||||
*/
|
*/
|
||||||
static inline void st_lld_set_alarm(systime_t abstime) {
|
__STATIC_INLINE void st_lld_set_alarm(systime_t abstime) {
|
||||||
|
|
||||||
|
TIMER->ALARM[0] = (uint32_t)abstime;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -146,8 +198,9 @@ static inline void st_lld_set_alarm(systime_t abstime) {
|
||||||
*
|
*
|
||||||
* @notapi
|
* @notapi
|
||||||
*/
|
*/
|
||||||
static inline systime_t st_lld_get_alarm(void) {
|
__STATIC_INLINE systime_t st_lld_get_alarm(void) {
|
||||||
|
|
||||||
|
return (systime_t)TIMER->ALARM[0];
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -159,10 +212,92 @@ static inline systime_t st_lld_get_alarm(void) {
|
||||||
*
|
*
|
||||||
* @notapi
|
* @notapi
|
||||||
*/
|
*/
|
||||||
static inline bool st_lld_is_alarm_active(void) {
|
__STATIC_INLINE bool st_lld_is_alarm_active(void) {
|
||||||
|
|
||||||
|
return (bool)((TIMER->INTE & (1U << 0)) != 0U);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#if (ST_LLD_NUM_ALARMS > 1) || defined(__DOXYGEN__)
|
||||||
|
/**
|
||||||
|
* @brief Starts an alarm.
|
||||||
|
* @note Makes sure that no spurious alarms are triggered after
|
||||||
|
* this call.
|
||||||
|
* @note This functionality is only available in free running mode, the
|
||||||
|
* behavior in periodic mode is undefined.
|
||||||
|
*
|
||||||
|
* @param[in] abstime the time to be set for the first alarm
|
||||||
|
* @param[in] alarm alarm channel number
|
||||||
|
*
|
||||||
|
* @notapi
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void st_lld_start_alarm_n(unsigned alarm, systime_t abstime) {
|
||||||
|
|
||||||
|
|
||||||
|
TIMER->ALARM[alarm] = (uint32_t)abstime;
|
||||||
|
TIMER->INTR = (1U << alarm);
|
||||||
|
TIMER->INTE |= (1U << alarm);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Stops an alarm interrupt.
|
||||||
|
* @note This functionality is only available in free running mode, the
|
||||||
|
* behavior in periodic mode is undefined.
|
||||||
|
*
|
||||||
|
* @param[in] alarm alarm channel number
|
||||||
|
*
|
||||||
|
* @notapi
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void st_lld_stop_alarm_n(unsigned alarm) {
|
||||||
|
|
||||||
|
TIMER->INTE &= ~(1U << alarm);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Sets an alarm time.
|
||||||
|
* @note This functionality is only available in free running mode, the
|
||||||
|
* behavior in periodic mode is undefined.
|
||||||
|
*
|
||||||
|
* @param[in] alarm alarm channel number
|
||||||
|
* @param[in] abstime the time to be set for the next alarm
|
||||||
|
*
|
||||||
|
* @notapi
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE void st_lld_set_alarm_n(unsigned alarm, systime_t abstime) {
|
||||||
|
|
||||||
|
TIMER->ALARM[alarm] = (uint32_t)abstime;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Returns an alarm current time.
|
||||||
|
* @note This functionality is only available in free running mode, the
|
||||||
|
* behavior in periodic mode is undefined.
|
||||||
|
*
|
||||||
|
* @param[in] alarm alarm channel number
|
||||||
|
* @return The currently set alarm time.
|
||||||
|
*
|
||||||
|
* @notapi
|
||||||
|
*/
|
||||||
|
__STATIC_INLINE systime_t st_lld_get_alarm_n(unsigned alarm) {
|
||||||
|
|
||||||
|
return (systime_t)TIMER->ALARM[alarm];
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Determines if an alarm is active.
|
||||||
|
*
|
||||||
|
* @param[in] alarm alarm channel number
|
||||||
|
* @return The alarm status.
|
||||||
|
* @retval false if the alarm is not active.
|
||||||
|
* @retval true is the alarm is active
|
||||||
|
*
|
||||||
|
* @notapi
|
||||||
|
*/
|
||||||
|
static inline bool st_lld_is_alarm_active_n(unsigned alarm) {
|
||||||
|
|
||||||
|
return (bool)((TIMER->INTE & (1U << alarm)) != 0U);
|
||||||
|
}
|
||||||
|
#endif /* ST_LLD_NUM_ALARMS > 1 */
|
||||||
|
|
||||||
#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */
|
#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */
|
||||||
|
|
||||||
#endif /* HAL_ST_LLD_H */
|
#endif /* HAL_ST_LLD_H */
|
||||||
|
|
|
@ -176,7 +176,7 @@ bool stIsAlarmActive(void) {
|
||||||
*/
|
*/
|
||||||
bool stIsAlarmActiveN(unsigned alarm) {
|
bool stIsAlarmActiveN(unsigned alarm) {
|
||||||
|
|
||||||
return st_lld_is_alarm_active_n(n);
|
return st_lld_is_alarm_active_n(alarm);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
Loading…
Reference in New Issue