andreika-git
/
ChibiOS
mirror of https://github.com/andreika-git/ChibiOS.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Documentation quality fixes. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14039 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2021-02-08 11:10:21 +00:00
parent 800c37a960
commit f94059bbef
6 changed files with 2614 additions and 2437 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

559
doc/hal-stm32f3/Doxyfile_html
View File

File diff suppressed because it is too large Load Diff

2
os/hal/ports/STM32/LLD/CANv1/hal_can_lld.h
View File

@ -118,7 +118,6 @@
#if !defined(STM32_CAN_CAN1_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
#endif
/** @} */
/**
* @brief CAN2 interrupt priority level setting.
@ -126,7 +125,6 @@
#if !defined(STM32_CAN_CAN2_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_CAN_CAN2_IRQ_PRIORITY 11
#endif
/** @} */
/**
* @brief CAN3 interrupt priority level setting.

1
os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.h
View File

@ -37,6 +37,7 @@
/**
* @name Implementation capabilities
* @{
*/
/**
* @brief Callback support int the driver.

1
os/hal/ports/STM32/LLD/RTCv3/hal_rtc_lld.h
View File

@ -37,6 +37,7 @@
/**
* @name Implementation capabilities
* @{
*/
/**
* @brief Callback support int the driver.

2
os/hal/ports/STM32/LLD/USARTv2/hal_sio_lld.h
View File

@ -15,7 +15,7 @@
*/
/**
* @file USARTv3/hal_sio_lld.h
* @file USARTv2/hal_sio_lld.h
* @brief STM32 SIO subsystem low level driver header.
*
* @addtogroup SIO

12
os/hal/ports/STM32/LLD/USARTv2/stm32_usart.h
View File

@ -30,7 +30,8 @@
/*===========================================================================*/
/**
* @brief CR2 register additional macros
* @name CR2 register additional macros
* @{
*/
#define USART_CR1_DATA7 (USART_CR1_M1)
#define USART_CR1_DATA8 (0U)
@ -39,7 +40,8 @@
/** @} */
/**
* @brief CR2 register additional macros
* @name CR2 register additional macros
* @{
*/
#define USART_CR2_STOP1_BITS (0U << 12)
#define USART_CR2_STOP0P5_BITS (1U << 12)
@ -48,7 +50,8 @@
/** @} */
/**
* @brief CR3 register additional macros
* @name CR3 register additional macros
* @{
*/
#define USART_CR3_TXFTCFG_NONFULL (0U)
#define USART_CR3_TXFTCFG_1Q (USART_CR3_TXFTCFG_0)
@ -66,7 +69,8 @@
/** @} */
/**
* @brief PRESC register additional macros
* @name PRESC register additional macros
* @{
*/
#define USART_PRESC_N(n) ((n) << USART_PRESC_PRESCALER_Pos)
#define USART_PRESC1 USART_PRESC_N(0U)