Added sama_pmc and improved clock init
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10379 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
Rocco Marco Guglielmi
parent
d815243fa4
commit
f9ec8eaed6
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@ -75,7 +75,7 @@ void sama_clock_init(void) {
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#if !SAMA_NO_INIT
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uint32_t mor, pllar, mckr;
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/* Disabling PMC write protection. */
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PMC->PMC_WPMR = PMC_WPMR_WPKEY_PASSWD;
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pmcDisableWP();
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/* Enforces the reset default configuration of clock tree. */
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{
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@ -178,8 +178,8 @@ void sama_clock_init(void) {
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SCKC->SCKC_CR = SAMA_OSC_SEL;
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}
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/* Enabling write protection. */
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PMC->PMC_WPMR = PMC_WPMR_WPKEY_PASSWD | PMC_WPMR_WPEN;
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/* Enabling write protection. */
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pmcEnableWP();
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#endif /* !SAMA_NO_INIT */
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}
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@ -409,14 +409,14 @@
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* @brief Processor Clock frequency.
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*/
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#if (SAMA_MCK_SEL == SAMA_MCK_SLOW_CLK) || defined(__DOXYGEN__)
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#define SAMA_PCKOUT (SAMA_SLOW_CLK / SAMA_MCK_PRES_VALUE)
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#define SAMA_PCK (SAMA_SLOW_CLK / SAMA_MCK_PRES_VALUE)
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#elif (SAMA_MCK_SEL == SAMA_MCK_MAIN_CLK)
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#define SAMA_PCKOUT (SAMA_MAIN_CLK / SAMA_MCK_PRES_VALUE)
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#define SAMA_PCK (SAMA_MAIN_CLK / SAMA_MCK_PRES_VALUE)
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#elif (SAMA_MCK_SEL == SAMA_MCK_PLLA_CLK)
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#if SAMA_PLLADIV2_EN
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#define SAMA_PCKOUT (SAMA_PLLACLKOUT / SAMA_MCK_PRES_VALUE / 2)
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#define SAMA_PCK (SAMA_PLLACLKOUT / SAMA_MCK_PRES_VALUE / 2)
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#else
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#define SAMA_PCKOUT (SAMA_PLLACLKOUT / SAMA_MCK_PRES_VALUE)
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#define SAMA_PCK (SAMA_PLLACLKOUT / SAMA_MCK_PRES_VALUE)
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#endif
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#elif (SAMA_MCK_SEL == SAMA_MCK_UPLL_CLK)
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#error "UPLL still unsupported"
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@ -427,15 +427,15 @@
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/**
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* @brief Master Clock frequency.
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*/
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#define SAMA_MCKOUT (SAMA_PCKOUT / SAMA_MCK_MDIV_VALUE)
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#define SAMA_MCK (SAMA_PCK / SAMA_MCK_MDIV_VALUE)
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/* Checks on Processor Clock crystal range. */
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#if (SAMA_PCKOUT > SAMA_PCK_MAX) || (SAMA_PCKOUT < SAMA_PCK_MIN)
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#if (SAMA_PCK > SAMA_PCK_MAX) || (SAMA_PCK < SAMA_PCK_MIN)
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#error "Processor clock frequency out of range."
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#endif
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/* Checks on Master Clock crystal range. */
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#if (SAMA_MCKOUT > SAMA_MCK_MAX) || (SAMA_MCKOUT < SAMA_MCK_MIN)
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#if (SAMA_MCK > SAMA_MCK_MAX) || (SAMA_MCK < SAMA_MCK_MIN)
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#error "Master clock frequency out of range."
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#endif
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/*===========================================================================*/
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@ -450,6 +450,9 @@
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/* External declarations. */
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/*===========================================================================*/
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/* Various helpers.*/
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#include "sama_pmc.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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@ -0,0 +1,160 @@
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/*
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ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file SAMA5D2x/sama_pmc.h
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* @brief PMC helper driver header.
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*
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* @addtogroup SAMA5D2x_PMC
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* @{
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*/
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#ifndef _SAMA_PMC_
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#define _SAMA_PMC_
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/**
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* @name Generic PMC operations
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* @{
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*/
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/**
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* @brief Enable write protection on PMC registers block.
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*
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* @api
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*/
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#define pmcEnableWP() { \
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PMC->PMC_WPMR = PMC_WPMR_WPKEY_PASSWD | PMC_WPMR_WPEN; \
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}
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/**
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* @brief Disable write protection on PMC registers block.
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*
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* @api
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*/
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#define pmcDisableWP() { \
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PMC->PMC_WPMR = PMC_WPMR_WPKEY_PASSWD; \
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}
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/**
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* @brief Enables the clock of one or more peripheral having ID from 2 to
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* 31.
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*
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* @param[in] mask PCER0 peripherals mask
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*
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* @api
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*/
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#define pmcEnablePidLow(mask) { \
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pmcDisableWP(); \
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PMC->PMC_PCER0 |= (mask); \
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pmcDisableWP(); \
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}
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/**
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* @brief Disables the clock of one or more peripheral having ID from 2 to
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* 31.
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*
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* @param[in] mask PCDR0 peripherals mask
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*
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* @api
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*/
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#define pmcDisablePidLow(mask) { \
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pmcDisableWP(); \
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PMC->PMC_PCDR0 |= (mask); \
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pmcDisableWP(); \
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}
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/**
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* @brief Enables the clock of one or more peripheral having ID from 32 to
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* 63.
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*
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* @param[in] mask PCER1 peripherals mask
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*
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* @api
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*/
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#define pmcEnablePidHigh(mask) { \
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pmcDisableWP(); \
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PMC->PMC_PCER1 |= (mask); \
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pmcDisableWP(); \
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}
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/**
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* @brief Disables the clock of one or more peripheral having ID from 32 to
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* 63.
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*
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* @param[in] mask PCDR1 peripherals mask
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*
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* @api
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*/
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#define pmcDisablePidHigh(mask) { \
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pmcDisableWP(); \
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PMC->PMC_PCDR1 |= (mask); \
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pmcDisableWP(); \
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}
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/** @} */
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/**
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* @name ADC peripherals specific PMC operations
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* @{
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*/
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/**
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* @brief Enables the PIT peripheral clock.
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*
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* @api
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*/
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#define pmcEnablePIT() pmcEnablePidLow(SAMA_PID_PIT)
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/**
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* @brief Disables the PIT peripheral clock.
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*
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* @api
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*/
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#define pmcDisablePIT() pmcDisablePidLow(SAMA_PID_PIT)
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/** @} */
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SAMA_PMC_ */
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/** @} */
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