diff --git a/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.h b/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.h
index 94dec7769..8f6984d18 100644
--- a/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.h
+++ b/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.h
@@ -160,17 +160,17 @@
 #if !defined(STM32F3XX)
 #define ADC_CCR_PRESC_MASK              (15 << 18)
 #define ADC_CCR_PRESC_NOCLOCK           (0 << 18)
-#define ADC_CCR_PRESC_DIV_2             (1 << 18)
-#define ADC_CCR_PRESC_DIV_4             (2 << 18)
-#define ADC_CCR_PRESC_DIV_6             (3 << 18)
-#define ADC_CCR_PRESC_DIV_8             (4 << 18)
-#define ADC_CCR_PRESC_DIV_10            (5 << 18)
-#define ADC_CCR_PRESC_DIV_12            (6 << 18)
-#define ADC_CCR_PRESC_DIV_16            (7 << 18)
-#define ADC_CCR_PRESC_DIV_32            (8 << 18)
-#define ADC_CCR_PRESC_DIV_64            (9 << 18)
-#define ADC_CCR_PRESC_DIV_128           (10 << 18)
-#define ADC_CCR_PRESC_DIV_256           (11 << 18)
+#define ADC_CCR_PRESC_DIV2              (1 << 18)
+#define ADC_CCR_PRESC_DIV4              (2 << 18)
+#define ADC_CCR_PRESC_DIV6              (3 << 18)
+#define ADC_CCR_PRESC_DIV8              (4 << 18)
+#define ADC_CCR_PRESC_DIV10             (5 << 18)
+#define ADC_CCR_PRESC_DIV12             (6 << 18)
+#define ADC_CCR_PRESC_DIV16             (7 << 18)
+#define ADC_CCR_PRESC_DIV32             (8 << 18)
+#define ADC_CCR_PRESC_DIV64             (9 << 18)
+#define ADC_CCR_PRESC_DIV128            (10 << 18)
+#define ADC_CCR_PRESC_DIV256            (11 << 18)
 #endif /* !defined(STM32F3XX) */
 
 /* F3 headers do not define the following macros, L4 headers do.*/
@@ -595,6 +595,89 @@
 
 #endif /* !STM32_DMA_SUPPORTS_DMAMUX */
 
+/* ADC clock prescaler checks.*/
+#if defined(STM32F3XX)
+#endif /* defined(STM32F3XX) */
+
+#if defined(STM32L4XX) || defined(STM32L4XXP)
+#if STM32_ADC_ADC123_PRESC == ADC_CCR_PRESC_DIV2
+#define ADC123_PRESC_VALUE              2
+#elif STM32_ADC_ADC123_PRESC == ADC_CCR_PRESC_DIV4
+#define ADC123_PRESC_VALUE              4
+#elif STM32_ADC_ADC123_PRESC == ADC_CCR_PRESC_DIV6
+#define ADC123_PRESC_VALUE              6
+#elif STM32_ADC_ADC123_PRESC == ADC_CCR_PRESC_DIV8
+#define ADC123_PRESC_VALUE              8
+#elif STM32_ADC_ADC123_PRESC == ADC_CCR_PRESC_DIV10
+#define ADC123_PRESC_VALUE              10
+#elif STM32_ADC_ADC123_PRESC == ADC_CCR_PRESC_DIV12
+#define ADC123_PRESC_VALUE              12
+#elif STM32_ADC_ADC123_PRESC == ADC_CCR_PRESC_DIV16
+#define ADC123_PRESC_VALUE              16
+#elif STM32_ADC_ADC123_PRESC == ADC_CCR_PRESC_DIV32
+#define ADC123_PRESC_VALUE              32
+#elif STM32_ADC_ADC123_PRESC == ADC_CCR_PRESC_DIV64
+#define ADC123_PRESC_VALUE              64
+#elif STM32_ADC_ADC123_PRESC == ADC_CCR_PRESC_DIV128
+#define ADC123_PRESC_VALUE              128
+#elif STM32_ADC_ADC123_PRESC == ADC_CCR_PRESC_DIV256
+#define ADC123_PRESC_VALUE              256
+#error "invalid clock divider selected for STM32_ADC_ADC12_PRESC"
+#endif
+#endif /* defined(STM32L4XX) || defined(STM32L4XXP) */
+
+#if defined(STM32G4XX)
+#if STM32_ADC_ADC12_PRESC == ADC_CCR_PRESC_DIV2
+#define ADC12_PRESC_VALUE               2
+#elif STM32_ADC_ADC12_PRESC == ADC_CCR_PRESC_DIV4
+#define ADC12_PRESC_VALUE               4
+#elif STM32_ADC_ADC12_PRESC == ADC_CCR_PRESC_DIV6
+#define ADC12_PRESC_VALUE               6
+#elif STM32_ADC_ADC12_PRESC == ADC_CCR_PRESC_DIV8
+#define ADC12_PRESC_VALUE               8
+#elif STM32_ADC_ADC12_PRESC == ADC_CCR_PRESC_DIV10
+#define ADC12_PRESC_VALUE               10
+#elif STM32_ADC_ADC12_PRESC == ADC_CCR_PRESC_DIV12
+#define ADC12_PRESC_VALUE               12
+#elif STM32_ADC_ADC12_PRESC == ADC_CCR_PRESC_DIV16
+#define ADC12_PRESC_VALUE               16
+#elif STM32_ADC_ADC12_PRESC == ADC_CCR_PRESC_DIV32
+#define ADC12_PRESC_VALUE               32
+#elif STM32_ADC_ADC12_PRESC == ADC_CCR_PRESC_DIV64
+#define ADC12_PRESC_VALUE               64
+#elif STM32_ADC_ADC12_PRESC == ADC_CCR_PRESC_DIV128
+#define ADC12_PRESC_VALUE               128
+#elif STM32_ADC_ADC12_PRESC == ADC_CCR_PRESC_DIV256
+#define ADC12_PRESC_VALUE               256
+#error "invalid clock divider selected for STM32_ADC_ADC12_PRESC"
+#endif
+
+#if STM32_ADC_ADC345_PRESC == ADC_CCR_PRESC_DIV2
+#define ADC345_PRESC_VALUE              2
+#elif STM32_ADC_ADC345_PRESC == ADC_CCR_PRESC_DIV4
+#define ADC345_PRESC_VALUE              4
+#elif STM32_ADC_ADC345_PRESC == ADC_CCR_PRESC_DIV6
+#define ADC345_PRESC_VALUE              6
+#elif STM32_ADC_ADC345_PRESC == ADC_CCR_PRESC_DIV8
+#define ADC345_PRESC_VALUE              8
+#elif STM32_ADC_ADC345_PRESC == ADC_CCR_PRESC_DIV10
+#define ADC345_PRESC_VALUE              10
+#elif STM32_ADC_ADC345_PRESC == ADC_CCR_PRESC_DIV12
+#define ADC345_PRESC_VALUE              12
+#elif STM32_ADC_ADC345_PRESC == ADC_CCR_PRESC_DIV16
+#define ADC345_PRESC_VALUE              16
+#elif STM32_ADC_ADC345_PRESC == ADC_CCR_PRESC_DIV32
+#define ADC345_PRESC_VALUE              32
+#elif STM32_ADC_ADC345_PRESC == ADC_CCR_PRESC_DIV64
+#define ADC345_PRESC_VALUE              64
+#elif STM32_ADC_ADC345_PRESC == ADC_CCR_PRESC_DIV128
+#define ADC345_PRESC_VALUE              128
+#elif STM32_ADC_ADC345_PRESC == ADC_CCR_PRESC_DIV256
+#define ADC345_PRESC_VALUE              256
+#error "invalid clock divider selected for STM32_ADC_ADC345_PRESC"
+#endif
+#endif /* defined(STM32G4XX) */
+
 /* ADC clock source checks.*/
 #if defined(STM32F3XX)
 #if STM32_ADC_ADC12_CLOCK_MODE == ADC_CCR_CKMODE_ADCCK
@@ -632,7 +715,7 @@
 
 #if defined(STM32L4XX) || defined(STM32L4XXP)
 #if STM32_ADC_ADC123_CLOCK_MODE == ADC_CCR_CKMODE_ADCCK
-#define STM32_ADC123_CLOCK              STM32_ADCCLK
+#define STM32_ADC123_CLOCK              (STM32_ADCCLK / ADC123_PRESC_VALUE)
 #elif STM32_ADC_ADC123_CLOCK_MODE == ADC_CCR_CKMODE_AHB_DIV1
 #define STM32_ADC123_CLOCK              (STM32_HCLK / 1)
 #elif STM32_ADC_ADC123_CLOCK_MODE == ADC_CCR_CKMODE_AHB_DIV2
@@ -650,7 +733,7 @@
 
 #if defined(STM32G4XX)
 #if STM32_ADC_ADC12_CLOCK_MODE == ADC_CCR_CKMODE_ADCCK
-#define STM32_ADC12_CLOCK               STM32_ADC12CLK
+#define STM32_ADC12_CLOCK               (STM32_ADC12CLK / ADC12_PRESC_VALUE)
 #elif STM32_ADC_ADC12_CLOCK_MODE == ADC_CCR_CKMODE_AHB_DIV1
 #define STM32_ADC12_CLOCK               (STM32_HCLK / 1)
 #elif STM32_ADC_ADC12_CLOCK_MODE == ADC_CCR_CKMODE_AHB_DIV2
@@ -662,7 +745,7 @@
 #endif
 
 #if STM32_ADC_ADC345_CLOCK_MODE == ADC_CCR_CKMODE_ADCCK
-#define STM32_ADC345_CLOCK              STM32_ADC345CLK
+#define STM32_ADC345_CLOCK              (STM32_ADC345CLK / ADC345_PRESC_VALUE)
 #elif STM32_ADC_ADC345_CLOCK_MODE == ADC_CCR_CKMODE_AHB_DIV1
 #define STM32_ADC345_CLOCK              (STM32_HCLK / 1)
 #elif STM32_ADC_ADC345_CLOCK_MODE == ADC_CCR_CKMODE_AHB_DIV2
diff --git a/testhal/STM32/multi/ADC/.cproject b/testhal/STM32/multi/ADC/.cproject
index 5a04d853a..3c3c92498 100644
--- a/testhal/STM32/multi/ADC/.cproject
+++ b/testhal/STM32/multi/ADC/.cproject
@@ -206,7 +206,7 @@
 			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
 		</cconfiguration>
 		<cconfiguration id="0.365230168.523175374.763979647.1974782146">
-			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.365230168.523175374.763979647.1974782146" moduleId="org.eclipse.cdt.core.settings" name="Build for STM32G474ZI-Nucleo144">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.365230168.523175374.763979647.1974782146" moduleId="org.eclipse.cdt.core.settings" name="Build for STM32G474ZI-Nucleo64">
 				<externalSettings/>
 				<extensions>
 					<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
@@ -218,11 +218,11 @@
 				</extensions>
 			</storageModule>
 			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
-				<configuration artifactName="${ProjName}" buildProperties="" description="" id="0.365230168.523175374.763979647.1974782146" name="Build for STM32G474ZI-Nucleo144" parent="org.eclipse.cdt.build.core.prefbase.cfg">
+				<configuration artifactName="${ProjName}" buildProperties="" description="" id="0.365230168.523175374.763979647.1974782146" name="Build for STM32G474ZI-Nucleo64" parent="org.eclipse.cdt.build.core.prefbase.cfg">
 					<folderInfo id="0.365230168.523175374.763979647.1974782146." name="/" resourcePath="">
 						<toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.511439470" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
 							<targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.511439470.169033670" name=""/>
-							<builder arguments="-f ./make/stm32g474zi_nucleo144.make" autoBuildTarget="all" cleanBuildTarget="clean" command="make" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="org.eclipse.cdt.build.core.settings.default.builder.368430737" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
+							<builder arguments="-f ./make/stm32g474zi_nucleo64.make" autoBuildTarget="all" cleanBuildTarget="clean" command="make" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="org.eclipse.cdt.build.core.settings.default.builder.368430737" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
 							<tool id="org.eclipse.cdt.build.core.settings.holder.libs.1592545662" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
 							<tool id="org.eclipse.cdt.build.core.settings.holder.1870255769" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
 								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1642322306" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
@@ -246,6 +246,7 @@
 	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
 	<storageModule moduleId="refreshScope" versionNumber="2">
 		<configuration configurationName="Build for STM32L4R5ZI-Nucleo144"/>
+		<configuration configurationName="Build for STM32G474ZI-Nucleo144"/>
 		<configuration configurationName="Build for STM32H743ZI-Nucleo144">
 			<resource resourceType="PROJECT" workspacePath="/STM32-ADC"/>
 		</configuration>
diff --git a/testhal/STM32/multi/ADC/Makefile b/testhal/STM32/multi/ADC/Makefile
index 0584e5dfd..53ab22a52 100644
--- a/testhal/STM32/multi/ADC/Makefile
+++ b/testhal/STM32/multi/ADC/Makefile
@@ -31,7 +31,7 @@ all:
 
 clean:
 	@echo
-	-@make --no-print-directory -f ./make/stm32h743_nucleo144.make clean
+	-@make --no-print-directory -f ./make/stm32h743zi_nucleo144.make clean
 	@echo
 	+@make --no-print-directory -f ./make/stm32g071rb_nucleo64.make clean
 	@echo
diff --git a/testhal/STM32/multi/ADC/make/stm32g474zi_nucleo144.make b/testhal/STM32/multi/ADC/make/stm32g474zi_nucleo64.make
similarity index 100%
rename from testhal/STM32/multi/ADC/make/stm32g474zi_nucleo144.make
rename to testhal/STM32/multi/ADC/make/stm32g474zi_nucleo64.make
diff --git a/tools/ftl/processors/conf/mcuconf_stm32g4x1xx/mcuconf.h.ftl b/tools/ftl/processors/conf/mcuconf_stm32g4x1xx/mcuconf.h.ftl
index 86d95ef46..d6fee940a 100644
--- a/tools/ftl/processors/conf/mcuconf_stm32g4x1xx/mcuconf.h.ftl
+++ b/tools/ftl/processors/conf/mcuconf_stm32g4x1xx/mcuconf.h.ftl
@@ -145,6 +145,7 @@
 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     ${doc.STM32_ADC_ADC1_DMA_IRQ_PRIORITY!"5"}
 #define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     ${doc.STM32_ADC_ADC2_DMA_IRQ_PRIORITY!"5"}
 #define STM32_ADC_ADC12_CLOCK_MODE          ${doc.STM32_ADC_ADC12_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV4"}
+#define STM32_ADC_ADC12_PRESC               ${doc.STM32_ADC_ADC12_PRESC!"ADC_CCR_PRESC_DIV2"}
 
 /*
  * CAN driver system settings.
diff --git a/tools/ftl/processors/conf/mcuconf_stm32g4x4xx/mcuconf.h.ftl b/tools/ftl/processors/conf/mcuconf_stm32g4x4xx/mcuconf.h.ftl
index 51fa6391e..af4de019b 100644
--- a/tools/ftl/processors/conf/mcuconf_stm32g4x4xx/mcuconf.h.ftl
+++ b/tools/ftl/processors/conf/mcuconf_stm32g4x4xx/mcuconf.h.ftl
@@ -166,6 +166,8 @@
 #define STM32_ADC_ADC4_DMA_IRQ_PRIORITY     ${doc.STM32_ADC_ADC4_DMA_IRQ_PRIORITY!"5"}
 #define STM32_ADC_ADC12_CLOCK_MODE          ${doc.STM32_ADC_ADC12_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV4"}
 #define STM32_ADC_ADC345_CLOCK_MODE         ${doc.STM32_ADC_ADC345_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV4"}
+#define STM32_ADC_ADC12_PRESC               ${doc.STM32_ADC_ADC12_PRESC!"ADC_CCR_PRESC_DIV2"}
+#define STM32_ADC_ADC345_PRESC              ${doc.STM32_ADC_ADC345_PRESC!"ADC_CCR_PRESC_DIV2"}
 
 /*
  * CAN driver system settings.
diff --git a/tools/ftl/processors/conf/mcuconf_stm32l432xx/mcuconf.h.ftl b/tools/ftl/processors/conf/mcuconf_stm32l432xx/mcuconf.h.ftl
index e969025b5..1f7ce88cd 100644
--- a/tools/ftl/processors/conf/mcuconf_stm32l432xx/mcuconf.h.ftl
+++ b/tools/ftl/processors/conf/mcuconf_stm32l432xx/mcuconf.h.ftl
@@ -136,6 +136,7 @@
 #define STM32_ADC_ADC12_IRQ_PRIORITY        ${doc.STM32_ADC_ADC12_IRQ_PRIORITY!"5"}
 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     ${doc.STM32_ADC_ADC1_DMA_IRQ_PRIORITY!"5"}
 #define STM32_ADC_ADC123_CLOCK_MODE         ${doc.STM32_ADC_ADC123_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV1"}
+#define STM32_ADC_ADC123_PRESC              ${doc.STM32_ADC_ADC123_PRESC!"ADC_CCR_PRESC_DIV2"}
 
 /*
  * CAN driver system settings.
diff --git a/tools/ftl/processors/conf/mcuconf_stm32l452xx/mcuconf.h.ftl b/tools/ftl/processors/conf/mcuconf_stm32l452xx/mcuconf.h.ftl
index a92e1e7ac..f2ac58ad2 100644
--- a/tools/ftl/processors/conf/mcuconf_stm32l452xx/mcuconf.h.ftl
+++ b/tools/ftl/processors/conf/mcuconf_stm32l452xx/mcuconf.h.ftl
@@ -141,6 +141,7 @@
 #define STM32_ADC_ADC12_IRQ_PRIORITY        ${doc.STM32_ADC_ADC12_IRQ_PRIORITY!"5"}
 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     ${doc.STM32_ADC_ADC1_DMA_IRQ_PRIORITY!"5"}
 #define STM32_ADC_ADC123_CLOCK_MODE         ${doc.STM32_ADC_ADC123_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV1"}
+#define STM32_ADC_ADC123_PRESC              ${doc.STM32_ADC_ADC123_PRESC!"ADC_CCR_PRESC_DIV2"}
 
 /*
  * CAN driver system settings.
diff --git a/tools/ftl/processors/conf/mcuconf_stm32l476xx/mcuconf.h.ftl b/tools/ftl/processors/conf/mcuconf_stm32l476xx/mcuconf.h.ftl
index 70ae6a41f..50a015518 100644
--- a/tools/ftl/processors/conf/mcuconf_stm32l476xx/mcuconf.h.ftl
+++ b/tools/ftl/processors/conf/mcuconf_stm32l476xx/mcuconf.h.ftl
@@ -160,6 +160,7 @@
 #define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     ${doc.STM32_ADC_ADC2_DMA_IRQ_PRIORITY!"5"}
 #define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     ${doc.STM32_ADC_ADC3_DMA_IRQ_PRIORITY!"5"}
 #define STM32_ADC_ADC123_CLOCK_MODE         ${doc.STM32_ADC_ADC123_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV1"}
+#define STM32_ADC_ADC123_PRESC              ${doc.STM32_ADC_ADC123_PRESC!"ADC_CCR_PRESC_DIV2"}
 
 /*
  * CAN driver system settings.
diff --git a/tools/ftl/processors/conf/mcuconf_stm32l496xx/mcuconf.h.ftl b/tools/ftl/processors/conf/mcuconf_stm32l496xx/mcuconf.h.ftl
index 141431310..e6a3f3a57 100644
--- a/tools/ftl/processors/conf/mcuconf_stm32l496xx/mcuconf.h.ftl
+++ b/tools/ftl/processors/conf/mcuconf_stm32l496xx/mcuconf.h.ftl
@@ -163,6 +163,7 @@
 #define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     ${doc.STM32_ADC_ADC2_DMA_IRQ_PRIORITY!"5"}
 #define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     ${doc.STM32_ADC_ADC3_DMA_IRQ_PRIORITY!"5"}
 #define STM32_ADC_ADC123_CLOCK_MODE         ${doc.STM32_ADC_ADC123_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV1"}
+#define STM32_ADC_ADC123_PRESC              ${doc.STM32_ADC_ADC123_PRESC!"ADC_CCR_PRESC_DIV2"}
 
 /*
  * CAN driver system settings.
diff --git a/tools/ftl/processors/conf/mcuconf_stm32l4rxxx/mcuconf.h.ftl b/tools/ftl/processors/conf/mcuconf_stm32l4rxxx/mcuconf.h.ftl
index d4c0b3633..aac270f00 100644
--- a/tools/ftl/processors/conf/mcuconf_stm32l4rxxx/mcuconf.h.ftl
+++ b/tools/ftl/processors/conf/mcuconf_stm32l4rxxx/mcuconf.h.ftl
@@ -168,6 +168,7 @@
 #define STM32_ADC_ADC12_IRQ_PRIORITY        ${doc.STM32_ADC_ADC12_IRQ_PRIORITY!"5"}
 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     ${doc.STM32_ADC_ADC1_DMA_IRQ_PRIORITY!"5"}
 #define STM32_ADC_ADC123_CLOCK_MODE         ${doc.STM32_ADC_ADC123_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV2"}
+#define STM32_ADC_ADC123_PRESC              ${doc.STM32_ADC_ADC123_PRESC!"ADC_CCR_PRESC_DIV2"}
 
 /*
  * CAN driver system settings.