git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@192 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -21,5 +21,66 @@
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#include "at91lib/AT91SAM7X256.h"
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#include "at91lib/AT91SAM7X256.h"
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void hwinit(void) {
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extern void FiqHandler(void);
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__attribute__((interrupt("IRQ")))
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static void SpuriousHandler(void) {
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AT91C_BASE_AIC->AIC_EOICR = (AT91_REG)AT91C_BASE_AIC;
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}
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void hwinit(void) {
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int i;
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AT91PS_PMC pmcp = AT91C_BASE_PMC;
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AT91PS_AIC aicp = AT91C_BASE_AIC;
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/*
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* Flash Memory: 1 wait state, about 50 cycles in a microsecond.
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*/
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AT91C_BASE_MC->MC_FMR = (AT91C_MC_FMCN & (50 << 16)) | AT91C_MC_FWS_1FWS;
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/*
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* Watchdog disabled.
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*/
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AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
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/*
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* Enables the main oscillator and waits 56 slow cycles as startup time.
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*/
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pmcp->PMC_MOR = (AT91C_CKGR_OSCOUNT & (7 << 8)) | AT91C_CKGR_MOSCEN;
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while (!(pmcp->PMC_SR & AT91C_PMC_MOSCS))
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;
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/*
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* PLL setup: DIV = 14, MUL = 72, PLLCOUNT = 10
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* PLLfreq = 96109714 Hz (rounded)
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*/
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pmcp->PMC_PLLR = (AT91C_CKGR_DIV & 14) |
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(AT91C_CKGR_PLLCOUNT & (10 << 8)) |
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(AT91C_CKGR_MUL & (72 << 16));
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while (!(pmcp->PMC_SR & (AT91C_PMC_LOCK)))
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;
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/*
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* Master clock = PLLfreq / 2 = 48054858 Hz (rounded)
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*/
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pmcp->PMC_MCKR = AT91C_PMC_CSS_PLL_CLK | AT91C_PMC_PRES_CLK_2;
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while (!(pmcp->PMC_SR & (AT91C_PMC_MCKRDY)))
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;
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/*
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* Default AIC setup, the device drivers will modify it as needed.
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*/
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aicp->AIC_SVR[0] = (AT91_REG)FiqHandler;
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for (i = 1; i < 31; i++) {
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aicp->AIC_SVR[i] = (AT91_REG)NULL;
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aicp->AIC_EOICR = (AT91_REG)i;
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}
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aicp->AIC_SPU = (AT91_REG)SpuriousHandler;
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/*
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* I/O setup, enable clocks, initially all pins are inputs with pullups.
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*/
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pmcp->PMC_PCER = (1 << AT91C_ID_PIOA) | (1 << AT91C_ID_PIOB);
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AT91C_BASE_PIOA->PIO_PER = 0xFFFFFFFF;
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}
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}
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@ -47,8 +47,8 @@ _start:
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ldr pc, _prefetch
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ldr pc, _prefetch
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ldr pc, _abort
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ldr pc, _abort
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nop
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nop
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ldr pc, [pc,#-0xFF0] /* VIC - IRQ Vector Register */
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ldr pc, [pc,#-0xF20] /* AIC - AIC_IVR */
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ldr pc, _fiq
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ldr pc, [pc,#-0xF20] /* AIC - AIC_FVR */
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_undefined:
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_undefined:
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.word UndHandler
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.word UndHandler
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