Fixed buffers alignment problem on STM32 USBv1.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8283 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -127,15 +127,25 @@ static uint32_t usb_pm_alloc(USBDriver *usbp, size_t size) {
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*/
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static void usb_packet_read_to_buffer(stm32_usb_descriptor_t *udp,
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uint8_t *buf, size_t n) {
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stm32_usb_pma_t *pmap= USB_ADDR2PTR(udp->RXADDR0);
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stm32_usb_pma_t *pmap;
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uint32_t w;
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size_t i;
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n = (n + 1) / 2;
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while (n > 0) {
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/* Note, this line relies on the Cortex-M3/M4 ability to perform
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unaligned word accesses.*/
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*(uint16_t *)buf = (uint16_t)*pmap++;
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buf += 2;
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n--;
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pmap = USB_ADDR2PTR(udp->RXADDR0);
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i = 0;
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w = 0; /* Useless but silences a warning.*/
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while (i < n) {
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if ((i & 1) == 0){
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w = *pmap;
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*buf = (uint8_t)w;
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pmap++;
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}
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else {
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*buf = (uint8_t)(w >> 8);
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}
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i++;
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buf++;
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}
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}
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@ -196,16 +206,32 @@ static void usb_packet_read_to_queue(stm32_usb_descriptor_t *udp,
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static void usb_packet_write_from_buffer(stm32_usb_descriptor_t *udp,
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const uint8_t *buf,
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size_t n) {
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stm32_usb_pma_t *pmap = USB_ADDR2PTR(udp->TXADDR0);
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uint32_t w;
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size_t i;
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stm32_usb_pma_t *pmap;
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pmap = USB_ADDR2PTR(udp->TXADDR0);
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udp->TXCOUNT0 = (stm32_usb_pma_t)n;
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n = (n + 1) / 2;
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while (n > 0) {
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/* Note, this line relies on the Cortex-M3/M4 ability to perform
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unaligned word accesses.*/
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*pmap++ = (stm32_usb_pma_t)*(const uint16_t *)buf;
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buf += 2;
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n--;
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/* Pushing all complete words.*/
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i = 0;
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w = 0; /* Useless but silences a warning.*/
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while (i < n) {
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if ((i & 1) == 0) {
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w = (uint32_t)*buf;
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}
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else {
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w |= (uint32_t)*buf << 8;
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*pmap = (stm32_usb_pma_t)w;
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pmap++;
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}
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i++;
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buf++;
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}
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/* Remaining byte.*/
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if ((i & 1) != 0) {
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*pmap = (stm32_usb_pma_t)w;
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}
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}
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@ -73,7 +73,7 @@
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*****************************************************************************
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*** 3.1.0 ***
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- HAL: STM32 OTG buffers and queues do not more require to be aligned in
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- HAL: STM32 USB/OTG buffers and queues do not more require to be aligned in
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position and size.
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- VAR: Improved GCC rules.ld, now it is possible to assign the heap to any
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of the available RAM regions.
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