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ChibiOS
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@586 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2009-01-06 09:18:24 +00:00
parent a1f4ecfe08
commit fee14cb4ce
3 changed files with 399 additions and 352 deletions
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66
ports/ARMCM3/chcore.c
View File

@ -17,45 +17,37 @@
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @addtogroup ARMCM3_CORE
* @{
*/
#include <ch.h>
#include <nvic.h>
/*
* System idle thread loop.
/**
* The default implementation of this function is void so no messages are
* actually printed.
* @note The function is declared as a weak symbol, it is possible to redefine
* it in your application code.
* @param msg pointer to the message string
*/
__attribute__((weak))
void _idle(void *p) {
while (TRUE) {
#if ENABLE_WFI_IDLE != 0
asm volatile ("wfi");
#endif
}
void sys_puts(char *msg) {
}
/*
* System console message (not implemented).
*/
__attribute__((weak))
void chSysPuts(char *msg) {
}
/*
* System halt.
*/
__attribute__((naked, weak))
void chSysHalt(void) {
void sys_halt(void) {
asm volatile ("cpsid i");
while (TRUE) {
while(TRUE) {
}
}
/*
/**
* Start a thread by invoking its work function.
*
* Start a thread by calling its work function. If the work function returns,
* call chThdExit and chSysHalt.
* If the work function returns @p chThdExit() is automatically invoked. A call
* to @p chSysHalt() is added as failure check in the "impossible" case
* @p chThdExit() returns.
*/
__attribute__((naked, weak))
void threadstart(void) {
@ -65,22 +57,22 @@ void threadstart(void) {
"bl chSysHalt ");
}
/*
/**
* System Timer vector.
* This interrupt is used as system tick.
* @note The timer is initialized in the board setup code.
*/
void SysTickVector(void) {
chSysIRQEnterI();
chSysLock();
chSysLockI();
chSysTimerHandlerI();
chSysUnlock();
chSysUnlockI();
chSysIRQExitI();
}
/*
* System invoked context switch.
/**
* The SVC vector is used for commanded context switch.
*/
__attribute__((naked))
void SVCallVector(Thread *otp, Thread *ntp) {
@ -146,7 +138,7 @@ void SVCallVector(Thread *otp, Thread *ntp) {
}
#endif
/*
/**
* Preemption invoked context switch.
*/
__attribute__((naked))
@ -154,10 +146,10 @@ void PendSVVector(void) {
Thread *otp;
register struct intctx *sp_thd asm("r12");
chSysLock();
chSysLockI();
asm volatile ("push {lr}");
if (!chSchRescRequiredI()) {
chSysUnlock();
chSysUnlockI();
asm volatile ("pop {pc}");
}
asm volatile ("pop {lr}");
@ -178,3 +170,5 @@ void PendSVVector(void) {
POP_CONTEXT(sp_thd);
}
/** @} */

148
ports/ARMCM3/chcore.h
View File

@ -17,6 +17,11 @@
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @addtogroup ARMCM3_CORE
* @{
*/
#ifndef _CHCORE_H_
#define _CHCORE_H_
@ -35,29 +40,30 @@
#define ENABLE_WFI_IDLE 0 /* Enables the use of the WFI ins. */
#endif
/*
/**
* Macro defining the ARM Cortex-M3 architecture.
*/
#define CH_ARCHITECTURE_ARMCM3
/*
/**
* 32 bit stack alignment.
*/
typedef uint32_t stkalign_t;
/*
/**
* Generic ARM register.
*/
typedef void *regarm_t;
/*
/**
* Interrupt saved context, empty in this architecture.
*/
struct extctx {
};
/*
/**
* System saved context.
* This structure represents the inner stack frame during a context switching.
*/
struct intctx {
regarm_t basepri;
@ -82,19 +88,17 @@ struct intctx {
regarm_t xpsr;
};
/*
* Port dependent part of the Thread structure, you may add fields in
* this structure.
/**
* Cortex-M3 context structure.
*/
typedef struct {
struct intctx *r13;
} Context;
/*
* Platform dependent part of the \p chThdCreate() API.
*
* The top of the workspace is used for the intctx datastructure.
*
/**
* Platform dependent part of the @p chThdInit() API.
* This code usually setup the context switching frame represented by a
* @p intctx structure.
*/
#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
tp->p_ctx.r13 = (struct intctx *)((uint8_t *)workspace + \
@ -108,61 +112,107 @@ typedef struct {
tp->p_ctx.r13->xpsr = (regarm_t)0x01000000; \
}
#define chSysLock() { \
/**
* The default idle thread implementation requires no extra stack space in
* this port.
*/
#ifndef IDLE_THREAD_STACK_SIZE
#define IDLE_THREAD_STACK_SIZE 0
#endif
/**
* This port requires no extra stack space for interrupt handling.
*/
#ifndef INT_REQUIRED_STACK
#define INT_REQUIRED_STACK 0
#endif
/**
* Enforces a correct alignment for a stack area size value.
*/
#define STACK_ALIGN(n) ((((n) - 1) | sizeof(stkalign_t)) + 1)
/**
* Computes the thread working area global size.
*/
#define THD_WA_SIZE(n) StackAlign(sizeof(Thread) + \
sizeof(struct intctx) + \
sizeof(struct extctx) + \
(n) + (INT_REQUIRED_STACK))
/**
* Macro used to allocate a thread working area aligned as both position and
* size.
*/
#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)];
/**
* IRQ prologue code, inserted at the start of all IRQ handlers enabled to
* invoke system APIs.
*/
#define SYS_IRQ_PROLOGUE()
/**
* IRQ epilogue code, inserted at the end of all IRQ handlers enabled to
* invoke system APIs.
*/
#define SYS_IRQ_EPILOGUE() { \
SCB_ICSR = ICSR_PENDSVSET; \
}
/**
* This port function is implemented as inlined code for performance reasons.
*/
#define sys_disable() { \
register uint32_t tmp asm ("r3") = BASEPRI_KERNEL; \
asm volatile ("msr BASEPRI, %0" : : "r" (tmp)); \
}
#define chSysUnlock() { \
/**
* This port function is implemented as inlined code for performance reasons.
*/
#define sys_enable() { \
register uint32_t tmp asm ("r3") = BASEPRI_USER; \
asm volatile ("msr BASEPRI, %0" : : "r" (tmp)); \
}
#define chSysEnable() { \
register uint32_t tmp asm ("r3") = BASEPRI_USER; \
asm volatile ("msr BASEPRI, %0" : : "r" (tmp)); \
/**
* This port function is implemented as inlined code for performance reasons.
*/
#define sys_disable_from_isr() sys_disable()
/**
* This port function is implemented as inlined code for performance reasons.
*/
#define sys_enable_from_isr() sys_enable()
#define sys_wait_for_interrupt() { \
asm volatile ("wfi"); \
}
#define chSysSwitchI(otp, ntp) { \
/**
* This port function is implemented as inlined code for performance reasons.
*/
#define sys_switch(otp, ntp) { \
register Thread *_otp asm ("r0") = (otp); \
register Thread *_ntp asm ("r1") = (ntp); \
asm volatile ("svc #0" : : "r" (_otp), "r" (_ntp)); \
}
#ifndef INT_REQUIRED_STACK
#define INT_REQUIRED_STACK 0 /* NOTE: Always safe for this port. */
#endif
/*
* Enforces a 32 bit alignment for a stack area size value.
/**
* IRQ handler function modifier.
*/
#define STACK_ALIGN(n) ((((n) - 1) | sizeof(stkalign_t)) + 1)
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
sizeof(struct intctx) + \
sizeof(struct extctx) + \
(n) + \
INT_REQUIRED_STACK)
#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)];
/* called on each interrupt entry, currently nothing is done */
#define chSysIRQEnterI()
/* called on each interrupt exit, pends a supervisor handler for
* execution after all higher priority interrupts; PendSVVector() */
#define chSysIRQExitI() { \
SCB_ICSR = ICSR_PENDSVSET; \
}
#define IDLE_THREAD_STACK_SIZE 0
#define SYS_IRQ_HANDLER
#ifdef __cplusplus
extern "C" {
#endif
void _idle(void *p) __attribute__((weak, noreturn));
void chSysHalt(void);
void chSysPuts(char *msg);
void threadstart(void);
void sys_puts(char *msg);
void sys_halt(void);
#ifdef __cplusplus
}
#endif
#endif /* _CHCORE_H_ */
/** @} */

11
src/templates/chcore.h
View File

@ -62,12 +62,11 @@ typedef struct {
} Context;
/**
* Platform dependent part of the \p chThdCreate() API.
* Platform dependent part of the @p chThdCreate() API.
* This code usually setup the context switching frame represented by a
* @p intctx structure.
*/
#define SETUP_CONTEXT(workspace, wsize, pf, arg) \
{ \
#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
}
/**
@ -76,7 +75,9 @@ typedef struct {
* thread should take no more space than those reserved
* by @p INT_REQUIRED_STACK.
*/
#ifndef IDLE_THREAD_STACK_SIZE
#define IDLE_THREAD_STACK_SIZE 0
#endif
/**
* Per-thread stack overhead for interrupts servicing, it is used in the
@ -85,7 +86,9 @@ typedef struct {
* interrupt stack and the stack space between @p intctx and @p extctx is
* known to be zero.
*/
#ifndef INT_REQUIRED_STACK
#define INT_REQUIRED_STACK 0
#endif
/**
* Enforces a correct alignment for a stack area size value.
@ -113,7 +116,7 @@ typedef struct {
#define SYS_IRQ_PROLOGUE()
/**
* IRQ epilogue code, inserted at the start of all IRQ handlers enabled to
* IRQ epilogue code, inserted at the end of all IRQ handlers enabled to
* invoke system APIs.
*/
#define SYS_IRQ_EPILOGUE()