146 lines
5.2 KiB
C
146 lines
5.2 KiB
C
/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012,2013 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file LPC8xx/hal_lld.c
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* @brief LPC8xx HAL subsystem low level driver source.
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*
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* @addtogroup HAL
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* @{
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*/
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#include "ch.h"
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#include "hal.h"
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Low level HAL driver initialization.
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*
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* @notapi
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*/
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void hal_lld_init(void) {
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/* SysTick initialization using the system clock.*/
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nvicSetSystemHandlerPriority(HANDLER_SYSTICK, CORTEX_PRIORITY_SYSTICK);
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SysTick->LOAD = LPC8xx_SYSCLK / CH_FREQUENCY - 1;
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SysTick->VAL = 0;
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SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
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SysTick_CTRL_ENABLE_Msk |
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SysTick_CTRL_TICKINT_Msk;
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}
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/**
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* @brief LPC8xx clocks and PLL initialization.
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* @note This function must be invoked only after the system reset.
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*
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* @special
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*/
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void lpc8xx_clock_init(void) {
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int i;
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/* Enable clocks to IOCON & SWM. */
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LPC_SYSCON->SYSAHBCLKCTRL |= ((1<<18)|(1<<7));
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/* System oscillator initialization.*/
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#if (LPC8xx_PLLCLK_SOURCE == SYSPLLCLKSEL_SYSOSC)
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// switch off pull-ups
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LPC_IOCON->PIO0_8 &= ~(3<<3);
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LPC_IOCON->PIO0_9 &= ~(3<<3);
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// enable xtalin/xtalout
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LPC_SWM->PINENABLE0 &= ~(3<<4);
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LPC_SYSCON->SYSOSCCTRL = LPC8xx_SYSOSCCTRL;
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LPC_SYSCON->PDRUNCFG &= ~(1<<5); /* System oscillator ON. */
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for (i = 0; i<200; i++)
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__NOP(); /* Stabilization delay. */
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#endif
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/* CLKIN initialization.*/
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#if (LPC8xx_PLLCLK_SOURCE == SYSPLLCLKSEL_CLKIN)
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// switch off pull-up
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LPC_IOCON->PIO0_1 &= ~(3<<3);
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// enable clkin
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LPC_SWM->PINENABLE0 &= ~(1<<7);
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#endif
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/* Always set PLL clock source -
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PLL IN can be a main clock source */
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LPC_SYSCON->SYSPLLCLKSEL = LPC8xx_PLLCLK_SOURCE;
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LPC_SYSCON->SYSPLLCLKUEN = 1;
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while (!(LPC_SYSCON->SYSPLLCLKUEN & 0x01)); /* Wait Until Updated */
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/* PLL initialization.*/
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#if LPC8xx_MAINCLK_SOURCE == SYSMAINCLKSEL_PLLOUT
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LPC_SYSCON->SYSPLLCTRL = LPC8xx_SYSPLLCTRL_MSEL | LPC8xx_SYSPLLCTRL_PSEL;
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LPC_SYSCON->PDRUNCFG &= ~(1<<7); /* System PLL ON. */
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while (!(LPC_SYSCON->SYSPLLSTAT & 1)) /* Wait PLL lock. */
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;
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#endif
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#if LPC8xx_MAINCLK_SOURCE == SYSMAINCLKSEL_WDGOSC
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#error "WatchDog Oscillator not configured! Dont use as main clock source"
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LPC_SYSCON->WDTOSCCTRL = ??;
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LPC_SYSCON->PDRUNCFG &= ~(1<<6); /* WDT OSC On */
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for (i = 0; i<200; i++)
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__NOP(); /* Stabilization delay. */
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#endif
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/* Flash wait states setting, the code takes care to not touch TBD bits.*/
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LPC_FLASHCTRL->FLASHCFG = (LPC_FLASHCTRL->FLASHCFG & ~1) |
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LPC8xx_FLASHCFG_FLASHTIM;
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/* ABH divider initialization. Set this **before** switching Main clock
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source to ensure AHB clock stays in spec */
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LPC_SYSCON->SYSAHBCLKDIV = LPC8xx_SYSABHCLK_DIV;
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/* Main clock source selection.*/
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LPC_SYSCON->MAINCLKSEL = LPC8xx_MAINCLK_SOURCE;
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LPC_SYSCON->MAINCLKUEN = 1;
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while (!(LPC_SYSCON->MAINCLKUEN & 1)); /* Wait switch completion. */
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/* Disable clocks to IOCON, SWM, FLASHREG & ROM. */
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LPC_SYSCON->SYSAHBCLKCTRL &= ~((1<<18)|(1<<7)|(1<<3)|(1<<1));
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}
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/** @} */
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