ChibiOS/os/hal/dox/io_block.dox

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/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
2011,2012,2013 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @defgroup IO_BLOCK Abstract I/O Block Device
* @ingroup IO
*
* @section io_block_1 Driver State Machine
* The drivers implementing this interface shall implement the following
* state machine internally. Not all the driver functionalities can be used
* in any moment, any transition not explicitly shown in the following
* diagram has to be considered an error and shall be captured by an
* assertion (if enabled).
* @if LATEX_PDF
* @dot
digraph example {
size="5, 7";
rankdir="LR";
node [shape=circle, fontname=Sans, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Sans, fontsize=8];
stop [label="BLK_STOP\nLow Power"];
uninit [label="BLK_UNINIT", style="bold"];
ready [label="BLK_READY\nClock Enabled"];
connecting [label="BLK_CONN.ING\nConnecting"];
disconnecting [label="BLK_DISC.ING\nDisconnecting"];
active [label="BLK_ACTIVE\nCard Ready"];
reading [label="BLK_READING\nReading"];
writing [label="BLK_WRITING\nWriting"];
uninit -> stop [label=" blkInit()", constraint=false];
stop -> stop [label="\nblkStop()"];
stop -> ready [label="\nblkStart()"];
ready -> stop [label="\nblkStop()"];
ready -> ready [label="\nblkStart()\nblkDisconnect()"];
ready -> connecting [label="\nblkConnect()"];
connecting -> active [label="\nconnection\nsuccessful"];
connecting -> active [label="\nblkConnect()", dir="back"];
connecting -> ready [label="\nconnection\nfailed"];
disconnecting -> active [label="\nblkDisconnect()", dir="back"];
ready -> disconnecting [label="\ndisconnection\nfinished", dir="back"];
active -> reading [label="\nblkRead()"];
reading -> active [label="\nread finished\nread error"];
active -> writing [label="\nblkWrite()"];
writing -> active [label="\nwrite finished\nwrite error"];
}
* @enddot
* @else
* @dot
digraph example {
rankdir="LR";
node [shape=circle, fontname=Sans, fontsize=8, fixedsize="true", width="0.9", height="0.9"];
edge [fontname=Sans, fontsize=8];
stop [label="BLK_STOP\nLow Power"];
uninit [label="BLK_UNINIT", style="bold"];
ready [label="BLK_READY\nClock Enabled"];
connecting [label="BLK_CONN.ING\nConnecting"];
disconnecting [label="BLK_DISC.ING\nDisconnecting"];
active [label="BLK_ACTIVE\nCard Ready"];
reading [label="BLK_READING\nReading"];
writing [label="BLK_WRITING\nWriting"];
uninit -> stop [label=" blkInit()", constraint=false];
stop -> stop [label="\nblkStop()"];
stop -> ready [label="\nblkStart()"];
ready -> stop [label="\nblkStop()"];
ready -> ready [label="\nblkStart()\nblkDisconnect()"];
ready -> connecting [label="\nblkConnect()"];
connecting -> active [label="\nconnection\nsuccessful"];
connecting -> active [label="\nblkConnect()", dir="back"];
connecting -> ready [label="\nconnection\nfailed"];
disconnecting -> active [label="\nblkDisconnect()", dir="back"];
ready -> disconnecting [label="\ndisconnection\nfinished", dir="back"];
active -> reading [label="\nblkRead()"];
reading -> active [label="\nread finished\nread error"];
active -> writing [label="\nblkWrite()"];
writing -> active [label="\nwrite finished\nwrite error"];
}
* @enddot
* @endif
*/