122 lines
4.0 KiB
C
122 lines
4.0 KiB
C
/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#include "ch.h"
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#include "hal.h"
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#define BUFFER_SIZE 512
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static uint8_t txbuf[BUFFER_SIZE];
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static uint8_t rxbuf[BUFFER_SIZE];
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/*
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* SPI high speed configuration (peripheral clock / 3 = 27,6 Mhz, CPHA=0, CPOL=0, MSb first).
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*/
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static const SPIConfig hs_spicfg = {
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NULL, /* callback if present */
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0, /* cs pad number */
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SPI_MR_MODFDIS | SPI_MR_LLB, /* mr register */
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SPI_CSR_SCBR(3) /* csr */
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};
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/*
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* SPI low speed configuration (peripheral clock / 166 = 500KHz, CPHA=0, CPOL=0, MSb first).
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*/
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static const SPIConfig ls_spicfg = {
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NULL, /* callback if present */
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0, /* cs pad number */
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SPI_MR_MODFDIS | SPI_MR_LLB, /* mr register */
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SPI_CSR_SCBR(166) /* csr */
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};
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/*
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* SPI bus contender 1.
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*/
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static THD_WORKING_AREA(spi_thread_1_wa, 1024);
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static THD_FUNCTION(spi_thread_1, p) {
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(void)p;
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chRegSetThreadName("SPI thread 1");
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while (true) {
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spiAcquireBus(&FSPID2); /* Acquire ownership of the bus. */
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palClearLine(LINE_LED_RED); /* LED ON. */
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spiStart(&FSPID2, &hs_spicfg); /* Setup transfer parameters. */
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spiExchange(&FSPID2, BUFFER_SIZE,
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txbuf, rxbuf); /* Atomic transfer operations. */
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cacheInvalidateRegion(&rxbuf, sizeof(rxbuf));
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spiReleaseBus(&FSPID2); /* Ownership release. */
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}
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}
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/*
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* SPI bus contender 2.
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*/
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static THD_WORKING_AREA(spi_thread_2_wa, 1024);
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static THD_FUNCTION(spi_thread_2, p) {
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(void)p;
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chRegSetThreadName("SPI thread 2");
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while (true) {
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spiAcquireBus(&FSPID2); /* Acquire ownership of the bus. */
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palSetLine(LINE_LED_RED); /* LED OFF. */
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spiStart(&FSPID2, &ls_spicfg); /* Setup transfer parameters. */
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spiExchange(&FSPID2, BUFFER_SIZE,
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txbuf, rxbuf); /* Atomic transfer operations. */
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cacheInvalidateRegion(&rxbuf, sizeof(rxbuf));
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spiReleaseBus(&FSPID2); /* Ownership release. */
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}
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}
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/*
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* Application entry point.
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*/
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int main(void) {
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unsigned i;
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/*
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* System initializations.
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* - HAL initialization, this also initializes the configured device drivers
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* and performs the board-specific initializations.
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* - Kernel initialization, the main() function becomes a thread and the
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* RTOS is active.
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*/
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halInit();
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chSysInit();
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/* Redirecting FLEXCOM 2 SPI pins. */
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palSetGroupMode(PIOD, PAL_PORT_BIT(26) | PAL_PORT_BIT(27) |
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PAL_PORT_BIT(28) | PAL_PORT_BIT(29) , 0U,
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PAL_SAMA_FUNC_PERIPH_C | PAL_MODE_SECURE);
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/*
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* Prepare transmit pattern.
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*/
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for (i = 0; i < sizeof(txbuf); i++)
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txbuf[i] = (uint8_t)i;
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chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa),
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NORMALPRIO + 1, spi_thread_1, NULL);
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chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa),
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NORMALPRIO + 1, spi_thread_2, NULL);
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while (true) {
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chThdSleepMilliseconds(500);
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}
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return 0;
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}
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