344 lines
9.9 KiB
C
344 lines
9.9 KiB
C
/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file LPC11xx/spi_lld.h
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* @brief LPC11xx low level SPI driver header.
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*
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* @addtogroup SPI
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* @{
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*/
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#ifndef _SPI_LLD_H_
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#define _SPI_LLD_H_
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#if HAL_USE_SPI || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/**
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* @brief Hardware FIFO depth.
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*/
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#define LPC11xx_SSP_FIFO_DEPTH 8
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#define CR0_DSSMASK 0x0F
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#define CR0_DSS4BIT 3
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#define CR0_DSS5BIT 4
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#define CR0_DSS6BIT 5
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#define CR0_DSS7BIT 6
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#define CR0_DSS8BIT 7
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#define CR0_DSS9BIT 8
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#define CR0_DSS10BIT 9
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#define CR0_DSS11BIT 0xA
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#define CR0_DSS12BIT 0xB
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#define CR0_DSS13BIT 0xC
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#define CR0_DSS14BIT 0xD
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#define CR0_DSS15BIT 0xE
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#define CR0_DSS16BIT 0xF
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#define CR0_FRFSPI 0
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#define CR0_FRFSSI 0x10
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#define CR0_FRFMW 0x20
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#define CR0_CPOL 0x40
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#define CR0_CPHA 0x80
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#define CR0_CLOCKRATE(n) ((n) << 8)
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#define CR1_LBM 1
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#define CR1_SSE 2
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#define CR1_MS 4
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#define CR1_SOD 8
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#define SR_TFE 1
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#define SR_TNF 2
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#define SR_RNE 4
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#define SR_RFF 8
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#define SR_BSY 16
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#define IMSC_ROR 1
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#define IMSC_RT 2
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#define IMSC_RX 4
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#define IMSC_TX 8
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#define RIS_ROR 1
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#define RIS_RT 2
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#define RIS_RX 4
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#define RIS_TX 8
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#define MIS_ROR 1
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#define MIS_RT 2
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#define MIS_RX 4
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#define MIS_TX 8
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#define ICR_ROR 1
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#define ICR_RT 2
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/**
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* @brief SCK0 signal assigned to pin PIO0_10.
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*/
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#define SCK0_IS_PIO0_10 0
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/**
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* @brief SCK0 signal assigned to pin PIO2_11.
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*/
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#define SCK0_IS_PIO2_11 1
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/**
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* @brief SCK0 signal assigned to pin PIO0_6.
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*/
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#define SCK0_IS_PIO0_6 2
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @brief SPI1 driver enable switch.
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* @details If set to @p TRUE the support for device SSP0 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(LPC11xx_SPI_USE_SSP0) || defined(__DOXYGEN__)
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#define LPC11xx_SPI_USE_SSP0 TRUE
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#endif
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/**
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* @brief SPI2 driver enable switch.
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* @details If set to @p TRUE the support for device SSP1 is included.
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* @note The default is @p TRUE.
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*/
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#if !defined(LPC11xx_SPI_USE_SSP1) || defined(__DOXYGEN__)
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#define LPC11xx_SPI_USE_SSP1 TRUE
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#endif
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/**
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* @brief SSP0 PCLK divider.
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*/
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#if !defined(LPC11xx_SPI_SSP0CLKDIV) || defined(__DOXYGEN__)
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#define LPC11xx_SPI_SSP0CLKDIV 1
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#endif
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/**
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* @brief SSP1 PCLK divider.
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*/
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#if !defined(LPC11xx_SPI_SSP1CLKDIV) || defined(__DOXYGEN__)
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#define LPC11xx_SPI_SSP1CLKDIV 1
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#endif
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/**
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* @brief SPI0 interrupt priority level setting.
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*/
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#if !defined(LPC11xx_SPI_SSP0_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define LPC11xx_SPI_SSP0_IRQ_PRIORITY 1
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#endif
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/**
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* @brief SPI1 interrupt priority level setting.
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*/
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#if !defined(LPC11xx_SPI_SSP1_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define LPC11xx_SPI_SSP1_IRQ_PRIORITY 1
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#endif
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/**
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* @brief Overflow error hook.
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* @details The default action is to stop the system.
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*/
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#if !defined(LPC11xx_SPI_SSP_ERROR_HOOK) || defined(__DOXYGEN__)
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#define LPC11xx_SPI_SSP_ERROR_HOOK(spip) chSysHalt()
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#endif
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/**
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* @brief SCK0 signal selector.
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*/
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#if !defined(LPC11xx_SPI_SCK0_SELECTOR) || defined(__DOXYGEN__)
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#define LPC11xx_SPI_SCK0_SELECTOR SCK0_IS_PIO2_11
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#endif
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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#if (LPC11xx_SPI_SSP0CLKDIV < 1) || (LPC11xx_SPI_SSP0CLKDIV > 255)
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#error "invalid LPC11xx_SPI_SSP0CLKDIV setting"
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#endif
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#if (LPC11xx_SPI_SSP1CLKDIV < 1) || (LPC11xx_SPI_SSP1CLKDIV > 255)
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#error "invalid LPC11xx_SPI_SSP1CLKDIV setting"
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#endif
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#if !LPC11xx_SPI_USE_SSP0 && !LPC11xx_SPI_USE_SSP1
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#error "SPI driver activated but no SPI peripheral assigned"
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#endif
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#if (LPC11xx_SPI_SCK0_SELECTOR != SCK0_IS_PIO0_10) && \
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(LPC11xx_SPI_SCK0_SELECTOR != SCK0_IS_PIO2_11) && \
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(LPC11xx_SPI_SCK0_SELECTOR != SCK0_IS_PIO0_6)
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#error "invalid pin assigned to SCK0 signal"
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#endif
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/**
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* @brief SSP0 clock.
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*/
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#define LPC11xx_SPI_SSP0_PCLK \
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(LPC11xx_MAINCLK / LPC11xx_SPI_SSP0CLKDIV)
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/**
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* @brief SSP1 clock.
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*/
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#define LPC11xx_SPI_SSP1_PCLK \
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(LPC11xx_MAINCLK / LPC11xx_SPI_SSP1CLKDIV)
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief Type of a structure representing an SPI driver.
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*/
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typedef struct SPIDriver SPIDriver;
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/**
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* @brief SPI notification callback type.
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*
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* @param[in] spip pointer to the @p SPIDriver object triggering the
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* callback
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*/
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typedef void (*spicallback_t)(SPIDriver *spip);
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/**
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* @brief Driver configuration structure.
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*/
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typedef struct {
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/**
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* @brief Operation complete callback or @p NULL.
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*/
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spicallback_t end_cb;
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/* End of the mandatory fields.*/
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/**
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* @brief The chip select line port.
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*/
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ioportid_t ssport;
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/**
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* @brief The chip select line pad number.
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*/
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uint16_t sspad;
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/**
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* @brief SSP CR0 initialization data.
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*/
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uint16_t cr0;
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/**
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* @brief SSP CPSR initialization data.
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*/
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uint32_t cpsr;
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} SPIConfig;
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/**
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* @brief Structure representing a SPI driver.
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*/
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struct SPIDriver {
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/**
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* @brief Driver state.
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*/
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spistate_t state;
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/**
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* @brief Current configuration data.
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*/
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const SPIConfig *config;
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#if SPI_USE_WAIT || defined(__DOXYGEN__)
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/**
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* @brief Waiting thread.
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*/
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Thread *thread;
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#endif /* SPI_USE_WAIT */
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#if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
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#if CH_USE_MUTEXES || defined(__DOXYGEN__)
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/**
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* @brief Mutex protecting the bus.
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*/
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Mutex mutex;
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#elif CH_USE_SEMAPHORES
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Semaphore semaphore;
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#endif
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#endif /* SPI_USE_MUTUAL_EXCLUSION */
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#if defined(SPI_DRIVER_EXT_FIELDS)
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SPI_DRIVER_EXT_FIELDS
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#endif
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/* End of the mandatory fields.*/
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/**
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* @brief Pointer to the SSP registers block.
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*/
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LPC_SSP_TypeDef *ssp;
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/**
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* @brief Number of bytes yet to be received.
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*/
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uint32_t rxcnt;
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/**
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* @brief Receive pointer or @p NULL.
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*/
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void *rxptr;
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/**
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* @brief Number of bytes yet to be transmitted.
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*/
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uint32_t txcnt;
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/**
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* @brief Transmit pointer or @p NULL.
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*/
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const void *txptr;
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};
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#if LPC11xx_SPI_USE_SSP0 && !defined(__DOXYGEN__)
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extern SPIDriver SPID1;
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#endif
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#if LPC11xx_SPI_USE_SSP1 && !defined(__DOXYGEN__)
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extern SPIDriver SPID2;
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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void spi_lld_init(void);
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void spi_lld_start(SPIDriver *spip);
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void spi_lld_stop(SPIDriver *spip);
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void spi_lld_select(SPIDriver *spip);
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void spi_lld_unselect(SPIDriver *spip);
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void spi_lld_ignore(SPIDriver *spip, size_t n);
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void spi_lld_exchange(SPIDriver *spip, size_t n,
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const void *txbuf, void *rxbuf);
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void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf);
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void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf);
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uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame);
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#ifdef __cplusplus
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}
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#endif
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#endif /* HAL_USE_SPI */
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#endif /* _SPI_LLD_H_ */
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/** @} */
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