264 lines
9.4 KiB
ArmAsm
264 lines
9.4 KiB
ArmAsm
/*
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ChibiOS - Copyright (C) 2006,2007,2008,2009,2010,2011,2012,2013,2014,
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2015,2016,2017,2018,2019,2020,2021 Giovanni Di Sirio.
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This file is part of ChibiOS.
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ChibiOS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation version 3 of the License.
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ChibiOS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file GCC/ivor.S
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* @brief Kernel ISRs.
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*
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* @addtogroup PPC_CORE
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* @{
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*/
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#if !defined(FALSE) || defined(__DOXYGEN__)
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#define FALSE 0
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#endif
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#if !defined(TRUE) || defined(__DOXYGEN__)
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#define TRUE 1
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#endif
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/*
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* Imports the PPC configuration headers.
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*/
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#define _FROM_ASM_
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#include "chlicense.h"
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#include "chconf.h"
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#include "chcore.h"
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#if defined(__HIGHTEC__)
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#define se_beq beq
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#endif
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#if !defined(__DOXYGEN__)
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.section .handlers, "ax"
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#if PPC_SUPPORTS_DECREMENTER
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/*
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* _IVOR10 handler (Book-E decrementer).
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*/
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.align 4
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.globl _IVOR10
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.type _IVOR10, @function
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_IVOR10:
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/* Saving the external context (port_extctx structure).*/
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e_stwu sp, -80(sp)
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#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
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e_stmvsrrw 8(sp) /* Saves PC, MSR. */
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e_stmvsprw 16(sp) /* Saves CR, LR, CTR, XER. */
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e_stmvgprw 32(sp) /* Saves GPR0, GPR3...GPR12. */
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#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
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se_stw r0, 32(sp) /* Saves GPR0. */
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mfSRR0 r0
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se_stw r0, 8(sp) /* Saves PC. */
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mfSRR1 r0
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se_stw r0, 12(sp) /* Saves MSR. */
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mfCR r0
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se_stw r0, 16(sp) /* Saves CR. */
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mfLR r0
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se_stw r0, 20(sp) /* Saves LR. */
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mfCTR r0
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se_stw r0, 24(sp) /* Saves CTR. */
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mfXER r0
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se_stw r0, 28(sp) /* Saves XER. */
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se_stw r3, 36(sp) /* Saves GPR3...GPR12. */
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se_stw r4, 40(sp)
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se_stw r5, 44(sp)
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se_stw r6, 48(sp)
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se_stw r7, 52(sp)
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e_stw r8, 56(sp)
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e_stw r9, 60(sp)
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e_stw r10, 64(sp)
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e_stw r11, 68(sp)
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e_stw r12, 72(sp)
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#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
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/* Increasing the SPGR0 register.*/
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mfspr r0, 272
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se_addi r0, 1
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mtspr 272, r0
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/* Reset DIE bit in TSR register.*/
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e_lis r3, 0x0800 /* DIS bit mask. */
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mtspr 336, r3 /* TSR register. */
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/* Restoring pre-IRQ MSR register value.*/
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mfSRR1 r0
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#if !PPC_USE_IRQ_PREEMPTION
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/* No preemption, keeping EE disabled.*/
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se_bclri r0, 16 /* EE = bit 16. */
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#endif
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mtMSR r0
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#if CH_DBG_SYSTEM_STATE_CHECK
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e_bl _dbg_check_enter_isr
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e_bl _dbg_check_lock_from_isr
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#endif
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/* System tick handler invocation.*/
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e_bl chSysTimerHandlerI
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#if CH_DBG_SYSTEM_STATE_CHECK
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e_bl _dbg_check_unlock_from_isr
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e_bl _dbg_check_leave_isr
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#endif
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#if PPC_USE_IRQ_PREEMPTION
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/* Prevents preemption again.*/
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wrteei 0
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#endif
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/* Jumps to the common IVOR epilogue code.*/
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e_b _ivor_exit
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#endif /* PPC_SUPPORTS_DECREMENTER */
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/*
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* _IVOR4 handler (Book-E external interrupt).
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*/
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.align 4
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.globl _IVOR4
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.type _IVOR4, @function
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_IVOR4:
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/* Saving the external context (port_extctx structure).*/
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e_stwu sp, -80(sp)
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#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
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e_stmvsrrw 8(sp) /* Saves PC, MSR. */
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e_stmvsprw 16(sp) /* Saves CR, LR, CTR, XER. */
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e_stmvgprw 32(sp) /* Saves GPR0, GPR3...GPR12. */
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#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
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se_stw r0, 32(sp) /* Saves GPR0. */
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mfSRR0 r0
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se_stw r0, 8(sp) /* Saves PC. */
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mfSRR1 r0
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se_stw r0, 12(sp) /* Saves MSR. */
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mfCR r0
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se_stw r0, 16(sp) /* Saves CR. */
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mfLR r0
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se_stw r0, 20(sp) /* Saves LR. */
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mfCTR r0
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se_stw r0, 24(sp) /* Saves CTR. */
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mfXER r0
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se_stw r0, 28(sp) /* Saves XER. */
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se_stw r3, 36(sp) /* Saves GPR3...GPR12. */
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se_stw r4, 40(sp)
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se_stw r5, 44(sp)
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se_stw r6, 48(sp)
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se_stw r7, 52(sp)
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e_stw r8, 56(sp)
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e_stw r9, 60(sp)
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e_stw r10, 64(sp)
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e_stw r11, 68(sp)
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e_stw r12, 72(sp)
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#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
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/* Increasing the SPGR0 register.*/
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mfspr r0, 272
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se_addi r0, 1
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mtspr 272, r0
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/* Software vector address from the INTC register.*/
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e_lis r3, INTC_IACKR_ADDR@h
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e_or2i r3, INTC_IACKR_ADDR@l /* IACKR register address. */
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e_lwz r3, 0(r3) /* IACKR register value. */
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e_lwz r3, 0(r3)
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mtCTR r3 /* Software handler address. */
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/* Restoring pre-IRQ MSR register value.*/
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mfSRR1 r0
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#if !PPC_USE_IRQ_PREEMPTION
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/* No preemption, keeping EE disabled.*/
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se_bclri r0, 16 /* EE = bit 16. */
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#endif
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mtMSR r0
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/* Exectes the software handler.*/
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se_bctrl
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#if PPC_USE_IRQ_PREEMPTION
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/* Prevents preemption again.*/
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wrteei 0
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#endif
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/* Informs the INTC that the interrupt has been served.*/
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mbar 0
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e_lis r3, INTC_EOIR_ADDR@h
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e_or2i r3, INTC_EOIR_ADDR@l
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se_stw r3, 0(r3) /* Writing any value should do. */
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/* Common IVOR epilogue code, context restore.*/
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.globl _ivor_exit
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_ivor_exit:
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/* Decreasing the SPGR0 register.*/
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mfspr r0, 272
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se_subi r0, 1
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mtspr 272, r0
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#if CH_DBG_STATISTICS
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e_bl _stats_start_measure_crit_thd
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#endif
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#if CH_DBG_SYSTEM_STATE_CHECK
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e_bl _dbg_check_lock
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#endif
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e_bl chSchIsPreemptionRequired
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se_cmpi r3, 0
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se_beq .noresch
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e_bl chSchDoReschedule
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.noresch:
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#if CH_DBG_SYSTEM_STATE_CHECK
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e_bl _dbg_check_unlock
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#endif
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#if CH_DBG_STATISTICS
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e_bl _stats_stop_measure_crit_thd
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#endif
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/* Restoring the external context.*/
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#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
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e_lmvgprw 32(sp) /* Restores GPR0, GPR3...GPR12. */
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e_lmvsprw 16(sp) /* Restores CR, LR, CTR, XER. */
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e_lmvsrrw 8(sp) /* Restores PC, MSR. */
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#else /*!(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
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se_lwz r3, 36(sp) /* Restores GPR3...GPR12. */
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se_lwz r4, 40(sp)
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se_lwz r5, 44(sp)
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se_lwz r6, 48(sp)
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se_lwz r7, 52(sp)
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e_lwz r8, 56(sp)
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e_lwz r9, 60(sp)
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e_lwz r10, 64(sp)
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e_lwz r11, 68(sp)
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e_lwz r12, 72(sp)
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se_lwz r0, 8(sp)
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mtSRR0 r0 /* Restores PC. */
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se_lwz r0, 12(sp)
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mtSRR1 r0 /* Restores MSR. */
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se_lwz r0, 16(sp)
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mtCR r0 /* Restores CR. */
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se_lwz r0, 20(sp)
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mtLR r0 /* Restores LR. */
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se_lwz r0, 24(sp)
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mtCTR r0 /* Restores CTR. */
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se_lwz r0, 28(sp)
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mtXER r0 /* Restores XER. */
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se_lwz r0, 32(sp) /* Restores GPR0. */
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#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
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e_addi sp, sp, 80 /* Back to the previous frame. */
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se_rfi
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#endif /* !defined(__DOXYGEN__) */
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/** @} */
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