81 lines
2.5 KiB
C
81 lines
2.5 KiB
C
/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012,2013 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* LPC13xx drivers configuration.
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* The following settings override the default settings present in
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* the various device driver implementation headers.
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* Note that the settings for each driver only have effect if the driver
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* is enabled in halconf.h.
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*
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* IRQ priorities:
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* 7...0 Lowest...highest.
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*/
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/*
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* HAL driver system settings.
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*/
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#define LPC13xx_PLLCLK_SOURCE SYSPLLCLKSEL_SYSOSC
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#define LPC13xx_SYSPLL_MUL 6
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#define LPC13xx_SYSPLL_DIV 4
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#define LPC13xx_MAINCLK_SOURCE SYSMAINCLKSEL_PLLOUT
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#define LPC13xx_SYSABHCLK_DIV 1
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/*
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* ADC driver system settings.
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*/
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/*
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* CAN driver system settings.
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*/
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/*
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* GPT driver system settings.
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*/
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#define LPC13xx_GPT_USE_CT16B0 TRUE
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#define LPC13xx_GPT_USE_CT16B1 TRUE
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#define LPC13xx_GPT_USE_CT32B0 TRUE
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#define LPC13xx_GPT_USE_CT32B1 TRUE
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#define LPC13xx_GPT_CT16B0_IRQ_PRIORITY 2
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#define LPC13xx_GPT_CT16B1_IRQ_PRIORITY 2
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#define LPC13xx_GPT_CT32B0_IRQ_PRIORITY 2
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#define LPC13xx_GPT_CT32B1_IRQ_PRIORITY 2
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/*
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* PWM driver system settings.
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*/
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/*
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* SERIAL driver system settings.
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*/
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#define LPC13xx_SERIAL_USE_UART0 TRUE
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#define LPC13xx_SERIAL_FIFO_PRELOAD 16
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#define LPC13xx_SERIAL_UART0CLKDIV 1
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#define LPC13xx_SERIAL_UART0_IRQ_PRIORITY 3
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/*
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* SPI driver system settings.
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*/
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#define LPC13xx_SPI_USE_SSP0 TRUE
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#define LPC13xx_SPI_SSP0CLKDIV 1
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#define LPC13xx_SPI_SSP0_IRQ_PRIORITY 5
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#define LPC13xx_SPI_SSP_ERROR_HOOK(spip) chSysHalt()
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#define LPC13xx_SPI_SCK0_SELECTOR SCK0_IS_PIO2_11
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