265 lines
8.3 KiB
C
265 lines
8.3 KiB
C
/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file STM32/rtc_lld.c
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* @brief STM32 RTC subsystem low level driver header.
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*
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* @addtogroup RTC
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* @{
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*/
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#include "ch.h"
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#include "hal.h"
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#if HAL_USE_RTC || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/** @brief RTC driver identifier.*/
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RTCDriver RTCD;
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/*===========================================================================*/
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/* Driver local variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/**
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* @brief Shared IRQ handler.
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*
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* @param[in] rtcp pointer to a @p RTCDriver object
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*/
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#if RTC_SUPPORTS_CALLBACKS
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static void rtc_lld_serve_interrupt(RTCDriver *rtcp){
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chSysLockFromIsr();
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if ((RTC->CRH & RTC_CRH_SECIE) && \
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(RTC->CRL & RTC_CRL_SECF) && \
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(rtcp->config->second_cb != NULL)){
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rtcp->config->second_cb(rtcp);
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RTC->CRL &= ~RTC_CRL_SECF;
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}
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if ((RTC->CRH & RTC_CRH_ALRIE) && \
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(RTC->CRL & RTC_CRL_ALRF) && \
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(rtcp->config->alarm_cb != NULL)){
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rtcp->config->alarm_cb(rtcp);
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RTC->CRL &= ~RTC_CRL_ALRF;
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}
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if ((RTC->CRH & RTC_CRH_OWIE) && \
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(RTC->CRL & RTC_CRL_OWF) && \
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(rtcp->config->overflow_cb != NULL)){
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rtcp->config->overflow_cb(rtcp);
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RTC->CRL &= ~RTC_CRL_OWF;
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}
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chSysUnlockFromIsr();
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}
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#endif /* RTC_SUPPORTS_CALLBACKS */
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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/**
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* @brief RTC interrupt handler.
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* @isr
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*/
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#if RTC_SUPPORTS_CALLBACKS
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CH_IRQ_HANDLER(RTC_IRQHandler) {
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CH_IRQ_PROLOGUE();
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rtc_lld_serve_interrupt(&RTCD);
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CH_IRQ_EPILOGUE();
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}
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#endif /* RTC_SUPPORTS_CALLBACKS */
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Enable access to registers and initialize RTC if BKP domain
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* was previously reseted.
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*/
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void rtc_lld_init(void){
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RCC->APB1ENR |= (RCC_APB1ENR_PWREN | RCC_APB1ENR_BKPEN); /* enable clocking */
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PWR->CR |= PWR_CR_DBP; /* enable access */
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if (!(RCC->BDCR & (RCC_BDCR_RTCEN | RCC_BDCR_LSEON))){ /* BKP domain was reseted */
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RCC->BDCR |= RTC_CLOCK_SOURCE; /* select clocking from LSE */
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RCC->BDCR |= RCC_BDCR_LSEON; /* switch LSE on */
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while(!(RCC->BDCR & RCC_BDCR_LSEON)) /* wait for stabilization */
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;
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RCC->BDCR |= RCC_BDCR_RTCEN; /* run clock */
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}
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#if defined(RTC_CLOCK_SOURCE) == defined(RCC_BDCR_RTCSEL_LSE)
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uint32_t preload = STM32_LSECLK - 1UL;
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#elif defined(RTC_CLOCK_SOURCE) == defined(RCC_BDCR_RTCSEL_LSI)
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uint32_t preload = STM32_LSICLK - 1UL;
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#elif defined(RTC_CLOCK_SOURCE) == defined(RCC_BDCR_RTCSEL_HSE)
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uint32_t preload = (STM32_HSICLK / 128UL) - 1UL;
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#else
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#error "RTC clock source not selected"
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#endif /* RTC_CLOCK_SOURCE == RCC_BDCR_RTCSEL_LSE */
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/* Write preload register only if value changed */
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if (preload != (((uint32_t)(RTC->PRLH)) << 16) + RTC->PRLH){
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while(!(RTC->CRL & RTC_CRL_RTOFF))
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;
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RTC->CRL |= RTC_CRL_CNF; /* switch on configure mode */
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RTC->PRLH = (uint16_t)((preload >> 16) & 0b1111); /* write preloader */
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RTC->PRLL = (uint16_t)(preload & 0xFFFF);
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RTC->CRL &= ~RTC_CRL_CNF; /* switch off configure mode */
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while(!(RTC->CRL & RTC_CRL_RTOFF)) /* wait for completion */
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;
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}
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/* Ensure that RTC_CNT and RTC_DIV contain actual values after enabling
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* clocking on APB1, because these values only update when APB1 functioning.*/
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RTC->CRL &= ~(RTC_CRL_RSF);
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while (!(RTC->CRL & RTC_CRL_RSF))
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;
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/* disable all interrupts and clear all even flags just to be safe */
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RTC->CRH &= ~(RTC_CRH_OWIE | RTC_CRH_ALRIE | RTC_CRH_SECIE);
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RTC->CRL &= ~(RTC_CRL_SECF | RTC_CRL_ALRF | RTC_CRL_OWF);
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RTCD.config = NULL;
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}
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/**
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* @brief Configure and start interrupt servicing routines.
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* This function do nothing if callbacks disabled.
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*
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* @param[in] rtcp pointer to a @p RTCDriver object
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* @param[in] rtccfgp pointer to a @p RTCDriver config object
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*/
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void rtc_lld_start(RTCDriver *rtcp, const RTCConfig *rtccfgp){
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uint16_t isr_flags = 0;
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NVICEnableVector(RTC_IRQn, CORTEX_PRIORITY_MASK(STM32_RTC_IRQ_PRIORITY));
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rtcp->config = rtccfgp;
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if (rtcp->config->overflow_cb != NULL){
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isr_flags |= RTC_CRH_OWIE;
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}
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if (rtcp->config->alarm_cb != NULL){
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isr_flags |= RTC_CRH_ALRIE;
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}
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if (rtcp->config->second_cb != NULL){
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isr_flags |= RTC_CRH_SECIE;
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}
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/* clear all event flags just to be safe */
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RTC->CRL &= ~(RTC_CRL_SECF | RTC_CRL_ALRF | RTC_CRL_OWF);
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RTC->CRH |= isr_flags;
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}
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/**
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* @brief Disable interrupt servicing routines.
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*/
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void rtc_lld_stop(void){
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NVICDisableVector(RTC_IRQn);
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RTC->CRH = 0;
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}
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/**
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* @brief Set current time.
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*
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* @param[in] tv_sec time value in UNIX notation.
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*/
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void rtc_lld_set_time(uint32_t tv_sec){
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while(!(RTC->CRL & RTC_CRL_RTOFF))
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;
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RTC->CRL |= RTC_CRL_CNF; /* switch on configure mode */
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RTC->CNTH = (uint16_t)((tv_sec >> 16) & 0xFFFF); /* write time */
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RTC->CNTL = (uint16_t)(tv_sec & 0xFFFF);
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RTC->CRL &= ~RTC_CRL_CNF; /* switch off configure mode */
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while(!(RTC->CRL & RTC_CRL_RTOFF)) /* wait for completion */
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;
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}
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/**
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* @brief Return current time in UNIX notation.
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*/
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inline uint32_t rtc_lld_get_sec(void){
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return ((RTC->CNTH << 16) + RTC->CNTL);
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}
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/**
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* @brief Return fractional part of current time (milliseconds).
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*/
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inline uint16_t rtc_lld_get_msec(void){
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uint32_t time_frac = 0;
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time_frac = (((uint32_t)RTC->DIVH) << 16) + (RTC->DIVL);
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return(((STM32_LSECLK - time_frac) * 1000) / STM32_LSECLK);
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}
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/**
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* @brief Set alarm date in UNIX notation.
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*/
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void rtc_lld_set_alarm(uint32_t tv_alarm){
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while(!(RTC->CRL & RTC_CRL_RTOFF))
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;
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RTC->CRL |= RTC_CRL_CNF; /* switch on configure mode */
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RTC->ALRH = (uint16_t)((tv_alarm >> 16) & 0xFFFF); /* write time */
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RTC->ALRL = (uint16_t)(tv_alarm & 0xFFFF);
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RTC->CRL &= ~RTC_CRL_CNF; /* switch off configure mode */
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while(!(RTC->CRL & RTC_CRL_RTOFF)) /* wait for completion */
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;
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#if !(RTC_SUPPORTS_CALLBACKS)
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RTC->CRL &= ~RTC_CRL_ALRF;
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RTC->CRH |= RTC_CRH_ALRIE;
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#endif /* !(RTC_SUPPORTS_CALLBACKS) */
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}
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/**
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* @brief Get current alarm date in UNIX notation.
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* @note Default value after reset is 0xFFFFFFFF
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*/
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inline uint32_t rtc_lld_get_alarm(void){
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return ((RTC->ALRH << 16) + RTC->ALRL);
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}
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#endif /* HAL_USE_RTC */
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/** @} */
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