63 lines
1.1 KiB
Prolog
63 lines
1.1 KiB
Prolog
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update=7/17/2015 12:48:22 PM
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version=1
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last_client=kicad
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[cvpcb]
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version=1
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NetIExt=net
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[general]
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version=1
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[eeschema]
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version=1
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LibDir=
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[eeschema/libraries]
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LibName1=power
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LibName2=device
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LibName3=transistors
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LibName4=conn
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LibName5=linear
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LibName6=regul
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LibName7=74xx
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LibName8=cmos4000
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LibName9=adc-dac
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LibName10=memory
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LibName11=xilinx
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LibName12=microcontrollers
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LibName13=dsp
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LibName14=microchip
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LibName15=analog_switches
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LibName16=motorola
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LibName17=texas
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LibName18=intel
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LibName19=audio
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LibName20=interface
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LibName21=digital-audio
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LibName22=philips
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LibName23=display
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LibName24=cypress
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LibName25=siliconi
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LibName26=opto
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LibName27=atmel
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LibName28=contrib
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LibName29=valves
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LibName30=vn750ps_e
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LibName31=C:/rusefi/SpillyHardware/VN5E050AJ_E_Vertical/VN5E050AJ_E
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[pcbnew]
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version=1
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PageLayoutDescrFile=
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LastNetListRead=
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PadDrill=0.6
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PadDrillOvalY=0.6
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PadSizeH=1.5
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PadSizeV=1.5
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PcbTextSizeV=1.5
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PcbTextSizeH=1.5
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PcbTextThickness=0.3
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ModuleTextSizeV=1
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ModuleTextSizeH=1
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ModuleTextSizeThickness=0.15
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SolderMaskClearance=0
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SolderMaskMinWidth=0
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DrawSegmentWidth=0.2
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BoardOutlineThickness=0.2
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ModuleOutlineThickness=0.15
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