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weird stuff stays at https://github.com/rusefi/rusefi/tree/lts-2023_01

This commit is contained in:
rusefillc 2024-04-03 13:42:04 -04:00
parent f69b5fa972
commit 059631ca2c
33 changed files with 1 additions and 3746 deletions
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51
misc/stm32f1_test_project/.cproject
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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<?fileVersion 4.0.0?>
<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
<storageModule moduleId="org.eclipse.cdt.core.settings">
<cconfiguration id="0.539548154">
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.539548154" moduleId="org.eclipse.cdt.core.settings" name="Default">
<externalSettings/>
<extensions>
<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
</extensions>
</storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
<configuration artifactName="${ProjName}" buildProperties="" description="" id="0.539548154" name="Default" parent="org.eclipse.cdt.build.core.prefbase.cfg">
<folderInfo id="0.539548154." name="/" resourcePath="">
<toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.1743759718" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
<targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.1743759718.163416004" name=""/>
<builder autoBuildTarget="all" cleanBuildTarget="clean" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="org.eclipse.cdt.build.core.settings.default.builder.1496776929" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
<tool id="org.eclipse.cdt.build.core.settings.holder.libs.1194238367" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
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</tool>
<tool id="org.eclipse.cdt.build.core.settings.holder.1280737601" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.49735864" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
</tool>
<tool id="org.eclipse.cdt.build.core.settings.holder.1205432135" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1755774820" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
</tool>
</toolChain>
</folderInfo>
</configuration>
</storageModule>
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
</cconfiguration>
</storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
<project id="ARMCM3-STM32F103RB-NUCLEO.null.494699019" name="ARMCM3-STM32F103RB-NUCLEO"/>
</storageModule>
<storageModule moduleId="scannerConfiguration">
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
<scannerConfigBuildInfo instanceId="0.539548154">
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
</scannerConfigBuildInfo>
</storageModule>
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
</cproject>

43
misc/stm32f1_test_project/.project
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<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>ARMCM3-STM32F103RB-NUCLEO</name>
<comment></comment>
<projects>
</projects>
<buildSpec>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
<triggers>clean,full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
<triggers>full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
</buildSpec>
<natures>
<nature>org.eclipse.cdt.core.cnature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
</natures>
<linkedResources>
<link>
<name>board</name>
<type>2</type>
<locationURI>CHIBIOS/boards/ST_NUCLEO_F103RB</locationURI>
</link>
<link>
<name>os</name>
<type>2</type>
<locationURI>CHIBIOS/os</locationURI>
</link>
<link>
<name>test</name>
<type>2</type>
<locationURI>CHIBIOS/test</locationURI>
</link>
</linkedResources>
</projectDescription>

198
misc/stm32f1_test_project/Makefile
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##############################################################################
# Build global options
# NOTE: Can be overridden externally.
#
# Compiler options here.
ifeq ($(USE_OPT),)
USE_OPT = -O0 -g -ggdb -fomit-frame-pointer -falign-functions=16
endif
# C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),)
USE_COPT =
endif
# C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti -fno-exceptions -ffast-math -funsafe-math-optimizations -fno-threadsafe-statics -fno-use-cxa-atexit
USE_CPPOPT += -std=c++2a
endif
# Enable this if you want the linker to remove unused code and data.
ifeq ($(USE_LINK_GC),)
USE_LINK_GC = yes
endif
# Linker extra options here.
ifeq ($(USE_LDOPT),)
USE_LDOPT =
endif
# Enable this if you want link time optimizations (LTO).
ifeq ($(USE_LTO),)
USE_LTO = yes
endif
# Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no
endif
# If enabled, this option makes the build process faster by not compiling
# modules not used in the current configuration.
ifeq ($(USE_SMART_BUILD),)
#USE_SMART_BUILD = yes
endif
#
# Build global options
##############################################################################
##############################################################################
# Architecture or project specific options
#
# Stack size to be allocated to the Cortex-M process stack. This stack is
# the stack used by the main() thread.
ifeq ($(USE_PROCESS_STACKSIZE),)
USE_PROCESS_STACKSIZE = 0x400
endif
# Stack size to the allocated to the Cortex-M main/exceptions stack. This
# stack is used for processing interrupts and exceptions.
ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
USE_EXCEPTIONS_STACKSIZE = 0x400
endif
# Enables the use of FPU (no, softfp, hard).
ifeq ($(USE_FPU),)
USE_FPU = no
endif
# FPU-related options.
ifeq ($(USE_FPU_OPT),)
USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16
endif
#
# Architecture or project specific options
##############################################################################
##############################################################################
# Project, target, sources and paths
#
# Define project name here
PROJECT = ch
# Target settings.
MCU = cortex-m3
# Imported source files and paths.
CHIBIOS = ../../firmware/ChibiOS
CONFDIR := ./cfg
BUILDDIR := ./build
DEPDIR := ./.dep
ifeq ("$(wildcard $(CHIBIOS)/os/license/license.mk)","")
# submodules probably aren't checked out, complain to the user about it!
# make is not happy about newly checked out module for some reason but next invocation would work
$(error Please run 'git submodule update --init --recursive' before trying to build!)
endif
# Licensing files.
include $(CHIBIOS)/os/license/license.mk
# Startup files.
include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk
# HAL-OSAL files (optional).
include $(CHIBIOS)/os/hal/hal.mk
include $(CHIBIOS)/os/hal/ports/STM32/STM32F1xx/platform.mk
include $(CHIBIOS)/os/hal/boards/OLIMEX_STM32_P103/board.mk
include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk
# RTOS files (optional).
include $(CHIBIOS)/os/rt/rt.mk
include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
# Auto-build files in ./source recursively.
include $(CHIBIOS)/tools/mk/autobuild.mk
# Other files (optional).
include $(CHIBIOS)/os/hal/lib/complex/mfs/hal_mfs.mk
include $(CHIBIOS)/os/hal/lib/streams/streams.mk
# Define linker script file here
LDSCRIPT= $(STARTUPLD)/STM32F103xB.ld
# C sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
CSRC = $(ALLCSRC)
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
CPPSRC = $(ALLCPPSRC) \
main.cpp \
spi.cpp \
can.cpp \
persistence.cpp \
uart.cpp
# List ASM source files here.
ASMSRC = $(ALLASMSRC)
# List ASM with preprocessor source files here.
ASMXSRC = $(ALLXASMSRC)
# Inclusion directories.
INCDIR = $(CONFDIR) $(ALLINC)
# Define C warning options here.
CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
# Define C++ warning options here.
CPPWARN = -Wall -Wextra -Wundef
#
# Project, target, sources and paths
##############################################################################
##############################################################################
# Start of user section
#
# List all user C define here, like -D_DEBUG=1
UDEFS =
# Define ASM defines here
UADEFS =
# List all user directories here
UINCDIR =
# List the user directory to look for the libraries here
ULIBDIR =
# List all user libraries here
ULIBS =
#
# End of user section
##############################################################################
##############################################################################
# Common rules
#
RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk
include $(RULESPATH)/arm-none-eabi.mk
include $(RULESPATH)/rules.mk
#
# Common rules
##############################################################################
##############################################################################
# Custom rules
#
#
# Custom rules
##############################################################################

85
misc/stm32f1_test_project/STM32F103xB.ld
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/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
* ST32F103xB memory setup.
*/
MEMORY
{
flash0 (rx) : org = 0x08000000, len = 60k
flash1 (rx) : org = 0x00000000, len = 0
flash2 (rx) : org = 0x00000000, len = 0
flash3 (rx) : org = 0x00000000, len = 0
flash4 (rx) : org = 0x00000000, len = 0
flash5 (rx) : org = 0x00000000, len = 0
flash6 (rx) : org = 0x00000000, len = 0
flash7 (rx) : org = 0x00000000, len = 0
ram0 (wx) : org = 0x20000000, len = 20k
ram1 (wx) : org = 0x00000000, len = 0
ram2 (wx) : org = 0x00000000, len = 0
ram3 (wx) : org = 0x00000000, len = 0
ram4 (wx) : org = 0x00000000, len = 0
ram5 (wx) : org = 0x00000000, len = 0
ram6 (wx) : org = 0x00000000, len = 0
ram7 (wx) : org = 0x00000000, len = 0
}
/* For each data/text section two region are defined, a virtual region
and a load region (_LMA suffix).*/
/* Flash region to be used for exception vectors.*/
REGION_ALIAS("VECTORS_FLASH", flash0);
REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
/* Flash region to be used for constructors and destructors.*/
REGION_ALIAS("XTORS_FLASH", flash0);
REGION_ALIAS("XTORS_FLASH_LMA", flash0);
/* Flash region to be used for code text.*/
REGION_ALIAS("TEXT_FLASH", flash0);
REGION_ALIAS("TEXT_FLASH_LMA", flash0);
/* Flash region to be used for read only data.*/
REGION_ALIAS("RODATA_FLASH", flash0);
REGION_ALIAS("RODATA_FLASH_LMA", flash0);
/* Flash region to be used for various.*/
REGION_ALIAS("VARIOUS_FLASH", flash0);
REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);
/* Flash region to be used for RAM(n) initialization data.*/
REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);
/* RAM region to be used for Main stack. This stack accommodates the processing
of all exceptions and interrupts.*/
REGION_ALIAS("MAIN_STACK_RAM", ram0);
/* RAM region to be used for the process stack. This is the stack used by
the main() function.*/
REGION_ALIAS("PROCESS_STACK_RAM", ram0);
/* RAM region to be used for data segment.*/
REGION_ALIAS("DATA_RAM", ram0);
REGION_ALIAS("DATA_RAM_LMA", flash0);
/* RAM region to be used for BSS segment.*/
REGION_ALIAS("BSS_RAM", ram0);
/* RAM region to be used for the default heap.*/
REGION_ALIAS("HEAP_RAM", ram0);
/* Generic rules inclusion.*/
INCLUDE rules.ld

83
misc/stm32f1_test_project/can.cpp
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#include "can.h"
#include "hal.h"
#include <cstdint>
#include <cstring>
const CANConfig canConfig500 =
{
CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP,
/*
Settings from https://forum.chibios.org/viewtopic.php?t=2990
For 36MHz http://www.bittiming.can-wiki.info/ does not give that option :( Subtract '1' for register values
*/
CAN_BTR_SJW(0) | CAN_BTR_BRP(5) | CAN_BTR_TS1(5) | CAN_BTR_TS2(4),
};
#define SWAP_UINT16(x) (((x) << 8) | ((x) >> 8))
void SendSomething()
{
auto baseAddress = 0x156;
{
CANTxFrame m_frame;
m_frame.IDE = CAN_IDE_STD;
m_frame.EID = 0;
m_frame.SID = baseAddress;
m_frame.RTR = CAN_RTR_DATA;
m_frame.DLC = 8;
memset(m_frame.data8, 0, sizeof(m_frame.data8));
m_frame.data8[3] = 0x33;
m_frame.data8[6] = 0x66;
canTransmitTimeout(&CAND1, CAN_ANY_MAILBOX, &m_frame, TIME_IMMEDIATE);
}
}
static THD_WORKING_AREA(waCanTxThread, 256);
void CanTxThread(void*)
{
while(1) {
SendSomething();
chThdSleepMilliseconds(10);
}
}
static THD_WORKING_AREA(waCanRxThread, 256);
void CanRxThread(void*)
{
while(1)
{
CANRxFrame frame;
msg_t msg = canReceiveTimeout(&CAND1, CAN_ANY_MAILBOX, &frame, TIME_INFINITE);
// Ignore non-ok results...
if (msg != MSG_OK)
{
continue;
}
// Ignore std frames, only listen to ext
if (frame.IDE != CAN_IDE_EXT)
{
continue;
}
}
}
void InitCan() {
canStart(&CAND1, &canConfig500);
// CAN TX
palSetPadMode(GPIOA,12, PAL_MODE_STM32_ALTERNATE_PUSHPULL );
// CAN RX
palSetPadMode(GPIOA,11, PAL_MODE_INPUT_PULLUP );
chThdCreateStatic(waCanTxThread, sizeof(waCanTxThread), NORMALPRIO, CanTxThread, nullptr);
chThdCreateStatic(waCanRxThread, sizeof(waCanRxThread), NORMALPRIO - 4, CanRxThread, nullptr);
}

3
misc/stm32f1_test_project/can.h
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#pragma once
void InitCan();

756
misc/stm32f1_test_project/chconf.h
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@ -1,756 +0,0 @@
/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file rt/templates/chconf.h
* @brief Configuration file template.
* @details A copy of this file must be placed in each project directory, it
* contains the application specific kernel settings.
*
* @addtogroup config
* @details Kernel related settings and hooks.
* @{
*/
#ifndef CHCONF_H
#define CHCONF_H
#define _CHIBIOS_RT_CONF_
#define _CHIBIOS_RT_CONF_VER_6_1_
/*===========================================================================*/
/**
* @name System timers settings
* @{
*/
/*===========================================================================*/
/**
* @brief System time counter resolution.
* @note Allowed values are 16, 32 or 64 bits.
*/
#if !defined(CH_CFG_ST_RESOLUTION)
#define CH_CFG_ST_RESOLUTION 16
#endif
/**
* @brief System tick frequency.
* @details Frequency of the system timer that drives the system ticks. This
* setting also defines the system tick time unit.
*/
#if !defined(CH_CFG_ST_FREQUENCY)
#define CH_CFG_ST_FREQUENCY 2000
#endif
/**
* @brief Time intervals data size.
* @note Allowed values are 16, 32 or 64 bits.
*/
#if !defined(CH_CFG_INTERVALS_SIZE)
#define CH_CFG_INTERVALS_SIZE 32
#endif
/**
* @brief Time types data size.
* @note Allowed values are 16 or 32 bits.
*/
#if !defined(CH_CFG_TIME_TYPES_SIZE)
#define CH_CFG_TIME_TYPES_SIZE 32
#endif
/**
* @brief Time delta constant for the tick-less mode.
* @note If this value is zero then the system uses the classic
* periodic tick. This value represents the minimum number
* of ticks that is safe to specify in a timeout directive.
* The value one is not valid, timeouts are rounded up to
* this value.
*/
#if !defined(CH_CFG_ST_TIMEDELTA)
#define CH_CFG_ST_TIMEDELTA 2
#endif
/** @} */
/*===========================================================================*/
/**
* @name Kernel parameters and options
* @{
*/
/*===========================================================================*/
/**
* @brief Round robin interval.
* @details This constant is the number of system ticks allowed for the
* threads before preemption occurs. Setting this value to zero
* disables the preemption for threads with equal priority and the
* round robin becomes cooperative. Note that higher priority
* threads can still preempt, the kernel is always preemptive.
* @note Disabling the round robin preemption makes the kernel more compact
* and generally faster.
* @note The round robin preemption is not supported in tickless mode and
* must be set to zero in that case.
*/
#if !defined(CH_CFG_TIME_QUANTUM)
#define CH_CFG_TIME_QUANTUM 0
#endif
/**
* @brief Idle thread automatic spawn suppression.
* @details When this option is activated the function @p chSysInit()
* does not spawn the idle thread. The application @p main()
* function becomes the idle thread and must implement an
* infinite loop.
*/
#if !defined(CH_CFG_NO_IDLE_THREAD)
#define CH_CFG_NO_IDLE_THREAD FALSE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Performance options
* @{
*/
/*===========================================================================*/
/**
* @brief OS optimization.
* @details If enabled then time efficient rather than space efficient code
* is used when two possible implementations exist.
*
* @note This is not related to the compiler optimization options.
* @note The default is @p TRUE.
*/
#if !defined(CH_CFG_OPTIMIZE_SPEED)
#define CH_CFG_OPTIMIZE_SPEED TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Subsystem options
* @{
*/
/*===========================================================================*/
/**
* @brief Time Measurement APIs.
* @details If enabled then the time measurement APIs are included in
* the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_CFG_USE_TM)
#define CH_CFG_USE_TM TRUE
#endif
/**
* @brief Threads registry APIs.
* @details If enabled then the registry APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_CFG_USE_REGISTRY)
#define CH_CFG_USE_REGISTRY TRUE
#endif
/**
* @brief Threads synchronization APIs.
* @details If enabled then the @p chThdWait() function is included in
* the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_CFG_USE_WAITEXIT)
#define CH_CFG_USE_WAITEXIT TRUE
#endif
/**
* @brief Semaphores APIs.
* @details If enabled then the Semaphores APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_CFG_USE_SEMAPHORES)
#define CH_CFG_USE_SEMAPHORES TRUE
#endif
/**
* @brief Semaphores queuing mode.
* @details If enabled then the threads are enqueued on semaphores by
* priority rather than in FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special
* requirements.
* @note Requires @p CH_CFG_USE_SEMAPHORES.
*/
#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY)
#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
#endif
/**
* @brief Mutexes APIs.
* @details If enabled then the mutexes APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_CFG_USE_MUTEXES)
#define CH_CFG_USE_MUTEXES TRUE
#endif
/**
* @brief Enables recursive behavior on mutexes.
* @note Recursive mutexes are heavier and have an increased
* memory footprint.
*
* @note The default is @p FALSE.
* @note Requires @p CH_CFG_USE_MUTEXES.
*/
#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE)
#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
#endif
/**
* @brief Conditional Variables APIs.
* @details If enabled then the conditional variables APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_CFG_USE_MUTEXES.
*/
#if !defined(CH_CFG_USE_CONDVARS)
#define CH_CFG_USE_CONDVARS TRUE
#endif
/**
* @brief Conditional Variables APIs with timeout.
* @details If enabled then the conditional variables APIs with timeout
* specification are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_CFG_USE_CONDVARS.
*/
#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT)
#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
#endif
/**
* @brief Events Flags APIs.
* @details If enabled then the event flags APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_CFG_USE_EVENTS)
#define CH_CFG_USE_EVENTS TRUE
#endif
/**
* @brief Events Flags APIs with timeout.
* @details If enabled then the events APIs with timeout specification
* are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_CFG_USE_EVENTS.
*/
#if !defined(CH_CFG_USE_EVENTS_TIMEOUT)
#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
#endif
/**
* @brief Synchronous Messages APIs.
* @details If enabled then the synchronous messages APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_CFG_USE_MESSAGES)
#define CH_CFG_USE_MESSAGES TRUE
#endif
/**
* @brief Synchronous Messages queuing mode.
* @details If enabled then messages are served by priority rather than in
* FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special
* requirements.
* @note Requires @p CH_CFG_USE_MESSAGES.
*/
#if !defined(CH_CFG_USE_MESSAGES_PRIORITY)
#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
#endif
/**
* @brief Dynamic Threads APIs.
* @details If enabled then the dynamic threads creation APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_CFG_USE_WAITEXIT.
* @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
*/
#if !defined(CH_CFG_USE_DYNAMIC)
#define CH_CFG_USE_DYNAMIC TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name OSLIB options
* @{
*/
/*===========================================================================*/
/**
* @brief Mailboxes APIs.
* @details If enabled then the asynchronous messages (mailboxes) APIs are
* included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_CFG_USE_SEMAPHORES.
*/
#if !defined(CH_CFG_USE_MAILBOXES)
#define CH_CFG_USE_MAILBOXES TRUE
#endif
/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_CFG_USE_MEMCORE)
#define CH_CFG_USE_MEMCORE TRUE
#endif
/**
* @brief Managed RAM size.
* @details Size of the RAM area to be managed by the OS. If set to zero
* then the whole available RAM is used. The core memory is made
* available to the heap allocator and/or can be used directly through
* the simplified core memory allocator.
*
* @note In order to let the OS manage the whole RAM the linker script must
* provide the @p __heap_base__ and @p __heap_end__ symbols.
* @note Requires @p CH_CFG_USE_MEMCORE.
*/
#if !defined(CH_CFG_MEMCORE_SIZE)
#define CH_CFG_MEMCORE_SIZE 0
#endif
/**
* @brief Heap Allocator APIs.
* @details If enabled then the memory heap allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
* @p CH_CFG_USE_SEMAPHORES.
* @note Mutexes are recommended.
*/
#if !defined(CH_CFG_USE_HEAP)
#define CH_CFG_USE_HEAP TRUE
#endif
/**
* @brief Memory Pools Allocator APIs.
* @details If enabled then the memory pools allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_CFG_USE_MEMPOOLS)
#define CH_CFG_USE_MEMPOOLS TRUE
#endif
/**
* @brief Objects FIFOs APIs.
* @details If enabled then the objects FIFOs APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_CFG_USE_OBJ_FIFOS)
#define CH_CFG_USE_OBJ_FIFOS TRUE
#endif
/**
* @brief Pipes APIs.
* @details If enabled then the pipes APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_CFG_USE_PIPES)
#define CH_CFG_USE_PIPES TRUE
#endif
/**
* @brief Objects Caches APIs.
* @details If enabled then the objects caches APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_CFG_USE_OBJ_CACHES)
#define CH_CFG_USE_OBJ_CACHES TRUE
#endif
/**
* @brief Delegate threads APIs.
* @details If enabled then the delegate threads APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_CFG_USE_DELEGATES)
#define CH_CFG_USE_DELEGATES TRUE
#endif
/**
* @brief Jobs Queues APIs.
* @details If enabled then the jobs queues APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_CFG_USE_JOBS)
#define CH_CFG_USE_JOBS TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Objects factory options
* @{
*/
/*===========================================================================*/
/**
* @brief Objects Factory APIs.
* @details If enabled then the objects factory APIs are included in the
* kernel.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_CFG_USE_FACTORY)
#define CH_CFG_USE_FACTORY TRUE
#endif
/**
* @brief Maximum length for object names.
* @details If the specified length is zero then the name is stored by
* pointer but this could have unintended side effects.
*/
#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH)
#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8
#endif
/**
* @brief Enables the registry of generic objects.
*/
#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY)
#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE
#endif
/**
* @brief Enables factory for generic buffers.
*/
#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS)
#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE
#endif
/**
* @brief Enables factory for semaphores.
*/
#if !defined(CH_CFG_FACTORY_SEMAPHORES)
#define CH_CFG_FACTORY_SEMAPHORES TRUE
#endif
/**
* @brief Enables factory for mailboxes.
*/
#if !defined(CH_CFG_FACTORY_MAILBOXES)
#define CH_CFG_FACTORY_MAILBOXES TRUE
#endif
/**
* @brief Enables factory for objects FIFOs.
*/
#if !defined(CH_CFG_FACTORY_OBJ_FIFOS)
#define CH_CFG_FACTORY_OBJ_FIFOS TRUE
#endif
/**
* @brief Enables factory for Pipes.
*/
#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__)
#define CH_CFG_FACTORY_PIPES TRUE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Debug options
* @{
*/
/*===========================================================================*/
/**
* @brief Debug option, kernel statistics.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_STATISTICS)
#define CH_DBG_STATISTICS FALSE
#endif
/**
* @brief Debug option, system state check.
* @details If enabled the correct call protocol for system APIs is checked
* at runtime.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_SYSTEM_STATE_CHECK)
#define CH_DBG_SYSTEM_STATE_CHECK FALSE
#endif
/**
* @brief Debug option, parameters checks.
* @details If enabled then the checks on the API functions input
* parameters are activated.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_CHECKS)
#define CH_DBG_ENABLE_CHECKS FALSE
#endif
/**
* @brief Debug option, consistency checks.
* @details If enabled then all the assertions in the kernel code are
* activated. This includes consistency checks inside the kernel,
* runtime anomalies and port-defined checks.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_ASSERTS)
#define CH_DBG_ENABLE_ASSERTS FALSE
#endif
/**
* @brief Debug option, trace buffer.
* @details If enabled then the trace buffer is activated.
*
* @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
*/
#if !defined(CH_DBG_TRACE_MASK)
#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
#endif
/**
* @brief Trace buffer entries.
* @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
* different from @p CH_DBG_TRACE_MASK_DISABLED.
*/
#if !defined(CH_DBG_TRACE_BUFFER_SIZE)
#define CH_DBG_TRACE_BUFFER_SIZE 128
#endif
/**
* @brief Debug option, stack checks.
* @details If enabled then a runtime stack check is performed.
*
* @note The default is @p FALSE.
* @note The stack check is performed in a architecture/port dependent way.
* It may not be implemented or some ports.
* @note The default failure mode is to halt the system with the global
* @p panic_msg variable set to @p NULL.
*/
#if !defined(CH_DBG_ENABLE_STACK_CHECK)
#define CH_DBG_ENABLE_STACK_CHECK FALSE
#endif
/**
* @brief Debug option, stacks initialization.
* @details If enabled then the threads working area is filled with a byte
* value when a thread is created. This can be useful for the
* runtime measurement of the used stack.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_FILL_THREADS)
#define CH_DBG_FILL_THREADS FALSE
#endif
/**
* @brief Debug option, threads profiling.
* @details If enabled then a field is added to the @p thread_t structure that
* counts the system ticks occurred while executing the thread.
*
* @note The default is @p FALSE.
* @note This debug option is not currently compatible with the
* tickless mode.
*/
#if !defined(CH_DBG_THREADS_PROFILING)
#define CH_DBG_THREADS_PROFILING FALSE
#endif
/** @} */
/*===========================================================================*/
/**
* @name Kernel hooks
* @{
*/
/*===========================================================================*/
/**
* @brief System structure extension.
* @details User fields added to the end of the @p ch_system_t structure.
*/
#define CH_CFG_SYSTEM_EXTRA_FIELDS \
/* Add threads custom fields here.*/
/**
* @brief System initialization hook.
* @details User initialization code added to the @p chSysInit() function
* just before interrupts are enabled globally.
*/
#define CH_CFG_SYSTEM_INIT_HOOK() { \
/* Add threads initialization code here.*/ \
}
/**
* @brief Threads descriptor structure extension.
* @details User fields added to the end of the @p thread_t structure.
*/
#define CH_CFG_THREAD_EXTRA_FIELDS \
/* Add threads custom fields here.*/
/**
* @brief Threads initialization hook.
* @details User initialization code added to the @p _thread_init() function.
*
* @note It is invoked from within @p _thread_init() and implicitly from all
* the threads creation APIs.
*/
#define CH_CFG_THREAD_INIT_HOOK(tp) { \
/* Add threads initialization code here.*/ \
}
/**
* @brief Threads finalization hook.
* @details User finalization code added to the @p chThdExit() API.
*/
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
/* Add threads finalization code here.*/ \
}
/**
* @brief Context switch hook.
* @details This hook is invoked just before switching between threads.
*/
#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
/* Context switch code here.*/ \
}
/**
* @brief ISR enter hook.
*/
#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
/* IRQ prologue code here.*/ \
}
/**
* @brief ISR exit hook.
*/
#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
/* IRQ epilogue code here.*/ \
}
/**
* @brief Idle thread enter hook.
* @note This hook is invoked within a critical zone, no OS functions
* should be invoked from here.
* @note This macro can be used to activate a power saving mode.
*/
#define CH_CFG_IDLE_ENTER_HOOK() { \
/* Idle-enter code here.*/ \
}
/**
* @brief Idle thread leave hook.
* @note This hook is invoked within a critical zone, no OS functions
* should be invoked from here.
* @note This macro can be used to deactivate a power saving mode.
*/
#define CH_CFG_IDLE_LEAVE_HOOK() { \
/* Idle-leave code here.*/ \
}
/**
* @brief Idle Loop hook.
* @details This hook is continuously invoked by the idle thread loop.
*/
#define CH_CFG_IDLE_LOOP_HOOK() { \
/* Idle loop code here.*/ \
}
/**
* @brief System tick event hook.
* @details This hook is invoked in the system tick handler immediately
* after processing the virtual timers queue.
*/
#define CH_CFG_SYSTEM_TICK_HOOK() { \
/* System tick event code here.*/ \
}
/**
* @brief System halt hook.
* @details This hook is invoked in case to a system halting error before
* the system is halted.
*/
#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
/* System halt code here.*/ \
}
/**
* @brief Trace hook.
* @details This hook is invoked each time a new record is written in the
* trace buffer.
*/
#define CH_CFG_TRACE_HOOK(tep) { \
/* Trace code here.*/ \
}
/** @} */
/*===========================================================================*/
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
#endif /* CHCONF_H */
/** @} */

7
misc/stm32f1_test_project/clean_build.bat
View File

@ -1,7 +0,0 @@
rem make, gcc, Windows and Cygwin combined have some issue with spaces or colons in paths, that's a workaround
rem that's more or less 'make clean'
rd /s /q .dep
rd /s /q build
# that's 'make' with some extra utilities
compile.bat

8
misc/stm32f1_test_project/compile.bat
View File

@ -1,8 +0,0 @@
rd /s /q .dep
echo Starting compilation
rem the important piece
make -j12
call flash

1
misc/stm32f1_test_project/flash.bat
View File

@ -1 +0,0 @@
st-link_cli -c SWD ur -P build\ch.hex -Rst -Run

531
misc/stm32f1_test_project/halconf.h
View File

@ -1,531 +0,0 @@
/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file templates/halconf.h
* @brief HAL configuration header.
* @details HAL configuration file, this file allows to enable or disable the
* various device drivers from your application. You may also use
* this file in order to override the device drivers default settings.
*
* @addtogroup HAL_CONF
* @{
*/
#ifndef HALCONF_H
#define HALCONF_H
#define _CHIBIOS_HAL_CONF_
#define _CHIBIOS_HAL_CONF_VER_7_1_
#include "mcuconf.h"
/**
* @brief Enables the PAL subsystem.
*/
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
#define HAL_USE_PAL TRUE
#endif
/**
* @brief Enables the ADC subsystem.
*/
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
#define HAL_USE_ADC FALSE
#endif
/**
* @brief Enables the CAN subsystem.
*/
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
#define HAL_USE_CAN TRUE
#endif
/**
* @brief Enables the cryptographic subsystem.
*/
#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
#define HAL_USE_CRY FALSE
#endif
/**
* @brief Enables the DAC subsystem.
*/
#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
#define HAL_USE_DAC FALSE
#endif
/**
* @brief Enables the EFlash subsystem.
*/
#if !defined(HAL_USE_EFL) || defined(__DOXYGEN__)
#define HAL_USE_EFL TRUE
#endif
/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
#define HAL_USE_GPT FALSE
#endif
/**
* @brief Enables the I2C subsystem.
*/
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
#define HAL_USE_I2C FALSE
#endif
/**
* @brief Enables the I2S subsystem.
*/
#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
#define HAL_USE_I2S FALSE
#endif
/**
* @brief Enables the ICU subsystem.
*/
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
#define HAL_USE_ICU FALSE
#endif
/**
* @brief Enables the MAC subsystem.
*/
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
#define HAL_USE_MAC FALSE
#endif
/**
* @brief Enables the MMC_SPI subsystem.
*/
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
#define HAL_USE_MMC_SPI TRUE
#endif
/**
* @brief Enables the PWM subsystem.
*/
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
#define HAL_USE_PWM FALSE
#endif
/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif
/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
#define HAL_USE_SDC FALSE
#endif
/**
* @brief Enables the SERIAL subsystem.
*/
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL FALSE
#endif
/**
* @brief Enables the SERIAL over USB subsystem.
*/
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL_USB FALSE
#endif
/**
* @brief Enables the SIO subsystem.
*/
#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__)
#define HAL_USE_SIO FALSE
#endif
/**
* @brief Enables the SPI subsystem.
*/
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
#define HAL_USE_SPI TRUE
#endif
/**
* @brief Enables the TRNG subsystem.
*/
#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__)
#define HAL_USE_TRNG FALSE
#endif
/**
* @brief Enables the UART subsystem.
*/
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
#define HAL_USE_UART TRUE
#endif
/**
* @brief Enables the USB subsystem.
*/
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
#define HAL_USE_USB FALSE
#endif
/**
* @brief Enables the WDG subsystem.
*/
#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
#define HAL_USE_WDG FALSE
#endif
/**
* @brief Enables the WSPI subsystem.
*/
#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__)
#define HAL_USE_WSPI FALSE
#endif
/*===========================================================================*/
/* PAL driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)
#define PAL_USE_CALLBACKS FALSE
#endif
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
#define PAL_USE_WAIT FALSE
#endif
/*===========================================================================*/
/* ADC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
#define ADC_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define ADC_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* CAN driver related settings. */
/*===========================================================================*/
/**
* @brief Sleep mode related APIs inclusion switch.
*/
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
#define CAN_USE_SLEEP_MODE TRUE
#endif
/**
* @brief Enforces the driver to use direct callbacks rather than OSAL events.
*/
#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__)
#define CAN_ENFORCE_USE_CALLBACKS FALSE
#endif
/*===========================================================================*/
/* CRY driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the SW fall-back of the cryptographic driver.
* @details When enabled, this option, activates a fall-back software
* implementation for algorithms not supported by the underlying
* hardware.
* @note Fall-back implementations may not be present for all algorithms.
*/
#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
#define HAL_CRY_USE_FALLBACK FALSE
#endif
/**
* @brief Makes the driver forcibly use the fall-back implementations.
*/
#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
#define HAL_CRY_ENFORCE_FALLBACK FALSE
#endif
/*===========================================================================*/
/* DAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__)
#define DAC_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define DAC_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* I2C driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the mutual exclusion APIs on the I2C bus.
*/
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define I2C_USE_MUTUAL_EXCLUSION TRUE
#endif
/*===========================================================================*/
/* MAC driver related settings. */
/*===========================================================================*/
/**
* @brief Enables the zero-copy API.
*/
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
#define MAC_USE_ZERO_COPY FALSE
#endif
/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif
/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
* This option is recommended also if the SPI driver does not
* use a DMA channel and heavily loads the CPU.
*/
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
#define MMC_NICE_WAITING TRUE
#endif
/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/
/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intervals.
*/
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
#define SDC_INIT_RETRY 100
#endif
/**
* @brief Include support for MMC cards.
* @note MMC support is not yet implemented so this option must be kept
* at @p FALSE.
*/
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
#define SDC_MMC_SUPPORT FALSE
#endif
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
*/
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
#define SDC_NICE_WAITING TRUE
#endif
/**
* @brief OCR initialization constant for V20 cards.
*/
#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__)
#define SDC_INIT_OCR_V20 0x50FF8000U
#endif
/**
* @brief OCR initialization constant for non-V20 cards.
*/
#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__)
#define SDC_INIT_OCR 0x80100000U
#endif
/*===========================================================================*/
/* SERIAL driver related settings. */
/*===========================================================================*/
/**
* @brief Default bit rate.
* @details Configuration parameter, this is the baud rate selected for the
* default configuration.
*/
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
#define SERIAL_DEFAULT_BITRATE 38400
#endif
/**
* @brief Serial buffers size.
* @details Configuration parameter, you can change the depth of the queue
* buffers depending on the requirements of your application.
* @note The default is 16 bytes for both the transmission and receive
* buffers.
*/
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
#define SERIAL_BUFFERS_SIZE 16
#endif
/*===========================================================================*/
/* SERIAL_USB driver related setting. */
/*===========================================================================*/
/**
* @brief Serial over USB buffers size.
* @details Configuration parameter, the buffer size must be a multiple of
* the USB data endpoint maximum packet size.
* @note The default is 256 bytes for both the transmission and receive
* buffers.
*/
#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
#define SERIAL_USB_BUFFERS_SIZE 256
#endif
/**
* @brief Serial over USB number of buffers.
* @note The default is 2 buffers.
*/
#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
#define SERIAL_USB_BUFFERS_NUMBER 2
#endif
/*===========================================================================*/
/* SPI driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
#define SPI_USE_WAIT TRUE
#endif
/**
* @brief Enables circular transfers APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__)
#define SPI_USE_CIRCULAR FALSE
#endif
/**
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif
/**
* @brief Handling method for SPI CS line.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__)
#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD
#endif
/*===========================================================================*/
/* UART driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
#define UART_USE_WAIT FALSE
#endif
/**
* @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define UART_USE_MUTUAL_EXCLUSION FALSE
#endif
/*===========================================================================*/
/* USB driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
#define USB_USE_WAIT FALSE
#endif
/*===========================================================================*/
/* WSPI driver related settings. */
/*===========================================================================*/
/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__)
#define WSPI_USE_WAIT TRUE
#endif
/**
* @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define WSPI_USE_MUTUAL_EXCLUSION TRUE
#endif
#endif /* HALCONF_H */
/** @} */

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/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
#include "uart.h"
#include "can.h"
#include "spi.h"
#include "persistence.h"
#define BL_PORT GPIOC
#define BL_PIN 13
/*
* Red LED blinker thread, times are in milliseconds.
*/
static THD_WORKING_AREA(waThread1, 256);
static THD_FUNCTION(Thread1, arg) {
(void)arg;
chRegSetThreadName("blinker");
while (TRUE) {
palClearPad(BL_PORT, BL_PIN);
chThdSleepMilliseconds(30);
palSetPad(BL_PORT, BL_PIN);
chThdSleepMilliseconds(30);
}
return;
}
/*
* Application entry point.
*/
int main(void) {
/*
* System initializations.
* - HAL initialization, this also initializes the configured device drivers
* and performs the board-specific initializations.
* - Kernel initialization, the main() function becomes a thread and the
* RTOS is active.
*/
halInit();
chSysInit();
palSetPadMode(BL_PORT, BL_PIN, PAL_MODE_OUTPUT_PUSHPULL);
/*
* Creates the blinker thread.
*/
chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
InitConfiguration();
InitUart();
InitCan();
InitSpi();
/*
* Normal main() thread activity, in this demo it does nothing except
* sleeping in a loop and check the button state.
*/
while (TRUE) {
// if (!palReadPad(GPIOC, GPIOC_BUTTON))
// TestThread(&SD2);
chThdSleepMilliseconds(500);
}
}

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/*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#ifndef MCUCONF_H
#define MCUCONF_H
#define STM32F103_MCUCONF
/*
* STM32F103 drivers configuration.
* The following settings override the default settings present in
* the various device driver implementation headers.
* Note that the settings for each driver only have effect if the whole
* driver is enabled in halconf.h.
*
* IRQ priorities:
* 15...0 Lowest...Highest.
*
* DMA priorities:
* 0...3 Lowest...Highest.
*/
/*
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED FALSE
#define STM32_HSE_ENABLED TRUE
#define STM32_LSE_ENABLED FALSE
#define STM32_SW STM32_SW_PLL
#define STM32_PLLSRC STM32_PLLSRC_HSE
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
#define STM32_PLLMUL_VALUE 9
#define STM32_HPRE STM32_HPRE_DIV1
#define STM32_PPRE1 STM32_PPRE1_DIV2
#define STM32_PPRE2 STM32_PPRE2_DIV2
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USB_CLOCK_REQUIRED TRUE
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
#define STM32_RTCSEL STM32_RTCSEL_HSEDIV
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
/*
* IRQ system settings.
*/
#define STM32_IRQ_EXTI0_PRIORITY 6
#define STM32_IRQ_EXTI1_PRIORITY 6
#define STM32_IRQ_EXTI2_PRIORITY 6
#define STM32_IRQ_EXTI3_PRIORITY 6
#define STM32_IRQ_EXTI4_PRIORITY 6
#define STM32_IRQ_EXTI5_9_PRIORITY 6
#define STM32_IRQ_EXTI10_15_PRIORITY 6
#define STM32_IRQ_EXTI16_PRIORITY 6
#define STM32_IRQ_EXTI17_PRIORITY 6
#define STM32_IRQ_EXTI18_PRIORITY 6
#define STM32_IRQ_EXTI19_PRIORITY 6
/*
* ADC driver system settings.
*/
#define STM32_ADC_USE_ADC1 FALSE
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC1_IRQ_PRIORITY 6
/*
* CAN driver system settings.
*/
#define STM32_CAN_USE_CAN1 TRUE
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
/*
* GPT driver system settings.
*/
#define STM32_GPT_USE_TIM1 FALSE
#define STM32_GPT_USE_TIM2 FALSE
#define STM32_GPT_USE_TIM3 FALSE
#define STM32_GPT_USE_TIM4 FALSE
#define STM32_GPT_USE_TIM5 FALSE
#define STM32_GPT_USE_TIM8 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
#define STM32_GPT_TIM4_IRQ_PRIORITY 7
#define STM32_GPT_TIM5_IRQ_PRIORITY 7
#define STM32_GPT_TIM8_IRQ_PRIORITY 7
/*
* I2C driver system settings.
*/
#define STM32_I2C_USE_I2C1 FALSE
#define STM32_I2C_USE_I2C2 FALSE
#define STM32_I2C_BUSY_TIMEOUT 50
#define STM32_I2C_I2C1_IRQ_PRIORITY 5
#define STM32_I2C_I2C2_IRQ_PRIORITY 5
#define STM32_I2C_I2C1_DMA_PRIORITY 3
#define STM32_I2C_I2C2_DMA_PRIORITY 3
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/*
* ICU driver system settings.
*/
#define STM32_ICU_USE_TIM1 FALSE
#define STM32_ICU_USE_TIM2 FALSE
#define STM32_ICU_USE_TIM3 FALSE
#define STM32_ICU_USE_TIM4 FALSE
#define STM32_ICU_USE_TIM5 FALSE
#define STM32_ICU_USE_TIM8 FALSE
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
/*
* PWM driver system settings.
*/
#define STM32_PWM_USE_ADVANCED FALSE
#define STM32_PWM_USE_TIM1 FALSE
#define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_USE_TIM4 FALSE
#define STM32_PWM_USE_TIM5 FALSE
#define STM32_PWM_USE_TIM8 FALSE
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
#define STM32_PWM_TIM8_IRQ_PRIORITY 7
/*
* RTC driver system settings.
*/
#define STM32_RTC_IRQ_PRIORITY 15
/*
* SERIAL driver system settings.
*/
#define STM32_SERIAL_USE_USART1 FALSE
#define STM32_SERIAL_USE_USART2 FALSE
#define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
/*
* SPI driver system settings.
*/
#define STM32_SPI_USE_SPI1 FALSE
#define STM32_SPI_USE_SPI2 TRUE
#define STM32_SPI_USE_SPI3 FALSE
#define STM32_SPI_SPI1_DMA_PRIORITY 1
#define STM32_SPI_SPI2_DMA_PRIORITY 1
#define STM32_SPI_SPI3_DMA_PRIORITY 1
#define STM32_SPI_SPI1_IRQ_PRIORITY 10
#define STM32_SPI_SPI2_IRQ_PRIORITY 10
#define STM32_SPI_SPI3_IRQ_PRIORITY 10
#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
/*
* ST driver system settings.
*/
#define STM32_ST_IRQ_PRIORITY 8
#define STM32_ST_USE_TIMER 2
/*
* UART driver system settings.
*/
#define STM32_UART_USE_USART1 TRUE
#define STM32_UART_USE_USART2 FALSE
#define STM32_UART_USE_USART3 FALSE
#define STM32_UART_USART1_IRQ_PRIORITY 12
#define STM32_UART_USART2_IRQ_PRIORITY 12
#define STM32_UART_USART3_IRQ_PRIORITY 12
#define STM32_UART_USART1_DMA_PRIORITY 0
#define STM32_UART_USART2_DMA_PRIORITY 0
#define STM32_UART_USART3_DMA_PRIORITY 0
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
/*
* USB driver system settings.
*/
#define STM32_USB_USE_USB1 FALSE
#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
#define STM32_USB_USB1_HP_IRQ_PRIORITY 13
#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
/*
* WDG driver system settings.
*/
#define STM32_WDG_USE_IWDG FALSE
#endif /* MCUCONF_H */

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#include "hal.h"
#include "persistence.h"
static const MFSConfig mfscfg_1k = {
.flashp = (BaseFlash *)&EFLD1,
.erased = 0xFFFFFFFFU,
// 1k page * 1 sector = 1024
.bank_size = 1024U,
.bank0_start = 62U,
.bank0_sectors = 1U,
.bank1_start = 63U,
.bank1_sectors = 1U
};
static const MFSConfig mfscfg_2k = {
.flashp = (BaseFlash *)&EFLD1,
.erased = 0xFFFFFFFFU,
/* 256K flash device with 2K pages
* use last 8 pages for settings
* one bank is 8K */
// 2k page * 4 sectors = 8096
.bank_size = 8096U,
.bank0_start = 120U,
.bank0_sectors = 4U,
.bank1_start = 124U,
.bank1_sectors = 4U
};
static MFSDriver mfs1;
TestConfiguration configuration;
static uint8_t *GetConfigurationPtr() {
return (uint8_t *)&configuration;
}
static size_t GetConfigurationSize() {
return sizeof(TestConfiguration);
}
static bool isMfsOkIsh(mfs_error_t state) {
return state == MFS_NO_ERROR || state == MFS_WARN_REPAIR || state == MFS_WARN_GC;
}
mfs_error_t flashState;
int InitConfiguration() {
/* Starting EFL driver.*/
eflStart(&EFLD1, NULL);
mfsObjectInit(&mfs1);
#define FLASH_SIZE_IN_K_ADDRESS 0x1FFFF7E0
int flashSize = (*(uint16_t*)FLASH_SIZE_IN_K_ADDRESS);
if (flashSize > 128) {
flashState = mfsStart(&mfs1, &mfscfg_2k);
} else {
flashState = mfsStart(&mfs1, &mfscfg_1k);
}
size_t size = GetConfigurationSize();
flashState = mfsReadRecord(&mfs1, MFS_CONFIGURATION_RECORD_ID, &size, GetConfigurationPtr());
if (!isMfsOkIsh(flashState) || size != GetConfigurationSize() || !configuration.IsValid()) {
/* load defaults */
configuration.resetToDefaults();
} else {
configuration.rebootCounter++;
}
return 0;
}
void pokeConfiguration() {
configuration.updateCounter++;
flashState = mfsWriteRecord(&mfs1, MFS_CONFIGURATION_RECORD_ID, GetConfigurationSize(), GetConfigurationPtr());
}

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#pragma once
#include "hal_mfs.h"
#define PERSISTENCE_VERSION 41
#define MFS_CONFIGURATION_RECORD_ID 1
struct TestConfiguration {
void resetToDefaults() {
version = PERSISTENCE_VERSION;
updateCounter = 100;
rebootCounter = 10;
}
bool IsValid() const {
return version == PERSISTENCE_VERSION;
}
int version;
int updateCounter;
int rebootCounter;
};
int InitConfiguration();
void pokeConfiguration();

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We used to have stm32f1 reference ChibiOS project here, see https://github.com/rusefi/rusefi/tree/lts-2023_01 if you ever need it.

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*****************************************************************************
** ChibiOS/RT port for ARM-Cortex-M3 STM32F103. **
*****************************************************************************
** TARGET **
The demo runs on an ST_NUCLEO_F103RB board.
** The Demo **
The demo flashes the board LED using a thread, by pressing the button located
on the board the test procedure is activated with output on the serial port
SD2 (USART2, mapped on USB virtual COM port).
** Build Procedure **
The demo has been tested by using the free Codesourcery GCC-based toolchain
and YAGARTO.
Just modify the TRGT line in the makefile in order to use different GCC ports.
** Notes **
Some files used by the demo are not part of ChibiOS/RT but are copyright of
ST Microelectronics and are licensed under a different license.
Also note that not all the files present in the ST library are distributed
with ChibiOS/RT, you can find the whole library on the ST web site:
http://www.st.com

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#include "can.h"
#include "hal.h"
#include "spi.h"
#include <cstdint>
#define SPI_CS_PORT GPIOA
#define SPI_CS_PIN 4
/* Low speed SPI configuration (281.250kHz, CPHA=0, CPOL=0, MSb first).*/
static SPIConfig ls_spicfg = {false, NULL, SPI_CS_PORT, SPI_CS_PIN,
SPI_CR1_BR_2 | SPI_CR1_BR_1,
0};
/*
* SPI TX and RX buffers.
*/
static uint8_t txbuf[512];
static uint8_t rxbuf[512];
void InitSpi() {
/*
* SPI1 I/O pins setup.
*/
palSetPadMode(GPIOA, 5, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* SCK. */
palSetPadMode(GPIOA, 6, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* MISO.*/
palSetPadMode(GPIOA, 7, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* MOSI.*/
palSetPadMode(SPI_CS_PORT, SPI_CS_PIN, PAL_MODE_OUTPUT_PUSHPULL);
palSetPad(SPI_CS_PORT, SPI_CS_PIN);
}

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void InitSpi();

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/**
* @file event_queue.cpp
* This is a data structure which keeps track of all pending events
* Implemented as a linked list, which is fine since the number of
* pending events is pretty low
* todo: MAYBE migrate to a better data structure, but that's low priority
*
* this data structure is NOT thread safe
*
* @date Apr 17, 2014
* @author Andrey Belomutskiy, (c) 2012-2020
*/
#include "pch.h"
#include "os_access.h"
#include "event_queue.h"
#include "efitime.h"
#include "os_util.h"
#if EFI_UNIT_TEST
extern int timeNowUs;
extern bool verboseMode;
#endif /* EFI_UNIT_TEST */
/**
* @return true if inserted into the head of the list
*/
bool EventQueue::insertTask(scheduling_s *scheduling, efitick_t timeX, action_s action) {
ScopePerf perf(PE::EventQueueInsertTask);
#if EFI_UNIT_TEST
assertListIsSorted();
#endif /* EFI_UNIT_TEST */
efiAssert(CUSTOM_ERR_ASSERT, action.getCallback() != NULL, "NULL callback", false);
// please note that simulator does not use this code at all - simulator uses signal_executor_sleep
if (scheduling->action) {
#if EFI_UNIT_TEST
if (verboseMode) {
printf("Already scheduled was %d\r\n", (int)scheduling->momentX);
printf("Already scheduled now %d\r\n", (int)timeX);
}
#endif /* EFI_UNIT_TEST */
return false;
}
scheduling->momentX = timeX;
scheduling->action = action;
if (head == NULL || timeX < head->momentX) {
// here we insert into head of the linked list
LL_PREPEND2(head, scheduling, nextScheduling_s);
#if EFI_UNIT_TEST
assertListIsSorted();
#endif /* EFI_UNIT_TEST */
return true;
} else {
// here we know we are not in the head of the list, let's find the position - linear search
scheduling_s *insertPosition = head;
while (insertPosition->nextScheduling_s != NULL && insertPosition->nextScheduling_s->momentX < timeX) {
insertPosition = insertPosition->nextScheduling_s;
}
scheduling->nextScheduling_s = insertPosition->nextScheduling_s;
insertPosition->nextScheduling_s = scheduling;
#if EFI_UNIT_TEST
assertListIsSorted();
#endif /* EFI_UNIT_TEST */
return false;
}
}
void EventQueue::remove(scheduling_s* scheduling) {
#if EFI_UNIT_TEST
assertListIsSorted();
#endif /* EFI_UNIT_TEST */
// Special case: event isn't scheduled, so don't cancel it
if (!scheduling->action) {
return;
}
// Special case: empty list, nothing to do
if (!head) {
return;
}
// Special case: is the item to remove at the head?
if (scheduling == head) {
head = head->nextScheduling_s;
scheduling->nextScheduling_s = nullptr;
scheduling->action = {};
} else {
auto prev = head; // keep track of the element before the one to remove, so we can link around it
auto current = prev->nextScheduling_s;
// Find our element
while (current && current != scheduling) {
prev = current;
current = current->nextScheduling_s;
}
// Walked off the end, this is an error since this *should* have been scheduled
if (!current) {
criticalError("EventQueue::remove didn't find element");
return;
}
efiAssertVoid(ObdCode::OBD_PCM_Processor_Fault, current == scheduling, "current not equal to scheduling");
// Link around the removed item
prev->nextScheduling_s = current->nextScheduling_s;
// Clean the item to remove
current->nextScheduling_s = nullptr;
current->action = {};
}
#if EFI_UNIT_TEST
assertListIsSorted();
#endif /* EFI_UNIT_TEST */
}
/**
* On this layer it does not matter which units are used - us, ms ot nt.
*
* This method is always invoked under a lock
* @return Get the timestamp of the soonest pending action, skipping all the actions in the past
*/
expected<efitick_t> EventQueue::getNextEventTime(efitick_t nowX) const {
if (head != NULL) {
if (head->momentX <= nowX) {
/**
* We are here if action timestamp is in the past. We should rarely be here since this 'getNextEventTime()' is
* always invoked by 'scheduleTimerCallback' which is always invoked right after 'executeAllPendingActions' - but still,
* for events which are really close to each other we would end up here.
*
* looks like we end up here after 'writeconfig' (which freezes the firmware) - we are late
* for the next scheduled event
*/
return nowX + lateDelay;
} else {
return head->momentX;
}
}
return unexpected;
}
/**
* See also maxPrecisionCallbackDuration for total hw callback time
*/
uint32_t maxEventCallbackDuration = 0;
/**
* Invoke all pending actions prior to specified timestamp
* @return number of executed actions
*/
int EventQueue::executeAll(efitick_t now) {
ScopePerf perf(PE::EventQueueExecuteAll);
int executionCounter = 0;
#if EFI_UNIT_TEST
assertListIsSorted();
#endif
bool didExecute;
do {
didExecute = executeOne(now);
executionCounter += didExecute ? 1 : 0;
} while (didExecute);
return executionCounter;
}
bool EventQueue::executeOne(efitick_t now) {
// Read the head every time - a previously executed event could
// have inserted something new at the head
scheduling_s* current = head;
// Queue is empty - bail
if (!current) {
return false;
}
// If the next event is far in the future, we'll reschedule
// and execute it next time.
// We do this when the next event is close enough that the overhead of
// resetting the timer and scheduling an new interrupt is greater than just
// waiting for the time to arrive. On current CPUs, this is reasonable to set
// around 10 microseconds.
if (current->momentX > now + lateDelay) {
return false;
}
// near future - spin wait for the event to happen and avoid the
// overhead of rescheduling the timer.
// yes, that's a busy wait but that's what we need here
while (current->momentX > getTimeNowNt()) {
UNIT_TEST_BUSY_WAIT_CALLBACK();
}
// step the head forward, unlink this element, clear scheduled flag
head = current->nextScheduling_s;
current->nextScheduling_s = nullptr;
// Grab the action but clear it in the event so we can reschedule from the action's execution
auto action = current->action;
current->action = {};
#if EFI_UNIT_TEST
printf("QUEUE: execute current=%d param=%d\r\n", (uintptr_t)current, (uintptr_t)action.getArgument());
#endif
// Execute the current element
{
ScopePerf perf2(PE::EventQueueExecuteCallback);
action.execute();
}
#if EFI_UNIT_TEST
// (tests only) Ensure we didn't break anything
assertListIsSorted();
#endif
return true;
}
int EventQueue::size(void) const {
scheduling_s *tmp;
int result;
LL_COUNT2(head, tmp, result, nextScheduling_s);
return result;
}
void EventQueue::assertListIsSorted() const {
scheduling_s *current = head;
while (current != NULL && current->nextScheduling_s != NULL) {
efiAssertVoid(ObdCode::CUSTOM_ERR_6623, current->momentX <= current->nextScheduling_s->momentX, "list order");
current = current->nextScheduling_s;
}
}
scheduling_s * EventQueue::getHead() {
return head;
}
// todo: reduce code duplication with another 'getElementAtIndexForUnitText'
scheduling_s *EventQueue::getElementAtIndexForUnitText(int index) {
scheduling_s * current;
LL_FOREACH2(head, current, nextScheduling_s)
{
if (index == 0)
return current;
index--;
}
return NULL;
}
void EventQueue::clear(void) {
// Flush the queue, resetting all scheduling_s as though we'd executed them
while(head) {
auto x = head;
// link next element to head
head = x->nextScheduling_s;
// Reset this element
x->momentX = 0;
x->nextScheduling_s = nullptr;
x->action = {};
}
head = nullptr;
}

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/**
* @file event_queue.h
*
* @date Apr 17, 2014
* @author Andrey Belomutskiy, (c) 2012-2020
*/
#include "scheduler.h"
#include "utlist.h"
#include "expected.h"
#pragma once
#define QUEUE_LENGTH_LIMIT 1000
// templates do not accept field names so we use a macro here
#define assertNotInListMethodBody(T, head, element, field) \
/* this code is just to validate state, no functional load*/ \
T * current; \
int counter = 0; \
LL_FOREACH2(head, current, field) { \
if (++counter > QUEUE_LENGTH_LIMIT) { \
firmwareError(ObdCode::CUSTOM_ERR_LOOPED_QUEUE, "Looped queue?"); \
return false; \
} \
if (current == element) { \
/** \
* for example, this might happen in case of sudden RPM change if event \
* was not scheduled by angle but was scheduled by time. In case of scheduling \
* by time with slow RPM the whole next fast revolution might be within the wait period \
*/ \
warning(ObdCode::CUSTOM_RE_ADDING_INTO_EXECUTION_QUEUE, "re-adding element into event_queue"); \
return true; \
} \
} \
return false;
/**
* Execution sorted linked list
*/
class EventQueue {
public:
// See comment in EventQueue::executeAll for info about lateDelay - it sets the
// time gap between events for which we will wait instead of rescheduling the next
// event in a group of events near one another.
EventQueue(efitick_t lateDelay = 0) : lateDelay(lateDelay) {}
/**
* O(size) - linear search in sorted linked list
*/
bool insertTask(scheduling_s *scheduling, efitick_t timeX, action_s action);
void remove(scheduling_s* scheduling);
int executeAll(efitick_t now);
bool executeOne(v now);
expected<efitick_t> getNextEventTime(efitick_t nowX) const;
void clear(void);
int size(void) const;
scheduling_s *getElementAtIndexForUnitText(int index);
scheduling_s * getHead();
void assertListIsSorted() const;
private:
/**
* this list is sorted
*/
scheduling_s *head = nullptr;
const efitick_t lateDelay;
};

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/**
* @file microsecond_timer.cpp
*
* Here we have a 1MHz timer dedicated to event scheduling. We are using one of the 32-bit timers here,
* so this timer can schedule events up to 4B/100M ~ 4000 seconds ~ 1 hour from current time.
*
* GPT5 timer clock: 84000000Hz
* If only it was a better multiplier of 2 (84000000 = 328125 * 256)
*
* @date Apr 14, 2014
* @author Andrey Belomutskiy, (c) 2012-2020
*/
#include "pch.h"
#include "microsecond_timer.h"
#include "port_microsecond_timer.h"
#if EFI_PROD_CODE
#include "periodic_task.h"
// Just in case we have a mechanism to validate that hardware timer is clocked right and all the
// conversions between wall clock and hardware frequencies are done right
// delay in milliseconds
#define TEST_CALLBACK_DELAY 10
// if hardware timer is 20% off we throw a critical error and call it a day
// maybe this threshold should be 5%? 10%?
#define TIMER_PRECISION_THRESHOLD 0.2
/**
* Maximum duration of complete timer callback, all pending events together
* See also 'maxEventCallbackDuration' for maximum duration of one event
*/
uint32_t maxPrecisionCallbackDuration = 0;
static efitick_t lastSetTimerTimeNt;
static bool isTimerPending = false;
static int timerCallbackCounter = 0;
static int timerRestartCounter = 0;
static const char * msg;
static int timerFreezeCounter = 0;
static int setHwTimerCounter = 0;
static bool hwStarted = false;
/**
* sets the alarm to the specified number of microseconds from now.
* This function should be invoked under kernel lock which would disable interrupts.
*/
void setHardwareSchedulerTimer(efitick_t nowNt, efitick_t setTimeNt) {
efiAssertVoid(ObdCode::OBD_PCM_Processor_Fault, hwStarted, "HW.started");
// How many ticks in the future is this event?
auto timeDeltaNt = setTimeNt - nowNt;
setHwTimerCounter++;
/**
* #259 BUG error: not positive deltaTimeNt
* Once in a while we night get an interrupt where we do not expect it
*/
if (timeDeltaNt <= 0) {
timerFreezeCounter++;
warning(ObdCode::CUSTOM_OBD_LOCAL_FREEZE, "local freeze cnt=%d", timerFreezeCounter);
}
// We need the timer to fire after we return - 1 doesn't work as it may actually schedule in the past
if (timeDeltaNt < US2NT(2)) {
timeDeltaNt = US2NT(2);
}
if (timeDeltaNt >= TOO_FAR_INTO_FUTURE_NT) {
// we are trying to set callback for too far into the future. This does not look right at all
firmwareError(ObdCode::CUSTOM_ERR_TIMER_OVERFLOW, "setHardwareSchedulerTimer() too far: %d", timeDeltaNt);
return;
}
// Skip scheduling if there's a firmware error active
if (hasFirmwareError()) {
return;
}
// Do the actual hardware-specific timer set operation
portSetHardwareSchedulerTimer(nowNt, setTimeNt);
lastSetTimerTimeNt = getTimeNowNt();
isTimerPending = true;
timerRestartCounter++;
}
void globalTimerCallback();
void portMicrosecondTimerCallback() {
timerCallbackCounter++;
isTimerPending = false;
uint32_t before = getTimeNowLowerNt();
globalTimerCallback();
uint32_t precisionCallbackDuration = getTimeNowLowerNt() - before;
if (precisionCallbackDuration > maxPrecisionCallbackDuration) {
maxPrecisionCallbackDuration = precisionCallbackDuration;
}
}
class MicrosecondTimerWatchdogController : public PeriodicTimerController {
void PeriodicTask() override {
efitick_t nowNt = getTimeNowNt();
if (nowNt >= lastSetTimerTimeNt + 2 * CORE_CLOCK) {
firmwareError(ObdCode::CUSTOM_ERR_SCHEDULING_ERROR, "watchdog: no events since %d", lastSetTimerTimeNt);
return;
}
msg = isTimerPending ? "No_cb too long" : "Timer not awhile";
// 2 seconds of inactivity would not look right
efiAssertVoid(ObdCode::CUSTOM_TIMER_WATCHDOG, nowNt < lastSetTimerTimeNt + 2 * CORE_CLOCK, msg);
}
int getPeriodMs() override {
return 500;
}
};
static MicrosecondTimerWatchdogController watchdogControllerInstance;
static scheduling_s watchDogBuddy;
static void watchDogBuddyCallback(void*) {
/**
* the purpose of this periodic activity is to make watchdogControllerInstance
* watchdog happy by ensuring that we have scheduler activity even in case of very broken configuration
* without any PWM or input pins
*/
engine->executor.scheduleForLater(&watchDogBuddy, MS2US(1000), watchDogBuddyCallback);
}
static volatile bool testSchedulingHappened = false;
static efitimems_t testSchedulingStart;
static void timerValidationCallback(void*) {
testSchedulingHappened = true;
efitimems_t actualTimeSinceScheduling = (currentTimeMillis() - testSchedulingStart);
if (absI(actualTimeSinceScheduling - TEST_CALLBACK_DELAY) > TEST_CALLBACK_DELAY * TIMER_PRECISION_THRESHOLD) {
firmwareError(ObdCode::CUSTOM_ERR_TIMER_TEST_CALLBACK_WRONG_TIME, "hwTimer broken precision: %ld ms", actualTimeSinceScheduling);
}
}
/**
* This method would validate that hardware timer callbacks happen with some reasonable precision
* helps to make sure our GPT hardware settings are somewhat right
*/
static void validateHardwareTimer() {
if (hasFirmwareError()) {
return;
}
testSchedulingStart = currentTimeMillis();
// to save RAM let's use 'watchDogBuddy' here once before we enable watchdog
engine->executor.scheduleForLater(&watchDogBuddy, MS2US(TEST_CALLBACK_DELAY), timerValidationCallback);
chThdSleepMilliseconds(TEST_CALLBACK_DELAY + 2);
if (!testSchedulingHappened) {
firmwareError(ObdCode::CUSTOM_ERR_TIMER_TEST_CALLBACK_NOT_HAPPENED, "hwTimer not alive");
}
}
void initMicrosecondTimer() {
portInitMicrosecondTimer();
hwStarted = true;
lastSetTimerTimeNt = getTimeNowNt();
validateHardwareTimer();
watchDogBuddyCallback(NULL);
#if EFI_EMULATE_POSITION_SENSORS
watchdogControllerInstance.start();
#endif /* EFI_EMULATE_POSITION_SENSORS */
}
#endif /* EFI_PROD_CODE */

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/**
* @file microsecond_timer.h
*
* @date Apr 14, 2014
* @author Andrey Belomutskiy, (c) 2012-2020
*/
#pragma once
void initMicrosecondTimer();
void setHardwareSchedulerTimer(efitick_t nowNt, efitick_t setTimeNt);
#define TOO_FAR_INTO_FUTURE_US (10 * US_PER_SECOND)
#define TOO_FAR_INTO_FUTURE_NT US2NT(TOO_FAR_INTO_FUTURE_US)

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#include "pch.h"
#include "port_microsecond_timer.h"
#if EFI_PROD_CODE && HAL_USE_GPT
void portSetHardwareSchedulerTimer(efitick_t nowNt, efitick_t setTimeNt) {
int32_t deltaTimeUs = NT2US((int32_t)setTimeNt - (int32_t)nowNt);
// If already set, reset the timer
if (GPTDEVICE.state == GPT_ONESHOT) {
gptStopTimerI(&GPTDEVICE);
}
if (GPTDEVICE.state != GPT_READY) {
firmwareError(ObdCode::CUSTOM_HW_TIMER, "HW timer state %d", GPTDEVICE.state);
return;
}
// Start the timer
gptStartOneShotI(&GPTDEVICE, deltaTimeUs);
}
static void hwTimerCallback(GPTDriver*) {
portMicrosecondTimerCallback();
}
/*
* The specific 1MHz frequency is important here since 'setHardwareUsTimer' method takes microsecond parameter
* For any arbitrary frequency to work we would need an additional layer of conversion.
*/
static constexpr GPTConfig gpt5cfg = { 1000000, /* 1 MHz timer clock.*/
hwTimerCallback, /* Timer callback.*/
0, 0 };
void portInitMicrosecondTimer() {
gptStart(&GPTDEVICE, &gpt5cfg);
efiAssertVoid(ObdCode::CUSTOM_ERR_TIMER_STATE, GPTDEVICE.state == GPT_READY, "hw state");
}
#endif // EFI_PROD_CODE
// This implementation just uses the generic port counter - this usually returns a count of CPU cycles since start
uint32_t getTimeNowLowerNt() {
return port_rt_get_counter_value();
}

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/**
* This file defines the API for the microsecond timer that a port needs to implement
*
* Do not call these functions directly, they should only be called by microsecond_timer.cpp
*/
#pragma once
void portInitMicrosecondTimer();
void portSetHardwareSchedulerTimer(efitick_t nowNt, efitick_t setTimeNt);
// The port should call this callback when the timer expires
void portMicrosecondTimerCallback();

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/**
* @file pwm_generator_logic.cpp
*
* This PWM implementation keep track of when it would be the next time to toggle the signal.
* It constantly sets timer to that next toggle time, then sets the timer again from the callback, and so on.
*
* @date Mar 2, 2014
* @author Andrey Belomutskiy, (c) 2012-2020
*/
#include "pch.h"
#include "os_access.h"
#if EFI_PROD_CODE
#include "mpu_util.h"
#endif // EFI_PROD_CODE
// 1% duty cycle
#define ZERO_PWM_THRESHOLD 0.01
SimplePwm::SimplePwm()
{
seq.waveCount = 1;
seq.phaseCount = 2;
}
SimplePwm::SimplePwm(const char *name) : SimplePwm() {
this->name = name;
}
PwmConfig::PwmConfig() {
memset((void*)&scheduling, 0, sizeof(scheduling));
memset((void*)&safe, 0, sizeof(safe));
dbgNestingLevel = 0;
periodNt = NAN;
mode = PM_NORMAL;
memset(&outputPins, 0, sizeof(outputPins));
pwmCycleCallback = nullptr;
stateChangeCallback = nullptr;
executor = nullptr;
name = "[noname]";
arg = this;
}
/**
* This method allows you to change duty cycle on the fly
* @param dutyCycle value between 0 and 1
* See also setFrequency
*/
void SimplePwm::setSimplePwmDutyCycle(float dutyCycle) {
if (isStopRequested) {
// we are here in order to not change pin once PWM stop was requested
return;
}
if (cisnan(dutyCycle)) {
warning(ObdCode::CUSTOM_DUTY_INVALID, "%s spwd:dutyCycle %.2f", name, dutyCycle);
return;
} else if (dutyCycle < 0) {
warning(ObdCode::CUSTOM_DUTY_TOO_LOW, "%s dutyCycle too low %.2f", name, dutyCycle);
dutyCycle = 0;
} else if (dutyCycle > 1) {
warning(ObdCode::CUSTOM_PWM_DUTY_TOO_HIGH, "%s duty too high %.2f", name, dutyCycle);
dutyCycle = 1;
}
#if EFI_PROD_CODE
if (hardPwm) {
hardPwm->setDuty(dutyCycle);
return;
}
#endif
// Handle zero and full duty cycle. This will cause the PWM output to behave like a plain digital output.
if (dutyCycle == 0.0f && stateChangeCallback) {
// Manually fire falling edge
stateChangeCallback(0, arg);
} else if (dutyCycle == 1.0f && stateChangeCallback) {
// Manually fire rising edge
stateChangeCallback(1, arg);
}
if (dutyCycle < ZERO_PWM_THRESHOLD) {
mode = PM_ZERO;
} else if (dutyCycle > FULL_PWM_THRESHOLD) {
mode = PM_FULL;
} else {
mode = PM_NORMAL;
seq.setSwitchTime(0, dutyCycle);
}
}
/**
* returns absolute timestamp of state change
*/
static efitick_t getNextSwitchTimeNt(PwmConfig *state) {
efiAssert(CUSTOM_ERR_ASSERT, state->safe.phaseIndex < PWM_PHASE_MAX_COUNT, "phaseIndex range", 0);
int iteration = state->safe.iteration;
// we handle PM_ZERO and PM_FULL separately
float switchTime = state->mode == PM_NORMAL ? state->multiChannelStateSequence->getSwitchTime(state->safe.phaseIndex) : 1;
float periodNt = state->safe.periodNt;
#if DEBUG_PWM
efiPrintf("iteration=%d switchTime=%.2f period=%.2f", iteration, switchTime, period);
#endif /* DEBUG_PWM */
/**
* Once 'iteration' gets relatively high, we might lose calculation precision here.
* This is addressed by iterationLimit below, using any many cycles as possible without overflowing timeToSwitchNt
*/
uint32_t timeToSwitchNt = (uint32_t)((iteration + switchTime) * periodNt);
#if DEBUG_PWM
efiPrintf("start=%d timeToSwitch=%d", state->safe.start, timeToSwitch);
#endif /* DEBUG_PWM */
return state->safe.startNt + timeToSwitchNt;
}
void PwmConfig::setFrequency(float frequency) {
if (cisnan(frequency)) {
// explicit code just to be sure
periodNt = NAN;
return;
}
/**
* see #handleCycleStart()
* 'periodNt' is below 10 seconds here so we use 32 bit type for performance reasons
*/
periodNt = USF2NT(frequency2periodUs(frequency));
}
void PwmConfig::stop() {
isStopRequested = true;
}
void PwmConfig::handleCycleStart() {
if (safe.phaseIndex != 0) {
// https://github.com/rusefi/rusefi/issues/1030
firmwareError(ObdCode::CUSTOM_PWM_CYCLE_START, "handleCycleStart %d", safe.phaseIndex);
return;
}
if (pwmCycleCallback != NULL) {
pwmCycleCallback(this);
}
// Compute the maximum number of iterations without overflowing a uint32_t worth of timestamp
uint32_t iterationLimit = (0xFFFFFFFF / periodNt) - 2;
efiAssertVoid(ObdCode::CUSTOM_ERR_6580, periodNt != 0, "period not initialized");
efiAssertVoid(ObdCode::CUSTOM_ERR_6580, iterationLimit > 0, "iterationLimit invalid");
if (forceCycleStart || safe.periodNt != periodNt || safe.iteration == iterationLimit) {
/**
* period length has changed - we need to reset internal state
*/
safe.startNt = getTimeNowNt();
safe.iteration = 0;
safe.periodNt = periodNt;
forceCycleStart = false;
#if DEBUG_PWM
efiPrintf("state reset start=%d iteration=%d", state->safe.start, state->safe.iteration);
#endif
}
}
/**
* @return Next time for signal toggle
*/
efitick_t PwmConfig::togglePwmState() {
if (isStopRequested) {
return 0;
}
#if DEBUG_PWM
efiPrintf("togglePwmState phaseIndex=%d iteration=%d", safe.phaseIndex, safe.iteration);
efiPrintf("period=%.2f safe.period=%.2f", period, safe.periodNt);
#endif
if (cisnan(periodNt)) {
/**
* NaN period means PWM is paused, we also set the pin low
*/
stateChangeCallback(0, arg);
return getTimeNowNt() + MS2NT(NAN_FREQUENCY_SLEEP_PERIOD_MS);
}
if (mode != PM_NORMAL) {
// in case of ZERO or FULL we are always at starting index
safe.phaseIndex = 0;
}
if (safe.phaseIndex == 0) {
handleCycleStart();
}
/**
* Here is where the 'business logic' - the actual pin state change is happening
*/
int cbStateIndex;
if (mode == PM_NORMAL) {
// callback state index is offset by one. todo: why? can we simplify this?
cbStateIndex = safe.phaseIndex == 0 ? multiChannelStateSequence->phaseCount - 1 : safe.phaseIndex - 1;
} else if (mode == PM_ZERO) {
cbStateIndex = 0;
} else {
cbStateIndex = 1;
}
{
ScopePerf perf(PE::PwmConfigStateChangeCallback);
stateChangeCallback(cbStateIndex, arg);
}
efitick_t nextSwitchTimeNt = getNextSwitchTimeNt(this);
#if DEBUG_PWM
efiPrintf("%s: nextSwitchTime %d", state->name, nextSwitchTime);
#endif /* DEBUG_PWM */
// If we're very far behind schedule, restart the cycle fresh to avoid scheduling a huge pile of events all at once
// This can happen during config write or debugging where CPU is halted for multiple seconds
bool isVeryBehindSchedule = nextSwitchTimeNt < getTimeNowNt() - MS2NT(10);
safe.phaseIndex++;
if (isVeryBehindSchedule || safe.phaseIndex == multiChannelStateSequence->phaseCount || mode != PM_NORMAL) {
safe.phaseIndex = 0; // restart
safe.iteration++;
if (isVeryBehindSchedule) {
forceCycleStart = true;
}
}
#if EFI_UNIT_TEST
printf("PWM: nextSwitchTimeNt=%d phaseIndex=%d iteration=%d\r\n", nextSwitchTimeNt,
safe.phaseIndex,
safe.iteration);
#endif /* EFI_UNIT_TEST */
return nextSwitchTimeNt;
}
/**
* Main PWM loop: toggle pin & schedule next invocation
*
* First invocation happens on application thread
*/
static void timerCallback(PwmConfig *state) {
ScopePerf perf(PE::PwmGeneratorCallback);
state->dbgNestingLevel++;
efiAssertVoid(ObdCode::CUSTOM_ERR_6581, state->dbgNestingLevel < 25, "PWM nesting issue");
efitick_t switchTimeNt = state->togglePwmState();
if (switchTimeNt == 0) {
// we are here when PWM gets stopped
return;
}
if (state->executor == nullptr) {
firmwareError(ObdCode::CUSTOM_NULL_EXECUTOR, "exec on %s", state->name);
return;
}
state->executor->scheduleByTimestampNt(state->name, &state->scheduling, switchTimeNt, { timerCallback, state });
state->dbgNestingLevel--;
}
/**
* Incoming parameters are potentially just values on current stack, so we have to copy
* into our own permanent storage, right?
*/
void copyPwmParameters(PwmConfig *state, MultiChannelStateSequence const * seq) {
state->multiChannelStateSequence = seq;
if (state->mode == PM_NORMAL) {
state->multiChannelStateSequence->checkSwitchTimes(1);
}
}
/**
* this method also starts the timer cycle
* See also startSimplePwm
*/
void PwmConfig::weComplexInit(const char *msg, ExecutorInterface *executor,
MultiChannelStateSequence const * seq,
pwm_cycle_callback *pwmCycleCallback, pwm_gen_callback *stateChangeCallback) {
UNUSED(msg);
this->executor = executor;
isStopRequested = false;
efiAssertVoid(ObdCode::CUSTOM_ERR_6582, periodNt != 0, "period is not initialized");
if (seq->phaseCount == 0) {
firmwareError(ObdCode::CUSTOM_ERR_PWM_1, "signal length cannot be zero");
return;
}
if (seq->phaseCount > PWM_PHASE_MAX_COUNT) {
firmwareError(ObdCode::CUSTOM_ERR_PWM_2, "too many phases in PWM");
return;
}
efiAssertVoid(ObdCode::CUSTOM_ERR_6583, seq->waveCount > 0, "waveCount should be positive");
this->pwmCycleCallback = pwmCycleCallback;
this->stateChangeCallback = stateChangeCallback;
copyPwmParameters(this, seq);
safe.phaseIndex = 0;
safe.periodNt = -1;
safe.iteration = -1;
// let's start the indefinite callback loop of PWM generation
timerCallback(this);
}
void startSimplePwm(SimplePwm *state, const char *msg, ExecutorInterface *executor,
OutputPin *output, float frequency, float dutyCycle) {
efiAssertVoid(ObdCode::CUSTOM_ERR_PWM_STATE_ASSERT, state != NULL, "state");
efiAssertVoid(ObdCode::CUSTOM_ERR_PWM_DUTY_ASSERT, dutyCycle >= 0 && dutyCycle <= 1, "dutyCycle");
if (frequency < 1) {
warning(ObdCode::CUSTOM_OBD_LOW_FREQUENCY, "low frequency %.2f %s", frequency, msg);
return;
}
state->seq.setSwitchTime(0, dutyCycle);
state->seq.setSwitchTime(1, 1);
state->seq.setChannelState(0, 0, TriggerValue::FALL);
state->seq.setChannelState(0, 1, TriggerValue::RISE);
state->outputPins[0] = output;
state->setFrequency(frequency);
state->setSimplePwmDutyCycle(dutyCycle);
state->weComplexInit(msg, executor, &state->seq, NULL, (pwm_gen_callback*)applyPinState);
}
void startSimplePwmExt(SimplePwm *state, const char *msg,
ExecutorInterface *executor,
brain_pin_e brainPin, OutputPin *output, float frequency,
float dutyCycle) {
output->initPin(msg, brainPin);
startSimplePwm(state, msg, executor, output, frequency, dutyCycle);
}
/**
* @param dutyCycle value between 0 and 1
*/
void startSimplePwmHard(SimplePwm *state, const char *msg,
ExecutorInterface *executor,
brain_pin_e brainPin, OutputPin *output, float frequency,
float dutyCycle) {
#if EFI_PROD_CODE && HAL_USE_PWM
auto hardPwm = hardware_pwm::tryInitPin(msg, brainPin, frequency, dutyCycle);
if (hardPwm) {
state->hardPwm = hardPwm;
} else {
#endif
startSimplePwmExt(state, msg, executor, brainPin, output, frequency, dutyCycle);
#if EFI_PROD_CODE && HAL_USE_PWM
}
#endif
}
/**
* This method controls the actual hardware pins
*
* This method takes ~350 ticks.
*/
void applyPinState(int stateIndex, PwmConfig *state) /* pwm_gen_callback */ {
#if EFI_PROD_CODE
if (!engine->isPwmEnabled) {
for (int channelIndex = 0; channelIndex < state->multiChannelStateSequence->waveCount; channelIndex++) {
OutputPin *output = state->outputPins[channelIndex];
output->setValue(0);
}
return;
}
#endif // EFI_PROD_CODE
efiAssertVoid(ObdCode::CUSTOM_ERR_6663, stateIndex < PWM_PHASE_MAX_COUNT, "invalid stateIndex");
efiAssertVoid(ObdCode::CUSTOM_ERR_6664, state->multiChannelStateSequence->waveCount <= PWM_PHASE_MAX_WAVE_PER_PWM, "invalid waveCount");
for (int channelIndex = 0; channelIndex < state->multiChannelStateSequence->waveCount; channelIndex++) {
OutputPin *output = state->outputPins[channelIndex];
int value = state->multiChannelStateSequence->getChannelState(channelIndex, stateIndex);
output->setValue(value);
}
}

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/**
* @file pwm_generator_logic.h
*
* @date Mar 2, 2014
* @author Andrey Belomutskiy, (c) 2012-2020
*/
#pragma once
#include "state_sequence.h"
#include "global.h"
#include "scheduler.h"
#include "efi_gpio.h"
#define PERCENT_TO_DUTY(x) (x) * 0.01
#define NAN_FREQUENCY_SLEEP_PERIOD_MS 100
// 99% duty cycle
#define FULL_PWM_THRESHOLD 0.99
typedef struct {
/**
* a copy so that all phases are executed on the same period, even if another thread
* would be adjusting PWM parameters
*/
float periodNt;
/**
* Iteration counter
*/
int iteration;
/**
* Start time of current iteration
*/
efitick_t startNt;
int phaseIndex;
} pwm_config_safe_state_s;
class PwmConfig;
typedef void (pwm_cycle_callback)(PwmConfig *state);
typedef void (pwm_gen_callback)(int stateIndex, void *arg);
typedef enum {
PM_ZERO,
PM_NORMAL,
PM_FULL
} pwm_mode_e;
/**
* @brief Multi-channel software PWM output configuration
*/
class PwmConfig {
public:
PwmConfig();
void *arg = nullptr;
void weComplexInit(const char *msg,
ExecutorInterface *executor,
MultiChannelStateSequence const * seq,
pwm_cycle_callback *pwmCycleCallback,
pwm_gen_callback *callback);
ExecutorInterface *executor;
/**
* We need to handle zero duty cycle and 100% duty cycle in a special way
*/
pwm_mode_e mode;
bool isStopRequested = false;
/**
* @param use NAN frequency to pause PWM
*/
void setFrequency(float frequency);
void handleCycleStart();
const char *name;
// todo: 'outputPins' should be extracted away from here since technically one can want PWM scheduler without actual pin output
OutputPin *outputPins[PWM_PHASE_MAX_WAVE_PER_PWM];
MultiChannelStateSequence const * multiChannelStateSequence = nullptr;
efitick_t togglePwmState();
void stop();
int dbgNestingLevel;
scheduling_s scheduling;
pwm_config_safe_state_s safe;
/**
* this callback is invoked before each wave generation cycle
*/
pwm_cycle_callback *pwmCycleCallback;
/**
* this main callback is invoked when it's time to switch level on any of the output channels
*/
pwm_gen_callback *stateChangeCallback = nullptr;
private:
/**
* float value of PWM period
* PWM generation is not happening while this value is NAN
*/
float periodNt;
// Set if we are very far behind schedule and need to reset back to the beginning of a cycle to find our way
bool forceCycleStart = true;
};
struct hardware_pwm;
struct IPwm {
virtual void setSimplePwmDutyCycle(float dutyCycle) = 0;
};
class SimplePwm : public PwmConfig, public IPwm {
public:
SimplePwm();
explicit SimplePwm(const char *name);
void setSimplePwmDutyCycle(float dutyCycle) override;
MultiChannelStateSequenceWithData<2> seq;
hardware_pwm* hardPwm = nullptr;
};
/**
* default implementation of pwm_gen_callback which simply toggles the pins
*
*/
void applyPinState(int stateIndex, PwmConfig* state) /* pwm_gen_callback */;
/**
* Start a one-channel software PWM driver.
*
* This method should be called after scheduling layer is started by initSignalExecutor()
*/
void startSimplePwm(SimplePwm *state, const char *msg,
ExecutorInterface *executor,
OutputPin *output,
float frequency, float dutyCycle);
/**
* initialize GPIO pin and start a one-channel software PWM driver.
*
* This method should be called after scheduling layer is started by initSignalExecutor()
*/
void startSimplePwmExt(SimplePwm *state,
const char *msg,
ExecutorInterface *executor,
brain_pin_e brainPin, OutputPin *output,
float frequency, float dutyCycle);
void startSimplePwmHard(SimplePwm *state, const char *msg,
ExecutorInterface *executor,
brain_pin_e brainPin, OutputPin *output, float frequency,
float dutyCycle);
void copyPwmParameters(PwmConfig *state, MultiChannelStateSequence const * seq);

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misc/stm32f1_test_project/timer/scheduler.cpp
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/**
* @file scheduler.h
*
* @date October 1, 2020
*/
#include "pch.h"
#include "scheduler.h"
void action_s::execute() {
efiAssertVoid(ObdCode::CUSTOM_ERR_ASSERT, callback != NULL, "callback==null1");
callback(param);
}
schfunc_t action_s::getCallback() const {
return callback;
}
void * action_s::getArgument() const {
return param;
}

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misc/stm32f1_test_project/timer/scheduler.h
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/**
* @file scheduler.h
*
* @date May 18, 2014
* @author Andrey Belomutskiy, (c) 2012-2020
*/
#pragma once
typedef void (*schfunc_t)(void *);
class action_s {
public:
// Default constructor constructs null action (ie, implicit bool conversion returns false)
action_s() = default;
// Allow implicit conversion from schfunc_t to action_s
action_s(schfunc_t callback) : action_s(callback, nullptr) { }
action_s(schfunc_t callback, void *param) : callback(callback), param(param) { }
// Allow any function that takes a single pointer parameter, so long as param is also of the same pointer type.
// This constructor means you shouldn't ever have to cast to schfunc_t on your own.
template <typename TArg>
action_s(void (*callback)(TArg*), TArg* param) : callback((schfunc_t)callback), param(param) { }
void execute();
schfunc_t getCallback() const;
void * getArgument() const;
operator bool() const {
return callback != nullptr;
}
private:
schfunc_t callback = nullptr;
void *param = nullptr;
};
/**
* This structure holds information about an event scheduled in the future: when to execute what callback with what parameters
*/
#pragma pack(push, 4)
struct scheduling_s {
#if EFI_SIGNAL_EXECUTOR_SLEEP
virtual_timer_t timer;
#endif /* EFI_SIGNAL_EXECUTOR_SLEEP */
/**
* timestamp represented as 64-bit value of ticks since MCU start
*/
volatile efitick_t momentX = 0;
/**
* Scheduler implementation uses a sorted linked list of these scheduling records.
*/
scheduling_s *nextScheduling_s = nullptr;
action_s action;
};
#pragma pack(pop)
struct ExecutorInterface {
/**
* see also scheduleByAngle
*/
virtual void scheduleByTimestamp(const char *msg, scheduling_s *scheduling, efitimeus_t timeUs, action_s action) = 0;
virtual void scheduleByTimestampNt(const char *msg, scheduling_s *scheduling, efitick_t timeNt, action_s action) = 0;
virtual void scheduleForLater(scheduling_s *scheduling, int delayUs, action_s action) = 0;
virtual void cancel(scheduling_s* scheduling) = 0;
};

191
misc/stm32f1_test_project/timer/single_timer_executor.cpp
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/**
* @file SingleTimerExecutor.cpp
*
* This class combines the powers of a 1MHz hardware timer from microsecond_timer.cpp
* and pending events queue event_queue.cpp
*
* As of version 2.6.x, ChibiOS tick-based kernel is not capable of scheduling events
* with the level of precision we need, and realistically it should not.
*
* Update: actually newer ChibiOS has tickless mode and what we have here is pretty much the same thing :)
* open question if rusEfi should simply migrate to ChibiOS tickless scheduling (which would increase coupling with ChibiOS)
*
* See https://rusefi.com/forum/viewtopic.php?f=5&t=373&start=360#p30895
* for some performance data: with 'debug' firmware we spend about 5% of CPU in TIM5 handler which seem to be executed
* about 1500 times a second
*
* http://sourceforge.net/p/rusefi/tickets/24/
*
* @date: Apr 18, 2014
* @author Andrey Belomutskiy, (c) 2012-2020
*/
#include "pch.h"
#include "os_access.h"
#include "single_timer_executor.h"
#include "efitime.h"
#if EFI_SIGNAL_EXECUTOR_ONE_TIMER
#include "microsecond_timer.h"
#include "os_util.h"
uint32_t hwSetTimerDuration;
void globalTimerCallback() {
efiAssertVoid(ObdCode::CUSTOM_ERR_6624, hasLotsOfRemainingStack(), "lowstck#2y");
___engine.executor.onTimerCallback();
}
SingleTimerExecutor::SingleTimerExecutor()
// 8us is roughly the cost of the interrupt + overhead of a single timer event
: queue(US2NT(8))
{
}
void SingleTimerExecutor::scheduleForLater(scheduling_s *scheduling, int delayUs, action_s action) {
scheduleByTimestamp("scheduleForLater", scheduling, getTimeNowUs() + delayUs, action);
}
/**
* @brief Schedule an event at specific delay after now
*
* Invokes event callback after the specified amount of time.
* callback would be executed either on ISR thread or current thread if we would need to execute right away
*
* @param [in, out] scheduling Data structure to keep this event in the collection.
* @param [in] delayUs the number of microseconds before the output signal immediate output if delay is zero.
* @param [in] dwell the number of ticks of output duration.
*/
void SingleTimerExecutor::scheduleByTimestamp(const char *msg, scheduling_s *scheduling, efitimeus_t timeUs, action_s action) {
scheduleByTimestampNt(msg, scheduling, US2NT(timeUs), action);
}
void SingleTimerExecutor::scheduleByTimestampNt(const char *msg, scheduling_s* scheduling, efitick_t nt, action_s action) {
ScopePerf perf(PE::SingleTimerExecutorScheduleByTimestamp);
#if EFI_ENABLE_ASSERTS
int32_t deltaTimeNt = (int32_t)nt - getTimeNowLowerNt();
if (deltaTimeNt >= TOO_FAR_INTO_FUTURE_NT) {
// we are trying to set callback for too far into the future. This does not look right at all
firmwareError(ObdCode::CUSTOM_ERR_TASK_TIMER_OVERFLOW, "scheduleByTimestampNt() too far: %d %s", deltaTimeNt, msg);
return;
}
#endif
scheduleCounter++;
// Lock for queue insertion - we may already be locked, but that's ok
chibios_rt::CriticalSectionLocker csl;
bool needToResetTimer = queue.insertTask(scheduling, nt, action);
if (!reentrantFlag) {
executeAllPendingActions();
if (needToResetTimer) {
scheduleTimerCallback();
}
}
}
void SingleTimerExecutor::cancel(scheduling_s* scheduling) {
// Lock for queue removal - we may already be locked, but that's ok
chibios_rt::CriticalSectionLocker csl;
queue.remove(scheduling);
}
void SingleTimerExecutor::onTimerCallback() {
timerCallbackCounter++;
chibios_rt::CriticalSectionLocker csl;
executeAllPendingActions();
scheduleTimerCallback();
}
/*
* this private method is executed under lock
*/
void SingleTimerExecutor::executeAllPendingActions() {
ScopePerf perf(PE::SingleTimerExecutorDoExecute);
executeAllPendingActionsInvocationCounter++;
/**
* Let's execute actions we should execute at this point.
* reentrantFlag takes care of the use case where the actions we are executing are scheduling
* further invocations
*/
reentrantFlag = true;
/**
* in real life it could be that while we executing listeners time passes and it's already time to execute
* next listeners.
* TODO: add a counter & figure out a limit of iterations?
*/
// starts at -1 because do..while will run a minimum of once
executeCounter = -1;
bool didExecute;
do {
efitick_t nowNt = getTimeNowNt();
didExecute = queue.executeOne(nowNt);
// if we're stuck in a loop executing lots of events, panic!
if (executeCounter++ == 500) {
firmwareError(ObdCode::CUSTOM_ERR_LOCK_ISSUE, "Maximum scheduling run length exceeded - CPU load too high");
}
} while (didExecute);
maxExecuteCounter = maxI(maxExecuteCounter, executeCounter);
if (!isLocked()) {
firmwareError(ObdCode::CUSTOM_ERR_LOCK_ISSUE, "Someone has stolen my lock");
return;
}
reentrantFlag = false;
}
/**
* This method is always invoked under a lock
*/
void SingleTimerExecutor::scheduleTimerCallback() {
ScopePerf perf(PE::SingleTimerExecutorScheduleTimerCallback);
/**
* Let's grab fresh time value
*/
efitick_t nowNt = getTimeNowNt();
expected<efitick_t> nextEventTimeNt = queue.getNextEventTime(nowNt);
if (!nextEventTimeNt) {
return; // no pending events in the queue
}
efiAssertVoid(ObdCode::CUSTOM_ERR_6625, nextEventTimeNt.Value > nowNt, "setTimer constraint");
setHardwareSchedulerTimer(nowNt, nextEventTimeNt.Value);
}
void initSingleTimerExecutorHardware() {
initMicrosecondTimer();
}
void executorStatistics() {
if (engineConfiguration->debugMode == DBG_EXECUTOR) {
#if EFI_TUNER_STUDIO
engine->outputChannels.debugIntField1 = ___engine.executor.timerCallbackCounter;
engine->outputChannels.debugIntField2 = ___engine.executor.executeAllPendingActionsInvocationCounter;
engine->outputChannels.debugIntField3 = ___engine.executor.scheduleCounter;
engine->outputChannels.debugIntField4 = ___engine.executor.executeCounter;
engine->outputChannels.debugIntField5 = ___engine.executor.maxExecuteCounter;
#endif /* EFI_TUNER_STUDIO */
}
}
#endif /* EFI_SIGNAL_EXECUTOR_ONE_TIMER */

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misc/stm32f1_test_project/timer/single_timer_executor.h
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/**
* @file single_timer_executor.h
*
* @date: Apr 18, 2014
* @author Andrey Belomutskiy, (c) 2012-2020
*/
#pragma once
#include "scheduler.h"
#include "event_queue.h"
class SingleTimerExecutor final : public ExecutorInterface {
public:
SingleTimerExecutor();
void scheduleByTimestamp(const char *msg, scheduling_s *scheduling, efitimeus_t timeUs, action_s action) override;
void scheduleByTimestampNt(const char *msg, scheduling_s *scheduling, efitick_t timeNt, action_s action) override;
void scheduleForLater(scheduling_s *scheduling, int delayUs, action_s action) override;
void cancel(scheduling_s* scheduling) override;
void onTimerCallback();
int timerCallbackCounter = 0;
int scheduleCounter = 0;
int maxExecuteCounter = 0;
int executeCounter;
int executeAllPendingActionsInvocationCounter = 0;
private:
EventQueue queue;
bool reentrantFlag = false;
void executeAllPendingActions();
void scheduleTimerCallback();
};
void initSingleTimerExecutorHardware();
void executorStatistics();

56
misc/stm32f1_test_project/uart.cpp
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#include "ch.h"
#include "hal.h"
#include "chprintf.h"
#include "uart.h"
#include "persistence.h"
static const UARTConfig uartCfg =
{
.txend1_cb = nullptr,
.txend2_cb = nullptr,
.rxend_cb = nullptr,
.rxchar_cb = nullptr,
.rxerr_cb = nullptr,
.timeout_cb = nullptr,
#ifdef STM32F0XX
.timeout = 0,
#endif
.speed = 115200,
.cr1 = 0,
.cr2 = 0,
.cr3 = 0,
.rxhalf_cb = nullptr,
};
static char printBuffer[200];
extern TestConfiguration configuration;
extern mfs_error_t flashState;
static THD_WORKING_AREA(waUartThread, 256);
static void UartThread(void*)
{
while (true) {
size_t writeCount = chsnprintf(printBuffer, 200, "%d.%03d\twrites=%d\treboots=%d\r\n", 0, (int)flashState, configuration.updateCounter, configuration.rebootCounter);
uartStartSend(&UARTD1, writeCount, printBuffer);
pokeConfiguration();
chThdSleepMilliseconds(200);
}
}
void InitUart()
{
// stm32 TX/UART1 - dongle RX often White
palSetPadMode(GPIOA, 9, PAL_MODE_STM32_ALTERNATE_PUSHPULL );
// stm32 RX/UART1 - dongle TX often Green
palSetPadMode(GPIOA,10, PAL_MODE_INPUT_PULLUP );
uartStart(&UARTD1, &uartCfg);
chThdCreateStatic(waUartThread, sizeof(waUartThread), NORMALPRIO, UartThread, nullptr);
}

3
misc/stm32f1_test_project/uart.h
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#pragma once
void InitUart();