From 0860caa72b8f36cad7fdda53f2a9561c263791f9 Mon Sep 17 00:00:00 2001 From: Andrey G Date: Mon, 10 Jan 2022 01:39:29 +0300 Subject: [PATCH] Enable ENABLE_AUTO_DETECT_HSE only if STM32_HSECLK is not defined (#3758) Some board (like stm32f429-disco) with SDRAM need clock to be enabled in __early_init (before .bss and .data initialization). So if STM32_HSECLK defined - skip clock detection. --- .../hw_layer/ports/stm32/mcuconf_common_f4_f7.h | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/firmware/hw_layer/ports/stm32/mcuconf_common_f4_f7.h b/firmware/hw_layer/ports/stm32/mcuconf_common_f4_f7.h index 12f68311bb..c90e0d24de 100644 --- a/firmware/hw_layer/ports/stm32/mcuconf_common_f4_f7.h +++ b/firmware/hw_layer/ports/stm32/mcuconf_common_f4_f7.h @@ -335,12 +335,15 @@ */ #define STM32_WDG_USE_IWDG FALSE -// Pretend we have a 25MHz external crystal. This value isn't actually used since we -// configure the PLL to start on the HSI oscillator, then compute HSE's speed at runtime -// and reconfigure the PLL appropriately. -#define STM32_HSECLK 25000000 +/* Some boards need to know clock early on boot. + * F429-Discovery board configures clock and then SDRAM early on boot */ +#ifndef STM32_HSECLK + // Pretend we have a 25MHz external crystal. This value isn't actually used since we + // configure the PLL to start on the HSI oscillator, then compute HSE's speed at runtime + // and reconfigure the PLL appropriately. + #define STM32_HSECLK 25000000 -// After boot, we will detect the real frequency, and adjust the PLL M value to suit - -#define ENABLE_AUTO_DETECT_HSE + // After boot, we will detect the real frequency, and adjust the PLL M value to suit + #define ENABLE_AUTO_DETECT_HSE +#endif