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Merge remote-tracking branch 'origin/master'

This commit is contained in:
rusefi 2019-04-14 13:57:09 -04:00
parent 7be441a1bc 21346c0063
commit 096eff8fac
5 changed files with 18 additions and 48 deletions
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18
firmware/hw_layer/drivers/gpio/tle8888.c
View File

@ -28,6 +28,7 @@ EXTERN_CONFIG;
#include "gpio/tle8888.h" #include "gpio/tle8888.h"
#include "pin_repository.h" #include "pin_repository.h"
#include "rfiutil.h" #include "rfiutil.h"
#include "mpu_util.h"
#if EFI_TUNER_STUDIO #if EFI_TUNER_STUDIO
#include "tunerstudio.h" #include "tunerstudio.h"
@ -537,7 +538,6 @@ static struct tle8888_config tle8888_cfg = {
.end_cb = NULL, .end_cb = NULL,
.ssport = GPIOF, .ssport = GPIOF,
.sspad = 0U, .sspad = 0U,
#if defined(STM_F4_FAMILY)
.cr1 = .cr1 =
SPI_CR1_16BIT_MODE | SPI_CR1_16BIT_MODE |
SPI_CR1_SSM | SPI_CR1_SSM |
@ -548,22 +548,6 @@ static struct tle8888_config tle8888_cfg = {
SPI_CR1_CPHA | SPI_CR1_CPHA |
0, 0,
.cr2 = SPI_CR2_16BIT_MODE .cr2 = SPI_CR2_16BIT_MODE
#elif defined(STM_F7_FAMILY)
.cr1 =
SPI_CR1_16BIT_MODE |
SPI_CR1_SSM |
SPI_CR1_SSI |
SPI_CR1_LSBFIRST |
SPI_CR1_MSTR |
((3 << SPI_CR1_BR_Pos) & SPI_CR1_BR) |
SPI_CR1_CPHA |
0,
.cr2 = SPI_CR2_16BIT_MODE
#else
unexpected platform
#endif
}, },
.direct_io = { .direct_io = {
[0] = {.port = NULL, .pad = 0, .output = 9}, [0] = {.port = NULL, .pad = 0, .output = 9},

7
firmware/hw_layer/ports/stm32/stm32f4/mpu_util.h
View File

@ -65,6 +65,13 @@ BOR_Result_t BOR_Set(BOR_Level_t BORValue);
#define ADC_CR2_SWSTART ((uint32_t)0x40000000) #define ADC_CR2_SWSTART ((uint32_t)0x40000000)
#endif #endif
#define SPI_CR1_16BIT_MODE SPI_CR1_DFF
#define SPI_CR2_16BIT_MODE 0
// TODO
#define SPI_CR1_24BIT_MODE 0
#define SPI_CR2_24BIT_MODE 0
void baseHardwareInit(void); void baseHardwareInit(void);
void turnOnSpi(spi_device_e device); void turnOnSpi(spi_device_e device);

8
firmware/hw_layer/ports/stm32/stm32f7/mpu_util.h
View File

@ -65,6 +65,14 @@ BOR_Result_t BOR_Set(BOR_Level_t BORValue);
#define ADC_CR2_SWSTART ((uint32_t)0x40000000) #define ADC_CR2_SWSTART ((uint32_t)0x40000000)
#endif #endif
#define SPI_CR1_16BIT_MODE 0
#define SPI_CR2_16BIT_MODE SPI_CR2_DS_3 | SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0
#define SPI_CR1_24BIT_MODE 0
/* 3 x 8-bit transfer */
#define SPI_CR2_24BIT_MODE SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0
void baseHardwareInit(void); void baseHardwareInit(void);
void turnOnSpi(spi_device_e device); void turnOnSpi(spi_device_e device);

2
firmware/hw_layer/smart_gpio.cpp
View File

@ -12,6 +12,7 @@
#include "efi_gpio.h" #include "efi_gpio.h"
#include "engine_configuration.h" #include "engine_configuration.h"
#include "hardware.h" #include "hardware.h"
#include "mpu_util.h"
#include "gpio_ext.h" #include "gpio_ext.h"
#include "drivers/gpio/tle6240.h" #include "drivers/gpio/tle6240.h"
#include "drivers/gpio/mc33972.h" #include "drivers/gpio/mc33972.h"
@ -28,6 +29,7 @@ struct tle6240_config tle6240 = {
.ssport = GPIOF, .ssport = GPIOF,
.sspad = 0U, .sspad = 0U,
.cr1 = .cr1 =
SPI_CR1_16BIT_MODE |
SPI_CR1_SSM | SPI_CR1_SSM |
SPI_CR1_SSI | SPI_CR1_SSI |
/* SPI_CR1_LSBFIRST | */ /* SPI_CR1_LSBFIRST | */

31
firmware/hw_layer/smart_gpio.h
View File

@ -15,35 +15,4 @@
void initSmartGpio(void); void initSmartGpio(void);
#if (defined(STM32F405xx) || defined(STM32F407xx) || defined (STM32F469xx))
#define STM_F4_FAMILY
#elif (defined(STM32F765xx) || defined(STM32F767xx) || defined(STM32F746xx))
#define STM_F7_FAMILY
#else
unexpected platform
#endif
#if (BOARD_EXT_GPIOCHIPS > 0)
#if defined(STM_F4_FAMILY)
#define SPI_CR1_16BIT_MODE SPI_CR1_DFF
#define SPI_CR2_16BIT_MODE 0
// TODO
#define SPI_CR1_24BIT_MODE 0
#define SPI_CR2_24BIT_MODE 0
#elif defined(STM_F7_FAMILY)
#define SPI_CR1_16BIT_MODE 0
#define SPI_CR2_16BIT_MODE SPI_CR2_DS_3 | SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0
#define SPI_CR1_24BIT_MODE 0
/* 3 x 8-bit transfer */
#define SPI_CR2_24BIT_MODE SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0
#else
unexpected platform
#endif
#endif /* (BOARD_EXT_GPIOCHIPS > 0) */
#endif /* HW_LAYER_SMART_GPIO_H_ */ #endif /* HW_LAYER_SMART_GPIO_H_ */