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Adc cleanups (#1743) 

* ADC: remove ADC_TwoSamplingDelay*

1. it is related to double or triple interlived mode only
2. it should be writen to CCR register, not CR1

* ADC: use designated initializers
This commit is contained in:
dron0gus 2020-09-01 14:38:35 +03:00 committed by GitHub
parent d72ba63527
commit 182747e907
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GPG Key ID: 4AEE18F83AFDEB23
5 changed files with 44 additions and 68 deletions
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6
firmware/config/boards/kinetis/OS/os/hal/ports/KINETIS/LLD/ADCv2/hal_adc_lld.c
View File

@ -266,12 +266,6 @@ void adc_lld_start(ADCDriver *adcp) {
ADC12_GetDefaultConfig(&adcp->adc12Cfg);
adcp->adc12Cfg.resolution = kADC12_Resolution12Bit;
#if 0
// process STM32-compatible config (todo: this is just a test code for now)
// imitate sampling speed slowdown
if (adcp->grpp->cr1 & ADC_TwoSamplingDelay_20Cycles)
adcp->adc12Cfg.clockDivider = kADC12_ClockDivider8;
#endif
ADC12_Init(adcp->adc, &adcp->adc12Cfg);
#else
adcp->channel_mask = adcp->grpp->channel_mask;

5
firmware/config/boards/kinetis/OS/os/hal/ports/KINETIS/LLD/ADCv2/hal_adc_lld.h
View File

@ -123,11 +123,6 @@
/** @} */
// STM32-specific defines
#ifndef ADC_TwoSamplingDelay_20Cycles
#define ADC_TwoSamplingDelay_20Cycles ((uint32_t)0x00000F00)
#endif
#define ADC_SQR1_NUM_CH(n) 0
/*===========================================================================*/

84
firmware/hw_layer/adc/adc_inputs.cpp
View File

@ -116,22 +116,29 @@ static adcsample_t getAvgAdcValue(int index, adcsample_t *samples, int bufDepth,
/*
* ADC conversion group.
*/
static ADCConversionGroup adcgrpcfgSlow = { FALSE, 0, nullptr, NULL,
/* HW dependent part.*/
ADC_TwoSamplingDelay_20Cycles, // cr1
ADC_CR2_SWSTART, // cr2
/**
* here we configure all possible channels for slow mode. Some channels would not actually
* be used hopefully that's fine to configure all possible channels.
*/
static ADCConversionGroup adcgrpcfgSlow = {
.circular = FALSE,
.num_channels = 0,
.end_cb = nullptr,
.error_cb = nullptr,
/* HW dependent part.*/
.cr1 = 0,
.cr2 = ADC_CR2_SWSTART,
/**
* here we configure all possible channels for slow mode. Some channels would not actually
* be used hopefully that's fine to configure all possible channels.
*/
// sample times for channels 10...18
.smpr1 =
ADC_SMPR1_SMP_AN10(ADC_SAMPLING_SLOW) |
ADC_SMPR1_SMP_AN11(ADC_SAMPLING_SLOW) |
ADC_SMPR1_SMP_AN12(ADC_SAMPLING_SLOW) |
ADC_SMPR1_SMP_AN13(ADC_SAMPLING_SLOW) |
ADC_SMPR1_SMP_AN14(ADC_SAMPLING_SLOW) |
ADC_SMPR1_SMP_AN15(ADC_SAMPLING_SLOW) |
ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_144)
, // sample times for channels 10...18
ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_144),
// In this field must be specified the sample times for channels 0...9
.smpr2 =
ADC_SMPR2_SMP_AN0(ADC_SAMPLING_SLOW) |
ADC_SMPR2_SMP_AN1(ADC_SAMPLING_SLOW) |
ADC_SMPR2_SMP_AN2(ADC_SAMPLING_SLOW) |
@ -141,39 +148,41 @@ ADC_TwoSamplingDelay_20Cycles, // cr1
ADC_SMPR2_SMP_AN6(ADC_SAMPLING_SLOW) |
ADC_SMPR2_SMP_AN7(ADC_SAMPLING_SLOW) |
ADC_SMPR2_SMP_AN8(ADC_SAMPLING_SLOW) |
ADC_SMPR2_SMP_AN9(ADC_SAMPLING_SLOW)
, // In this field must be specified the sample times for channels 0...9
0,
0,
0, // Conversion group sequence 13...16 + sequence length
0, // Conversion group sequence 7...12
0 // Conversion group sequence 1...6
};
ADC_SMPR2_SMP_AN9(ADC_SAMPLING_SLOW),
.htr = 0,
.ltr = 0,
.sqr1 = 0, // Conversion group sequence 13...16 + sequence length
.sqr2 = 0, // Conversion group sequence 7...12
.sqr3 = 0 // Conversion group sequence 1...6
};
AdcDevice slowAdc(&adcgrpcfgSlow);
void adc_callback_fast(ADCDriver *adcp, adcsample_t *buffer, size_t n);
static ADCConversionGroup adcgrpcfg_fast = { FALSE, 0 /* num_channels */, adc_callback_fast, NULL,
/* HW dependent part.*/
ADC_TwoSamplingDelay_5Cycles, // cr1
ADC_CR2_SWSTART, // cr2
static ADCConversionGroup adcgrpcfg_fast = {
.circular = FALSE,
.num_channels = 0,
.end_cb = adc_callback_fast,
.error_cb = nullptr,
/* HW dependent part.*/
.cr1 = 0,
.cr2 = ADC_CR2_SWSTART,
/**
* here we configure all possible channels for fast mode. Some channels would not actually
* be used hopefully that's fine to configure all possible channels.
*
*/
// sample times for channels 10...18
.smpr1 =
ADC_SMPR1_SMP_AN10(ADC_SAMPLING_FAST) |
ADC_SMPR1_SMP_AN11(ADC_SAMPLING_FAST) |
ADC_SMPR1_SMP_AN12(ADC_SAMPLING_FAST) |
ADC_SMPR1_SMP_AN13(ADC_SAMPLING_FAST) |
ADC_SMPR1_SMP_AN14(ADC_SAMPLING_FAST) |
ADC_SMPR1_SMP_AN15(ADC_SAMPLING_FAST)
, // sample times for channels 10...18
ADC_SMPR1_SMP_AN15(ADC_SAMPLING_FAST),
// In this field must be specified the sample times for channels 0...9
.smpr2 =
ADC_SMPR2_SMP_AN0(ADC_SAMPLING_FAST) |
ADC_SMPR2_SMP_AN1(ADC_SAMPLING_FAST) |
ADC_SMPR2_SMP_AN2(ADC_SAMPLING_FAST) |
@ -183,18 +192,13 @@ ADC_TwoSamplingDelay_5Cycles, // cr1
ADC_SMPR2_SMP_AN6(ADC_SAMPLING_FAST) |
ADC_SMPR2_SMP_AN7(ADC_SAMPLING_FAST) |
ADC_SMPR2_SMP_AN8(ADC_SAMPLING_FAST) |
ADC_SMPR2_SMP_AN9(ADC_SAMPLING_FAST), // In this field must be specified the sample times for channels 0...9
0,
0,
0, // Conversion group sequence 13...16 + sequence length
0, // Conversion group sequence 7...12
0
// Conversion group sequence 1...6
};
ADC_SMPR2_SMP_AN9(ADC_SAMPLING_FAST),
.htr = 0,
.ltr = 0,
.sqr1 = 0, // Conversion group sequence 13...16 + sequence length
.sqr2 = 0, // Conversion group sequence 7...12
.sqr3 = 0 // Conversion group sequence 1...6
};
AdcDevice fastAdc(&adcgrpcfg_fast);

8
firmware/hw_layer/ports/kinetis/port_mpu_util.h
View File

@ -15,14 +15,6 @@ typedef enum {
BOR_Level_3 = 3
} BOR_Level_t;
#ifndef ADC_TwoSamplingDelay_5Cycles
#define ADC_TwoSamplingDelay_5Cycles ((uint32_t)0x00000000)
#endif
#ifndef ADC_TwoSamplingDelay_20Cycles
#define ADC_TwoSamplingDelay_20Cycles ((uint32_t)0x00000F00)
#endif
#ifndef ADC_CR2_SWSTART
#define ADC_CR2_SWSTART ((uint32_t)0x40000000)
#endif

9
firmware/hw_layer/ports/stm32/port_mpu_util.h
View File

@ -49,15 +49,6 @@ typedef enum {
#define GPIO_AF_TIM9 3
#endif
// F4/F7 have the same ADC peripheral
#ifndef ADC_TwoSamplingDelay_5Cycles
#define ADC_TwoSamplingDelay_5Cycles ((uint32_t)0x00000000)
#endif
#ifndef ADC_TwoSamplingDelay_20Cycles
#define ADC_TwoSamplingDelay_20Cycles ((uint32_t)0x00000F00)
#endif
#ifndef ADC_CR2_SWSTART
#define ADC_CR2_SWSTART ((uint32_t)0x40000000)
#endif