diff --git a/firmware/config/boards/proteus/compile_proteus_f4.sh b/firmware/config/boards/proteus/compile_proteus_f4.sh index 87f9df5234..8f27747219 100755 --- a/firmware/config/boards/proteus/compile_proteus_f4.sh +++ b/firmware/config/boards/proteus/compile_proteus_f4.sh @@ -1,5 +1,5 @@ #!/bin/bash -# one step back export USE_OPENBLT=yes +export USE_OPENBLT=yes bash ../common_make.sh proteus ARCH_STM32F4 diff --git a/firmware/config/boards/proteus/openblt/oblt_board.mk b/firmware/config/boards/proteus/openblt/oblt_board.mk index 4b59963aff..0260076b04 100644 --- a/firmware/config/boards/proteus/openblt/oblt_board.mk +++ b/firmware/config/boards/proteus/openblt/oblt_board.mk @@ -35,5 +35,7 @@ BRDFLAGS += -DBOOT_CPU_SYSTEM_SPEED_KHZ=168000 BRDFLAGS += -DBOOT_COM_RS232_CHANNEL_INDEX=2 # \brief Select the desired CAN peripheral as a zero based index. BRDFLAGS += -DBOOT_COM_CAN_CHANNEL_INDEX=0 +# USB support +BRDFLAGS += -DBBOOT_COM_USB_ENABLE=1 PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/main_internal_osc.c diff --git a/firmware/config/boards/subaru_eg33/openblt/main_external_osc.c b/firmware/config/boards/subaru_eg33/openblt/main_external_osc.c index 5fb51f13e2..15667ecfbe 100644 --- a/firmware/config/boards/subaru_eg33/openblt/main_external_osc.c +++ b/firmware/config/boards/subaru_eg33/openblt/main_external_osc.c @@ -28,6 +28,7 @@ * Include files ****************************************************************************************/ #include "boot.h" /* bootloader generic header */ +#include "shared_params.h" /* Shared parameters header */ #ifdef STM32F429xx #include "stm32f4xx.h" /* STM32 CPU and HAL header */ #endif @@ -56,6 +57,8 @@ int main(void) { /* initialize the microcontroller */ Init(); + /* initialize the shared parameters module */ + SharedParamsInit(); /* initialize the bootloader */ BootInit(); @@ -70,6 +73,18 @@ int main(void) return 0; } /*** end of main ***/ +/************************************************************************************//** +** \brief Interrupt service routine of the timer. +** \return none. +** +****************************************************************************************/ +void SysTick_Handler(void) +{ + /* Increment the tick counter. */ + HAL_IncTick(); + /* Invoke the system tick handler. */ + HAL_SYSTICK_IRQHandler(); +} /*** end of TimerISRHandler ***/ /************************************************************************************//** ** \brief Initializes the microcontroller. @@ -168,19 +183,6 @@ void HAL_MspInit(void) __HAL_RCC_GPIOD_CLK_ENABLE(); __HAL_RCC_GPIOG_CLK_ENABLE(); -#if (BOOT_COM_RS232_ENABLE > 0) - /* UART clock enable. */ - __HAL_RCC_USART1_CLK_ENABLE(); -#endif -#if (BOOT_COM_CAN_ENABLE > 0) - /* CAN clock enable. */ - __HAL_RCC_CAN1_CLK_ENABLE(); -#endif -#if (BOOT_COM_USB_ENABLE > 0) - /* USB clock enable. */ - __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); -#endif - /* Configure GPIO pin for the Red LED. */ GPIO_InitStruct.Pin = STATUS_LED_PIN; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; @@ -204,6 +206,9 @@ void HAL_MspInit(void) GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Alternate = GPIO_AF7_USART1; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* UART clock enable. */ + __HAL_RCC_USART1_CLK_ENABLE(); #endif #if (BOOT_COM_CAN_ENABLE > 0) /* CAN enable pin */ @@ -220,6 +225,9 @@ void HAL_MspInit(void) GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Alternate = GPIO_AF9_CAN1; HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + + /* CAN clock enable. */ + __HAL_RCC_CAN1_CLK_ENABLE(); #endif #if (BOOT_COM_USB_ENABLE > 0) /* USB pin configuration. */ @@ -229,6 +237,9 @@ void HAL_MspInit(void) GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USB clock enable. */ + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); #endif } /*** end of HAL_MspInit ***/ @@ -256,8 +267,8 @@ void HAL_MspDeInit(void) /* Deinit used GPIOs. */ HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11); HAL_GPIO_DeInit(GPIOA, GPIO_PIN_12); - /* USB clock enable. */ - __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); + /* USB clock disable. */ + __HAL_RCC_USB_OTG_FS_CLK_DISABLE(); #endif #if (BOOT_COM_CAN_ENABLE > 0) diff --git a/firmware/flash_usb.sh b/firmware/flash_usb.sh index 829c50a618..6cdda2051c 100644 --- a/firmware/flash_usb.sh +++ b/firmware/flash_usb.sh @@ -2,7 +2,7 @@ # This script will try to flash/update RusEFI part of firmware over USB interface. -echo This script may need root privileges for accessing USB device or special udev rules (TODO) +echo "This script may need root privileges for accessing USB device or special udev rules (TODO)" BootCommander -t=xcp_usb deliver/rusefi_update.srec diff --git a/firmware/hw_layer/openblt/blt_conf.h b/firmware/hw_layer/openblt/blt_conf.h index 619f154dde..4c442b5f7e 100644 --- a/firmware/hw_layer/openblt/blt_conf.h +++ b/firmware/hw_layer/openblt/blt_conf.h @@ -156,6 +156,8 @@ */ #define BOOT_FLASH_CUSTOM_LAYOUT_ENABLE (1) +#define BOOT_FLASH_CUSTOM_INIT_ENABLE (1) + /** \brief Use one of 'reserved' IRQ vectors at the beginig on vector table. */ #define BOOT_FLASH_VECTOR_TABLE_CS_OFFSET (0x1C) diff --git a/firmware/hw_layer/openblt/flash_layout.c b/firmware/hw_layer/openblt/flash_layout.c index d73189314e..ac0ea2b226 100644 --- a/firmware/hw_layer/openblt/flash_layout.c +++ b/firmware/hw_layer/openblt/flash_layout.c @@ -8,19 +8,19 @@ static const tFlashSector flashLayout[] = * interfaces enabled. when for example only UART is needed, then the space required * for the bootloader can be made a lot smaller here. */ - /* { 0x08000000, 0x04000, 0 }, flash sector 0 - reserved for bootloader */ - /* { 0x08004000, 0x04000, 1 }, flash sector 1 - reserved for bootloader */ - { 0x08008000, 0x08000, 2}, /* flash sector 2 - 16kb */ - { 0x0800c000, 0x08000, 3}, /* flash sector 3 - 16kb */ - { 0x08010000, 0x10000, 4}, /* flash sector 4 - 64kb */ - { 0x08020000, 0x20000, 5}, /* flash sector 5 - 128kb */ - { 0x08040000, 0x20000, 6}, /* flash sector 6 - 128kb */ - { 0x08060000, 0x20000, 7}, /* flash sector 7 - 128kb */ -#if (BOOT_NVM_SIZE_KB > 1024) - { 0x08080000, 0x20000, 8}, /* flash sector 8 - 128kb */ - { 0x080a0000, 0x20000, 9}, /* flash sector 9 - 128kb */ - { 0x080c0000, 0x20000, 10}, /* flash sector 10 - 128kb */ - { 0x080e0000, 0x20000, 11}, /* flash sector 11 - 128kb */ +/*{ 0x08000000, 16 * 1024, 0 }, flash sector 0 - 16kb - reserved for OpenBLT */ +/*{ 0x08004000, 16 * 1024, 1 }, flash sector 1 - 16kb - reserved for OpenBLT */ + { 0x08008000, 16 * 1024, 2 }, /* flash sector 2 - 16kb */ + { 0x0800c000, 16 * 1024, 3 }, /* flash sector 3 - 16kb */ + { 0x08010000, 64 * 1024, 4 }, /* flash sector 4 - 64kb */ + { 0x08020000, 128 * 1024, 5 }, /* flash sector 5 - 128kb */ + { 0x08040000, 128 * 1024, 6 }, /* flash sector 6 - 128kb */ + { 0x08060000, 128 * 1024, 7 }, /* flash sector 7 - 128kb */ +#if (BOOT_NVM_SIZE_KB > 512) + { 0x08080000, 128 * 1024, 8 }, /* flash sector 8 - 128kb */ + { 0x080a0000, 128 * 1024, 9 }, /* flash sector 9 - 128kb */ + { 0x080c0000, 128 * 1024, 10}, /* flash sector 10 - 128kb */ + { 0x080e0000, 128 * 1024, 11}, /* flash sector 11 - 128kb */ #endif /* Bank #2 is not defined */ #if (BOOT_NVM_SIZE_KB > 2048) diff --git a/firmware/hw_layer/openblt/main_internal_osc.c b/firmware/hw_layer/openblt/main_internal_osc.c index 8935e35b19..80dac2091c 100644 --- a/firmware/hw_layer/openblt/main_internal_osc.c +++ b/firmware/hw_layer/openblt/main_internal_osc.c @@ -41,6 +41,11 @@ #include "stm32h7xx.h" /* STM32 CPU and HAL header */ #endif +/* Clocked from APB1 */ +#define STM32_TIMCLK2 (168000000 / 4) +#define ENABLE_AUTO_DETECT_HSE 1 +#include "../ports/stm32/osc_detector.cpp" + /**************************************************************************************** * Function prototypes @@ -128,11 +133,11 @@ static void SystemClock_Config(void) * boards * TODO: actually why not go with internal for _all_ boards? Maybe remove all main_external_osc.c files? */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; - RCC_OscInitStruct.PLL.PLLM = 16; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 25; /* in case of maximum possible 25MHz external osc */ RCC_OscInitStruct.PLL.PLLN = 336; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; RCC_OscInitStruct.PLL.PLLQ = 7; @@ -145,8 +150,8 @@ static void SystemClock_Config(void) } /* Initializes the CPU, AHB and APB buses clocks. */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | + RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; @@ -158,6 +163,8 @@ static void SystemClock_Config(void) */ ASSERT_RT(BLT_FALSE); } + + OscDetector(); } /*** end of SystemClock_Config ***/ @@ -227,15 +234,15 @@ void HAL_MspInit(void) #if (BOOT_COM_USB_ENABLE > 0) /* USB pin configuration. */ - GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12; + GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); /* USB clock enable. */ - __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); #endif } /*** end of HAL_MspInit ***/ diff --git a/firmware/hw_layer/openblt/openblt.mk b/firmware/hw_layer/openblt/openblt.mk index 5c525ef89b..d62348a722 100644 --- a/firmware/hw_layer/openblt/openblt.mk +++ b/firmware/hw_layer/openblt/openblt.mk @@ -108,6 +108,7 @@ ifeq ($(PROJECT_CPU),ARCH_STM32F4) LFLAGS = -Wl,-script="$(PROJECT_DIR)/hw_layer/ports/stm32/stm32f4/openblt/STM32F4xx.ld" # Port specific options PORTFLAGS += -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 + PORTFLAGS += -DSTM32F4XX else ifeq ($(PROJECT_CPU),ARCH_STM32F7) # Collect bootloader port files PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM7_STM32F7/*.c) @@ -119,6 +120,7 @@ else ifeq ($(PROJECT_CPU),ARCH_STM32F7) LFLAGS += -Wl,-script="$(PROJECT_DIR)/hw_layer/ports/stm32/stm32f7/openblt/STM32F7xx.ld" # Port specific options PORTFLAGS = -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16 + PORTFLAGS += -DSTM32F7XX else ifeq ($(PROJECT_CPU),ARCH_STM32H7) # Collect bootloader port files PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Source/ARMCM7_STM32H7/*.c) @@ -130,6 +132,7 @@ else ifeq ($(PROJECT_CPU),ARCH_STM32H7) LFLAGS = -Wl,-script="$(PROJECT_DIR)/hw_layer/ports/stm32/stm32h7/openblt/STM32H7xx.ld" # Port specific options PORTFLAGS += -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-d16 + PORTFLAGS += -DSTM32H7XX endif OPTFLAGS = -Os diff --git a/firmware/hw_layer/ports/stm32/osc_detector.cpp b/firmware/hw_layer/ports/stm32/osc_detector.cpp index 7bc95270d6..76b7e9fe76 100644 --- a/firmware/hw_layer/ports/stm32/osc_detector.cpp +++ b/firmware/hw_layer/ports/stm32/osc_detector.cpp @@ -14,7 +14,9 @@ * (PLLM is set to N for an N-MHz HSE crystal). */ +#ifdef __cplusplus #include "pch.h" +#endif #if ENABLE_AUTO_DETECT_HSE @@ -50,12 +52,14 @@ static uint32_t getTimerCounts(size_t count) { return lastCapture - firstCapture; } +#ifdef __cplusplus // These clocks must all be enabled for this to work static_assert(STM32_HSI_ENABLED); static_assert(STM32_HSE_ENABLED); +#endif #ifdef STM32H7XX -static constexpr float rtcpreDivider = 63; +static const float rtcpreDivider = 63; static void enableTimer() { RCC->APB2ENR |= RCC_APB2ENR_TIM17EN; @@ -94,10 +98,12 @@ static void reprogramPll(uint8_t roundedHseMhz) { } #else // not STM32H7 -static constexpr float rtcpreDivider = 31; +static const float rtcpreDivider = 31; +#ifdef __cplusplus // This only works if you're using the PLL as the configured clock source! static_assert(STM32_SW == RCC_CFGR_SW_PLL); +#endif static void enableTimer() { RCC->APB2ENR |= RCC_APB2ENR_TIM11EN; @@ -130,12 +136,16 @@ static void reprogramPll(uint8_t roundedHseMhz) { // Switch clock source back to PLL RCC->CFGR &= ~RCC_CFGR_SW; RCC->CFGR |= RCC_CFGR_SW_PLL; - while ((RCC->CFGR & RCC_CFGR_SWS) != (STM32_SW << 2)); + while ((RCC->CFGR & RCC_CFGR_SWS) != (RCC_CFGR_SW_PLL << RCC_CFGR_SWS_Pos)); } #endif +#ifdef __cplusplus // __late_init runs after bss/zero initialziation, but before static constructors and main extern "C" void __late_init() { +#else +void OscDetector() { +#endif // Set RTCPRE to /31 - just set all the bits RCC->CFGR |= RCC_CFGR_RTCPRE_Msk; @@ -161,15 +171,14 @@ extern "C" void __late_init() { TIMER->CR1 |= TIM_CR1_CEN; // Measure HSE against SYSCLK - auto hseCounts = getTimerCounts(10); + uint32_t hseCounts = getTimerCounts(10); // Turn off timer now that we're done with it disableTimer(); float hseFrequencyHz = 10 * rtcpreDivider * STM32_TIMCLK2 / hseCounts; - hseFrequencyMhz = hseFrequencyHz / 1e6; - autoDetectedRoundedMhz = efiRound(hseFrequencyMhz, 1); + autoDetectedRoundedMhz = ((int)hseFrequencyHz + (1e6 / 2)) / 1e6; reprogramPll(autoDetectedRoundedMhz); }