From 1ae642e7a72b157076b7f7d8d0923e23b36a548b Mon Sep 17 00:00:00 2001
From: Matthew Kennedy <matthewkennedy@outlook.com>
Date: Thu, 13 Oct 2022 17:30:30 -0700
Subject: [PATCH] build tweaks for size (#4661)

* don't align on non-cached mcu

* lua decimal point

* no snprintf

* sort sections by alignment

* unit tests
---
 firmware/Makefile                                  | 4 ++--
 firmware/controllers/algo/engine_configuration.cpp | 2 +-
 firmware/controllers/lua/luaconf.h                 | 2 +-
 firmware/hw_layer/ports/stm32/stm32f7/hw_ports.mk  | 3 +++
 firmware/hw_layer/ports/stm32/stm32h7/hw_ports.mk  | 3 +++
 unit_tests/global.h                                | 2 ++
 6 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/firmware/Makefile b/firmware/Makefile
index 15b5c3158e..b808360b7b 100644
--- a/firmware/Makefile
+++ b/firmware/Makefile
@@ -58,7 +58,7 @@ endif
 # yes we have two kinds of EXTRA_*PARAMS so that we can define those in two different places independently
 #
 ifeq ($(USE_OPT),)
-  USE_OPT = $(EXTRA_PARAMS) $(EXTRA_2_PARAMS) $(DEBUG_LEVEL_OPT) $(RFLAGS) -fomit-frame-pointer -falign-functions=16 -fsingle-precision-constant  -fno-inline-functions
+  USE_OPT = $(EXTRA_PARAMS) $(EXTRA_2_PARAMS) $(DEBUG_LEVEL_OPT) $(RFLAGS) -fomit-frame-pointer -fsingle-precision-constant  -fno-inline-functions
 endif
 
 # EFI_UNIT_TEST determines if we are running in a unit test (hide things from hw/sim)
@@ -368,7 +368,7 @@ UINCDIR =
 ULIBDIR =
 
 # List all user libraries here
-ULIBS = -lm --specs=nano.specs
+ULIBS = -lm --specs=nano.specs -Wl,--sort-section=alignment
 
 #
 # End of user defines
diff --git a/firmware/controllers/algo/engine_configuration.cpp b/firmware/controllers/algo/engine_configuration.cpp
index 2413a695a3..b19b4b8b88 100644
--- a/firmware/controllers/algo/engine_configuration.cpp
+++ b/firmware/controllers/algo/engine_configuration.cpp
@@ -344,7 +344,7 @@ void setDefaultGppwmParameters() {
 	// Same config for all channels
 	for (size_t i = 0; i < efi::size(engineConfiguration->gppwm); i++) {
 		auto& cfg = engineConfiguration->gppwm[i];
-		snprintf(engineConfiguration->gpPwmNote[i], sizeof(engineConfiguration->gpPwmNote[0]), "GPPWM%d", i);
+		chsnprintf(engineConfiguration->gpPwmNote[i], sizeof(engineConfiguration->gpPwmNote[0]), "GPPWM%d", i);
 
 		cfg.pin = Gpio::Unassigned;
 		cfg.dutyIfError = 0;
diff --git a/firmware/controllers/lua/luaconf.h b/firmware/controllers/lua/luaconf.h
index 484718c93e..2d46999133 100644
--- a/firmware/controllers/lua/luaconf.h
+++ b/firmware/controllers/lua/luaconf.h
@@ -447,7 +447,7 @@ float strtof_rusefi(const char*, char**);
 ** macro must include the header 'locale.h'.)
 */
 #if !defined(lua_getlocaledecpoint)
-#define lua_getlocaledecpoint()		(localeconv()->decimal_point[0])
+#define lua_getlocaledecpoint()		'.'
 #endif
 
 
diff --git a/firmware/hw_layer/ports/stm32/stm32f7/hw_ports.mk b/firmware/hw_layer/ports/stm32/stm32f7/hw_ports.mk
index faea4b4669..2f77f2a97f 100644
--- a/firmware/hw_layer/ports/stm32/stm32f7/hw_ports.mk
+++ b/firmware/hw_layer/ports/stm32/stm32f7/hw_ports.mk
@@ -6,6 +6,9 @@ HW_LAYER_EMS += $(PROJECT_DIR)/hw_layer/ports/stm32/stm32f7/stm32f7xx_hal_flash.
 HW_LAYER_EMS_CPP += $(PROJECT_DIR)/hw_layer/ports/stm32/stm32f7/mpu_util.cpp \
 					$(PROJECT_DIR)/hw_layer/ports/stm32/stm32_adc_v2.cpp \
 
+# This MCU has a cache, align functions to a cache line for maximum cache efficiency
+USE_OPT += -falign-functions=16
+
 DDEFS += -DSTM32F767xx
 MCU = cortex-m7
 LDSCRIPT = $(PROJECT_DIR)/hw_layer/ports/stm32/stm32f7/STM32F7.ld
diff --git a/firmware/hw_layer/ports/stm32/stm32h7/hw_ports.mk b/firmware/hw_layer/ports/stm32/stm32h7/hw_ports.mk
index 2d03cf6fbd..d37aa244e7 100644
--- a/firmware/hw_layer/ports/stm32/stm32h7/hw_ports.mk
+++ b/firmware/hw_layer/ports/stm32/stm32h7/hw_ports.mk
@@ -6,6 +6,9 @@ HW_LAYER_EMS += $(PROJECT_DIR)/hw_layer/ports/stm32/stm32h7/stm32h7xx_hal_flash.
 HW_LAYER_EMS_CPP += $(PROJECT_DIR)/hw_layer/ports/stm32/stm32h7/mpu_util.cpp \
 					$(PROJECT_DIR)/hw_layer/ports/stm32/stm32_adc_v4.cpp \
 
+# This MCU has a cache, align functions to a cache line for maximum cache efficiency
+USE_OPT += -falign-functions=16
+
 DDEFS += -DSTM32H743xx
 MCU = cortex-m7
 LDSCRIPT = $(PROJECT_DIR)/hw_layer/ports/stm32/stm32h7/STM32H743xI.ld
diff --git a/unit_tests/global.h b/unit_tests/global.h
index b4ef20c22e..5b5ccedb0c 100644
--- a/unit_tests/global.h
+++ b/unit_tests/global.h
@@ -75,3 +75,5 @@ namespace chibios_rt {
 #endif
 
 #define UNIT_TEST_BUSY_WAIT_CALLBACK() { 	timeNowUs++; }
+
+#define chsnprintf snprintf