enums: add Gpios for MS IOBox 0
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@ -259,6 +259,9 @@ enum class Gpio : uint16_t {
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TLE9104_5_OUT_1 = 279,
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TLE9104_5_OUT_2 = 280,
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TLE9104_5_OUT_3 = 281,
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/* TODO: add pins for MS IOBox */
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/* TODO: Sync with STM32 reference and delete this file */
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};
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/* Please keep updating these defines */
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@ -341,10 +341,26 @@ enum class Gpio : uint16_t {
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TLE9104_5_OUT_2 = 322,
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TLE9104_5_OUT_3 = 323,
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MSIOBOX_0_OUT_1 = 324,
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MSIOBOX_0_OUT_2 = 325,
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MSIOBOX_0_OUT_3 = 326,
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MSIOBOX_0_OUT_4 = 327,
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MSIOBOX_0_OUT_5 = 328,
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MSIOBOX_0_OUT_6 = 329,
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MSIOBOX_0_OUT_7 = 330,
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MSIOBOX_0_OUT_8 = 331, /* actually not exist, keep for aligment, label NONE in rusefi_config.txt */
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MSIOBOX_0_VSS_1 = 332,
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MSIOBOX_0_VSS_2 = 333,
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MSIOBOX_0_VSS_3 = 334,
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MSIOBOX_0_VSS_4 = 335,
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MSIOBOX_0_SW_1 = 336,
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MSIOBOX_0_SW_2 = 337,
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MSIOBOX_0_SW_3 = 338,
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MSIOBOX_0_SW_4 = 339, /* actually not exist, keep for aligment, label NONE in rusefi_config.txt */
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};
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/* Please keep updating these defines */
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#define BRAIN_PIN_ONCHIP_LAST Gpio::I15
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#define BRAIN_PIN_ONCHIP_PINS (BRAIN_PIN_ONCHIP_LAST - Gpio::A0 + 1)
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#define BRAIN_PIN_LAST Gpio::TLE9104_5_OUT_3
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#define BRAIN_PIN_LAST Gpio::MSIOBOX_0_SW_4
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#define BRAIN_PIN_TOTAL_PINS (BRAIN_PIN_LAST - Gpio::A0 + 1)
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