rusefi
parent
0aa76da9f2
commit
38f480741f
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@ -11,7 +11,8 @@ HW_LAYER_DRIVERS = \
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$(DRIVERS_DIR)/gpio/tle6240.c \
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$(DRIVERS_DIR)/gpio/tle8888.c \
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$(DRIVERS_DIR)/gpio/mc33972.c \
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$(DRIVERS_DIR)/gpio/mc33810.c
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$(DRIVERS_DIR)/gpio/mc33810.c \
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$(DRIVERS_DIR)/gpio/drv8860.c \
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HW_LAYER_DRIVERS_CPP =
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@ -0,0 +1,297 @@
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/*
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* drv8860.c
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*
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* DRV8860 Smart 8/16-Channel Low-Side Switch
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*
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* All channels are controlled via the serial interface (SPI).
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* <200 kHz SPI
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*
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* @date Apr 6, 2020
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*
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* @author andreika, (c) 2020
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* @author Andrey Belomutskiy, (c) 2012-2020
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*/
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#include "global.h"
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#include "gpio/gpio_ext.h"
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#include "gpio/drv8860.h"
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#include "pin_repository.h"
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#include "os_util.h"
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#if (BOARD_DRV8860_COUNT > 0)
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/*==========================================================================*/
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/* Driver local definitions. */
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/*==========================================================================*/
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#define DRIVER_NAME "drv8860"
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static bool drv_task_ready = false;
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typedef enum {
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DRV8860_DISABLED = 0,
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DRV8860_WAIT_INIT,
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DRV8860_READY,
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DRV8860_FAILED
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} drv8860_drv_state;
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/*==========================================================================*/
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/* Driver exported variables. */
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/*==========================================================================*/
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/*==========================================================================*/
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/* Driver local variables and types. */
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/*==========================================================================*/
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/* OS */
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SEMAPHORE_DECL(drv8860_wake, 10 /* or BOARD_DRV8860_COUNT ? */);
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static THD_WORKING_AREA(drv8860_thread_1_wa, 256);
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/* Driver */
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struct drv8860_priv {
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const struct drv8860_config *cfg;
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/* cached output state - state last send to chip */
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uint16_t o_state_cached;
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/* state to be sended to chip */
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uint16_t o_state;
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drv8860_drv_state drv_state;
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};
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static struct drv8860_priv chips[BOARD_DRV8860_COUNT];
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static const char* drv8860_pin_names[DRV8860_OUTPUTS] = {
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"drv8860.OUT1", "drv8860.OUT2", "drv8860.OUT3", "drv8860.OUT4",
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"drv8860.OUT5", "drv8860.OUT6", "drv8860.OUT7", "drv8860.OUT8",
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"drv8860.OUT9", "drv8860.OUT10", "drv8860.OUT11", "drv8860.OUT12",
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"drv8860.OUT13", "drv8860.OUT14", "drv8860.OUT15", "drv8860.OUT16",
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};
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/*==========================================================================*/
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/* Driver local functions. */
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/*==========================================================================*/
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static SPIDriver *get_bus(struct drv8860_priv *chip) {
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/* return non-const SPIDriver* from const struct cfg */
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return chip->cfg->spi_bus;
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}
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/**
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* @brief DRV8860 send routine.
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* @details Sends 8/16 bits. CS asserted before and released after transaction.
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*/
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static void drv8860_spi_send(struct drv8860_priv *chip, uint16_t tx) {
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SPIDriver *spi = get_bus(chip);
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/* Acquire ownership of the bus. */
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spiAcquireBus(spi);
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/* Setup transfer parameters. */
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spiStart(spi, &chip->cfg->spi_config);
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/* Slave Select assertion. */
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spiSelect(spi);
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/* Atomic transfer operations. */
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spiPolledExchange(spi, tx);
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/* Slave Select de-assertion. */
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spiUnselect(spi);
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/* Ownership release. */
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spiReleaseBus(spi);
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}
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/**
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* @brief DRV8860 send output data.
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*/
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static void drv8860_update_outputs(struct drv8860_priv *chip) {
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/* TODO: lock? */
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/* atomic */
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/* set value only for non-direct driven pins */
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drv8860_spi_send(chip, chip->o_state & 0xffff);
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/* atomic */
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chip->o_state_cached = chip->o_state;
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/* TODO: unlock? */
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}
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/**
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* @brief DRV8860 chip init.
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* @details Marks all used pins.
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* @todo: Checks direct io signals integrity, read initial diagnostic state.
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*/
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static int drv8860_chip_init(struct drv8860_priv *chip) {
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/* upload pin states */
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drv8860_update_outputs(chip);
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return 0;
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}
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/**
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* @brief DRV8860 chip driver wakeup.
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* @details Wake up driver. Will cause output register update.
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*/
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static int drv8860_wake_driver(struct drv8860_priv *chip) {
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(void)chip;
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/* Entering a reentrant critical zone.*/
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syssts_t sts = chSysGetStatusAndLockX();
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chSemSignalI(&drv8860_wake);
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/* Leaving the critical zone.*/
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chSysRestoreStatusX(sts);
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return 0;
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}
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/*==========================================================================*/
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/* Driver thread. */
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/*==========================================================================*/
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static THD_FUNCTION(drv8860_driver_thread, p) {
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int i;
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msg_t msg;
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(void)p;
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chRegSetThreadName(DRIVER_NAME);
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while (1) {
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msg = chSemWaitTimeout(&drv8860_wake, TIME_MS2I(DRV8860_POLL_INTERVAL_MS));
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/* should we care about msg == MSG_TIMEOUT? */
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(void)msg;
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for (i = 0; i < BOARD_DRV8860_COUNT; i++) {
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struct drv8860_priv *chip;
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chip = &chips[i];
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if ((chip->cfg == NULL) ||
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(chip->drv_state == DRV8860_DISABLED) ||
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(chip->drv_state == DRV8860_FAILED))
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continue;
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drv8860_update_outputs(chip);
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}
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}
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}
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/*==========================================================================*/
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/* Driver interrupt handlers. */
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/*==========================================================================*/
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/* TODO: add IRQ support */
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/*==========================================================================*/
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/* Driver exported functions. */
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/*==========================================================================*/
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int drv8860_writePad(void *data, unsigned int pin, int value) {
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struct drv8860_priv *chip;
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if ((pin >= DRV8860_OUTPUTS) || (data == NULL))
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return -1;
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chip = (struct drv8860_priv *)data;
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/* TODO: lock */
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if (value)
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chip->o_state |= (1 << pin);
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else
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chip->o_state &= ~(1 << pin);
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/* TODO: unlock */
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drv8860_wake_driver(chip);
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return 0;
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}
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brain_pin_diag_e drv8860_getDiag(void *data, unsigned int pin) {
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// todo: implement diag
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return PIN_OK;
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}
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int drv8860_init(void * data) {
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int ret;
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struct drv8860_priv *chip;
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chip = (struct drv8860_priv *)data;
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ret = drv8860_chip_init(chip);
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if (ret)
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return ret;
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chip->drv_state = DRV8860_READY;
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if (!drv_task_ready) {
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chThdCreateStatic(drv8860_thread_1_wa, sizeof(drv8860_thread_1_wa),
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NORMALPRIO + 1, drv8860_driver_thread, NULL);
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drv_task_ready = true;
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}
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return 0;
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}
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int drv8860_deinit(void *data) {
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(void)data;
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/* TODO: set all pins to inactive state, stop task? */
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return 0;
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}
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struct gpiochip_ops drv8860_ops = {
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.writePad = drv8860_writePad,
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.readPad = NULL, /* chip outputs only */
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.getDiag = drv8860_getDiag,
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.init = drv8860_init,
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.deinit = drv8860_deinit,
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};
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/**
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* @brief DRV8860 driver add.
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* @details Checks for valid config
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*/
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int drv8860_add(unsigned int index, const struct drv8860_config *cfg) {
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int i;
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int ret;
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struct drv8860_priv *chip;
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/* no config or no such chip */
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if ((!cfg) || (!cfg->spi_bus) || (index >= BOARD_DRV8860_COUNT))
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return -1;
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/* check for valid cs.
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* TODO: remove this check? CS can be driven by SPI */
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//if (cfg->spi_config.ssport == NULL)
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// return -1;
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chip = &chips[index];
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/* already initted? */
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if (chip->cfg != NULL)
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return -1;
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chip->cfg = cfg;
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chip->o_state = 0;
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chip->o_state_cached = 0;
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chip->drv_state = DRV8860_WAIT_INIT;
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/* register, return gpio chip base */
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ret = gpiochip_register(DRIVER_NAME, &drv8860_ops, DRV8860_OUTPUTS, chip);
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/* set default pin names, board init code can rewrite */
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gpiochips_setPinNames(ret, drv8860_pin_names);
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return ret;
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}
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#else /* BOARD_DRV8860_COUNT > 0 */
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int drv8860_add(unsigned int index, const struct drv8860_config *cfg) {
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(void)index; (void)cfg;
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return -1;
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}
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#endif /* BOARD_DRV8860_COUNT */
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@ -0,0 +1,43 @@
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/*
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* drv8860.h
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*
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* DRV8860 Smart 8/16-Channel Low-Side Switch
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*
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* @date Apr 6, 2020
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*
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* @author andreika, (c) 2020
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* @author Andrey Belomutskiy, (c) 2012-2020
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*/
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#ifndef HW_LAYER_DRV8860_H_
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#define HW_LAYER_DRV8860_H_
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#include "efifeatures.h"
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#include <hal.h>
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#define DRV8860_OUTPUTS 16
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/* TODO: add irq support */
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#define DRV8860_POLL_INTERVAL_MS 500
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struct drv8860_config {
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SPIDriver *spi_bus;
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SPIConfig spi_config;
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struct {
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ioportid_t port;
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uint_fast8_t pad;
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} reset;
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};
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#ifdef __cplusplus
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extern "C"
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{
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#endif /* __cplusplus */
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int drv8860_add(unsigned int index, const struct drv8860_config *cfg);
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* HW_LAYER_DRV8860_H_ */
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