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m74.9: compile for At32F435

This commit is contained in:
Andrey Gusakov 2023-11-11 23:04:47 +03:00 committed by rusefillc
parent 1ff029a6fb
commit 3cc535707c
7 changed files with 1965 additions and 52 deletions
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265
firmware/config/boards/m74_9/board.c
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@ -1,11 +1,258 @@
/**
* @file boards/m74_9/board.c
*
* @date Jan 01, 2023
* @author Andrey Gusakov, 2023
/*
ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
* This file has been automatically generated using ChibiStudio board
* generator plugin. Do not edit manually.
*/
/* this is empty file. Keep it to avoid using board.c file from $(CHIBIOS)/os/hal/boards/ST_STM32F4_DISCOVERY
* that is added to build by ports/stm32/stm32f4/hw_ports.m
* as we need our own boardInit()
* boardInit() is defined in board_configuration.cpp */
#include "hal.h"
#include "stm32_gpio.h"
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables and types. */
/*===========================================================================*/
/**
* @brief Type of STM32 GPIO port setup.
*/
typedef struct {
uint32_t moder;
uint32_t otyper;
uint32_t ospeedr;
uint32_t pupdr;
uint32_t odr;
uint32_t afrl;
uint32_t afrh;
} gpio_setup_t;
/**
* @brief Type of STM32 GPIO initialization data.
*/
typedef struct {
#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
gpio_setup_t PAData;
#endif
#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
gpio_setup_t PBData;
#endif
#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
gpio_setup_t PCData;
#endif
#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
gpio_setup_t PDData;
#endif
#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
gpio_setup_t PEData;
#endif
#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
gpio_setup_t PFData;
#endif
#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
gpio_setup_t PGData;
#endif
#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
gpio_setup_t PHData;
#endif
#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
gpio_setup_t PIData;
#endif
#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
gpio_setup_t PJData;
#endif
#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
gpio_setup_t PKData;
#endif
} gpio_config_t;
/**
* @brief STM32 GPIO static initialization data.
*/
static const gpio_config_t gpio_default_config = {
#if STM32_HAS_GPIOA
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
#endif
#if STM32_HAS_GPIOB
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
#endif
#if STM32_HAS_GPIOC
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
#endif
#if STM32_HAS_GPIOD
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
#endif
#if STM32_HAS_GPIOE
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
#endif
#if STM32_HAS_GPIOF
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
#endif
#if STM32_HAS_GPIOG
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
#endif
#if STM32_HAS_GPIOH
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
#endif
#if STM32_HAS_GPIOI
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
#endif
#if STM32_HAS_GPIOJ
{VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR,
VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
#endif
#if STM32_HAS_GPIOK
{VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR,
VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
#endif
};
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
gpiop->OTYPER = config->otyper;
gpiop->OSPEEDR = config->ospeedr;
gpiop->PUPDR = config->pupdr;
gpiop->ODR = config->odr;
gpiop->AFRL = config->afrl;
gpiop->AFRH = config->afrh;
gpiop->MODER = config->moder;
}
static void stm32_gpio_init(void) {
/* Enabling GPIO-related clocks, the mask comes from the
registry header file.*/
rccResetAHB1(STM32_GPIO_EN_MASK);
rccEnableAHB1(STM32_GPIO_EN_MASK, true);
/* Initializing all the defined GPIO ports.*/
#if STM32_HAS_GPIOA
gpio_init(GPIOA, &gpio_default_config.PAData);
#endif
#if STM32_HAS_GPIOB
gpio_init(GPIOB, &gpio_default_config.PBData);
#endif
#if STM32_HAS_GPIOC
gpio_init(GPIOC, &gpio_default_config.PCData);
#endif
#if STM32_HAS_GPIOD
gpio_init(GPIOD, &gpio_default_config.PDData);
#endif
#if STM32_HAS_GPIOE
gpio_init(GPIOE, &gpio_default_config.PEData);
#endif
#if STM32_HAS_GPIOF
gpio_init(GPIOF, &gpio_default_config.PFData);
#endif
#if STM32_HAS_GPIOG
gpio_init(GPIOG, &gpio_default_config.PGData);
#endif
#if STM32_HAS_GPIOH
gpio_init(GPIOH, &gpio_default_config.PHData);
#endif
#if STM32_HAS_GPIOI
gpio_init(GPIOI, &gpio_default_config.PIData);
#endif
#if STM32_HAS_GPIOJ
gpio_init(GPIOJ, &gpio_default_config.PJData);
#endif
#if STM32_HAS_GPIOK
gpio_init(GPIOK, &gpio_default_config.PKData);
#endif
}
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Early initialization code.
* @details GPIO ports and system clocks are initialized before everything
* else.
*/
void __early_init(void) {
stm32_gpio_init();
stm32_clock_init();
}
#if HAL_USE_SDC || defined(__DOXYGEN__)
/**
* @brief SDC card detection.
*/
bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
(void)sdcp;
/* CHTODO: Fill the implementation.*/
return true;
}
/**
* @brief SDC card write protection detection.
*/
bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
/* CHTODO: Fill the implementation.*/
return false;
}
#endif /* HAL_USE_SDC */
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
/**
* @brief MMC_SPI card detection.
*/
bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* CHTODO: Fill the implementation.*/
return true;
}
/**
* @brief MMC_SPI card write protection detection.
*/
bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* CHTODO: Fill the implementation.*/
return false;
}
#endif

1676
firmware/config/boards/m74_9/board.h Normal file
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27
firmware/config/boards/m74_9/board.mk
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@ -1,17 +1,36 @@
# List of all the board related files.
BOARDCPPSRC = $(BOARD_DIR)/board_configuration.cpp
DDEFS += -DLED_CRITICAL_ERROR_BRAIN_PIN=Gpio::G14
BOARDCPPSRC = $(BOARD_DIR)/board_configuration.cpp \
$(BOARD_DIR)/../at_start_f435/board_storage.cpp
# This is an F429!
IS_STM32F429 = yes
DDEFS += -DLED_CRITICAL_ERROR_BRAIN_PIN=Gpio::Unassigned
IS_AT32F435 = yes
# board.c from this directory
BOARD_C = $(BOARD_DIR)/board.c
# board.h from this directory
BOARDINC = $(BOARD_DIR)
#This board has no USB wired out
DDEFS += -DSTM32_USB_USE_OTG1=FALSE
DDEFS += -DSTM32_USB_USE_OTG2=FALSE
# This board has no storage
DDEFS += -DEFI_FILE_LOGGING=FALSE
USE_FATFS = no
# Configuration directorys
CONFDIR = $(PROJECT_DIR)/hw_layer/ports/at32/at32f4/cfg
# This board uses ChibiOS MFS driver on internal flash
DDEFS += -DEFI_STORAGE_INT_FLASH=FLASE -DHAL_USE_EFL=TRUE -DEFI_STORAGE_MFS=TRUE
# This board has chip with dual-bank flash, bank 2 can be flashed in background
DDEFS += -DEFI_FLASH_WRITE_THREAD=TRUE
DDEFS += -DFIRMWARE_ID=\"m74_9\"
DDEFS += -DDEFAULT_ENGINE_TYPE=engine_type_e::MINIMAL_PINS
DDEFS += -DSTATIC_BOARD_ID=STATIC_BOARD_ID_M74_9
SHORT_BOARD_NAME=m74_9
DDEFS += -DEFI_BACKUP_SRAM=FALSE

24
firmware/config/boards/m74_9/board_configuration.cpp
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@ -5,32 +5,18 @@
// PB14 is error LED, configured in board.mk
Gpio getCommsLedPin() {
return Gpio::B7;
// this board has LEDs
return Gpio::Unassigned;
}
Gpio getWarningLedPin() {
// this board has no warning led
// this board has LEDs
return Gpio::Unassigned;
}
Gpio getRunningLedPin() {
return Gpio::B0;
}
void preHalInit() {
// leftovers from Nucleo board...
efiSetPadMode("Ethernet", Gpio::A1, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("Ethernet", Gpio::A2, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("Ethernet", Gpio::A7, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("Ethernet", Gpio::B13, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("Ethernet", Gpio::C1, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("Ethernet", Gpio::C4, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("Ethernet", Gpio::C5, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("Ethernet", Gpio::G11, PAL_MODE_ALTERNATE(0xb));
efiSetPadMode("Ethernet", Gpio::G13, PAL_MODE_ALTERNATE(0xb));
// this board has LEDs
return Gpio::Unassigned;
}
static struct l9779_config l9779_cfg = {

2
firmware/config/boards/m74_9/compile_m74_9.sh
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@ -5,4 +5,4 @@
SCRIPT_NAME="compile_m74_9.sh"
echo "Entering $SCRIPT_NAME"
bash ../common_make.sh m74_9 ARCH_STM32F4
bash ../common_make.sh m74_9 ARCH_AT32F4

4
firmware/config/boards/m74_9/efifeatures.h
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@ -12,3 +12,7 @@
#define EFI_FILE_LOGGING FALSE
#include "../../stm32f4ems/efifeatures.h"
/* This board has no USB wired out */
#undef EFI_USB_SERIAL
#define EFI_USB_SERIAL FALSE

19
firmware/config/boards/m74_9/halconf.h
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@ -1,19 +0,0 @@
/**
* @file boards/m74_9/halconf.h
*
* @brief In this header we can override halconf.h.
*
* @date Jan 01, 2023
* @author Andrey Gusakov, 2023
*/
#ifndef _HALCONF_M74_9_H_
#define _HALCONF_M74_9_H_
#define HAL_USE_SDC FALSE
#define HAL_USE_MMC_SPI FALSE
#include "../../../hw_layer/ports/stm32/stm32f4/cfg/halconf.h"
#endif /* _HALCONF_M74_9_H_ */