diff --git a/firmware/hw_layer/ports/stm32/rusEfiStartup.S b/firmware/hw_layer/ports/stm32/rusEfiStartup.S
index 9be2b23b30..0ef9d4b3ff 100644
--- a/firmware/hw_layer/ports/stm32/rusEfiStartup.S
+++ b/firmware/hw_layer/ports/stm32/rusEfiStartup.S
@@ -32,15 +32,7 @@ BEQ UseDFU
 UseDFU:
 	// AN2606 Application note
 	// STM32 microcontroller system memory boot mode
-LDR R0, =0x40023844 // RCC_APB2ENR
-LDR R1, =0x00004000 // ENABLE SYSCFG CLOCK
-STR R1, [R0, #0]
-LDR R0, =0x40013800 // SYSCFG_MEMRMP
-LDR R1, =0x00000001 // MAP ROM AT ZERO
-STR R1, [R0, #0]
-LDR R0, =0x1FFF0000 // ROM BASE
-LDR SP,[R0, #0] // SP @ +0
-LDR R0,[R0, #4] // PC @ +4
+#include "dfu_init.h"
 BX R0 // this jumps to DFU bootloader
 	// I believe we are never executing this line
 // [rusefi][DFU][end]
diff --git a/firmware/hw_layer/ports/stm32/stm32f4/dfu_init.h b/firmware/hw_layer/ports/stm32/stm32f4/dfu_init.h
new file mode 100644
index 0000000000..24db9a7319
--- /dev/null
+++ b/firmware/hw_layer/ports/stm32/stm32f4/dfu_init.h
@@ -0,0 +1,21 @@
+/*
+ * dfu_init.h
+ *
+ * @date Aug 3, 2019
+ * @author Andrey Belomutskiy, (c) 2012-2017
+ */
+
+#ifndef HW_LAYER_PORTS_STM32_STM32F4_DFU_INIT_H_
+#define HW_LAYER_PORTS_STM32_STM32F4_DFU_INIT_H_
+
+LDR R0, =0x40023844 // RCC_APB2ENR
+LDR R1, =0x00004000 // ENABLE SYSCFG CLOCK
+STR R1, [R0, #0]
+LDR R0, =0x40013800 // SYSCFG_MEMRMP
+LDR R1, =0x00000001 // MAP ROM AT ZERO
+STR R1, [R0, #0]
+LDR R0, =0x1FFF0000 // ROM BASE
+LDR SP,[R0, #0] // SP @ +0
+LDR R0,[R0, #4] // PC @ +4
+
+#endif /* HW_LAYER_PORTS_STM32_STM32F4_DFU_INIT_H_ */
diff --git a/firmware/hw_layer/ports/stm32/stm32f7/dfu_init.h b/firmware/hw_layer/ports/stm32/stm32f7/dfu_init.h
new file mode 100644
index 0000000000..a4fff2f71c
--- /dev/null
+++ b/firmware/hw_layer/ports/stm32/stm32f7/dfu_init.h
@@ -0,0 +1,17 @@
+/*
+ * dfu_init.h
+ *
+ * @date Aug 3, 2019
+ * @author Andrey Belomutskiy, (c) 2012-2017
+ */
+
+#ifndef HW_LAYER_PORTS_STM32_STM32F7_DFU_INIT_H_
+#define HW_LAYER_PORTS_STM32_STM32F7_DFU_INIT_H_
+
+LDR R1, =0xE000ED00
+LDR R0, =0x1FF00000
+STR R0, [R1, #8]
+LDR SP, [R0, #0]
+LDR R0, [R0, #4]
+
+#endif /* HW_LAYER_PORTS_STM32_STM32F7_DFU_INIT_H_ */