diff --git a/firmware/chibios/create_patch.sh b/firmware/chibios/create_patch.sh index 1da868c334..d2ab60d171 100644 --- a/firmware/chibios/create_patch.sh +++ b/firmware/chibios/create_patch.sh @@ -11,6 +11,6 @@ find ext -type d -exec mkdir -p os_untouched\\'{}' \; echo Copying files... # now copy all the files we use from the full ChibiOS bundle into our folder where we only keep the needed files -find boards -type f -exec cp ../../../ChibiOS_2.6.1/'{}' os_untouched/'{}' \; -find os -type f -exec cp ../../../ChibiOS_2.6.1/'{}' os_untouched/'{}' \; -find ext -type f -exec cp ../../../ChibiOS_2.6.1/'{}' os_untouched/'{}' \; +find boards -type f -exec cp ../../../ChibiOS_2.6.3/'{}' os_untouched/'{}' \; +find os -type f -exec cp ../../../ChibiOS_2.6.3/'{}' os_untouched/'{}' \; +find ext -type f -exec cp ../../../ChibiOS_2.6.3/'{}' os_untouched/'{}' \; diff --git a/firmware/chibios/os/hal/hal.mk b/firmware/chibios/os/hal/hal.mk index bc587b2d49..f3fa3f758f 100644 --- a/firmware/chibios/os/hal/hal.mk +++ b/firmware/chibios/os/hal/hal.mk @@ -1,5 +1,5 @@ # List of all the ChibiOS/RT HAL files, there is no need to remove the files -# from this list, you can disable parts of the kernel by editing halconf.h. +# from this list, you can disable parts of the HAL by editing halconf.h. HALSRC = ${CHIBIOS}/os/hal/src/hal.c \ ${CHIBIOS}/os/hal/src/adc.c \ ${CHIBIOS}/os/hal/src/can.c \ diff --git a/firmware/chibios/os/hal/include/io_channel.h b/firmware/chibios/os/hal/include/io_channel.h index d6f71145e8..7de6ea6c21 100644 --- a/firmware/chibios/os/hal/include/io_channel.h +++ b/firmware/chibios/os/hal/include/io_channel.h @@ -58,7 +58,7 @@ msg_t (*gett)(void *instance, systime_t time); \ /* Channel write method with timeout specification.*/ \ size_t (*writet)(void *instance, const uint8_t *bp, \ - size_t n, systime_t time); \ + size_t n, systime_t time); \ /* Channel read method with timeout specification.*/ \ size_t (*readt)(void *instance, uint8_t *bp, size_t n, systime_t time); diff --git a/firmware/chibios/os/hal/include/pwm.h b/firmware/chibios/os/hal/include/pwm.h index 567a5728bd..9149944e7c 100644 --- a/firmware/chibios/os/hal/include/pwm.h +++ b/firmware/chibios/os/hal/include/pwm.h @@ -125,8 +125,8 @@ typedef void (*pwmcallback_t)(PWMDriver *pwmp); * @api */ #define PWM_FRACTION_TO_WIDTH(pwmp, denominator, numerator) \ - ((uint16_t)((((uint32_t)(pwmp)->period) * \ - (uint32_t)(numerator)) / (uint32_t)(denominator))) + ((pwmcnt_t)((((pwmcnt_t)(pwmp)->period) * \ + (pwmcnt_t)(numerator)) / (pwmcnt_t)(denominator))) /** * @brief Converts from degrees to pulse width. diff --git a/firmware/chibios/os/hal/include/usb.h b/firmware/chibios/os/hal/include/usb.h index 10fb626818..9ccb199723 100644 --- a/firmware/chibios/os/hal/include/usb.h +++ b/firmware/chibios/os/hal/include/usb.h @@ -85,6 +85,12 @@ #define USB_EARLY_SET_ADDRESS 0 #define USB_LATE_SET_ADDRESS 1 +#define USB_EP0_STATUS_STAGE_SW 0 +#define USB_EP0_STATUS_STAGE_HW 1 + +#define USB_SET_ADDRESS_ACK_SW 0 +#define USB_SET_ADDRESS_ACK_HW 1 + /** * @name Helper macros for USB descriptors * @{ diff --git a/firmware/chibios/os/hal/platforms/STM32/GPIOv2/pal_lld.c b/firmware/chibios/os/hal/platforms/STM32/GPIOv2/pal_lld.c index f2db60b58e..2600f1f3e1 100644 --- a/firmware/chibios/os/hal/platforms/STM32/GPIOv2/pal_lld.c +++ b/firmware/chibios/os/hal/platforms/STM32/GPIOv2/pal_lld.c @@ -31,7 +31,7 @@ /* Driver local definitions. */ /*===========================================================================*/ -#if defined(STM32L1XX_MD) +#if defined(STM32L1XX) #define AHB_EN_MASK (RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | \ RCC_AHBENR_GPIOCEN | RCC_AHBENR_GPIODEN | \ RCC_AHBENR_GPIOEEN | RCC_AHBENR_GPIOHEN) @@ -52,8 +52,8 @@ RCC_AHB1ENR_GPIOEEN | RCC_AHB1ENR_GPIOFEN | \ RCC_AHB1ENR_GPIOGEN | RCC_AHB1ENR_GPIOHEN | \ RCC_AHB1ENR_GPIOIEN) - #define AHB1_LPEN_MASK AHB1_EN_MASK + #elif defined(STM32F30X) || defined(STM32F37X) #define AHB_EN_MASK (RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | \ RCC_AHBENR_GPIOCEN | RCC_AHBENR_GPIODEN | \ @@ -115,7 +115,7 @@ void _pal_lld_init(const PALConfig *config) { /* * Enables the GPIO related clocks. */ -#if defined(STM32L1XX_MD) +#if defined(STM32L1XX) rccEnableAHB(AHB_EN_MASK, TRUE); RCC->AHBLPENR |= AHB_LPEN_MASK; #elif defined(STM32F0XX) diff --git a/firmware/chibios/os/hal/platforms/STM32/I2Cv1/i2c_lld.h b/firmware/chibios/os/hal/platforms/STM32/I2Cv1/i2c_lld.h index 13903ca9a2..5844841fae 100644 --- a/firmware/chibios/os/hal/platforms/STM32/I2Cv1/i2c_lld.h +++ b/firmware/chibios/os/hal/platforms/STM32/I2Cv1/i2c_lld.h @@ -273,7 +273,7 @@ #error "I2C peripheral clock frequency out of range." #endif -#elif defined(STM32L1XX_MD) +#elif defined(STM32L1XX) #if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 32) #error "I2C peripheral clock frequency out of range." #endif diff --git a/firmware/chibios/os/hal/platforms/STM32/OTGv1/usb_lld.c b/firmware/chibios/os/hal/platforms/STM32/OTGv1/usb_lld.c index d30aa1f3c5..e6dfa8f88c 100644 --- a/firmware/chibios/os/hal/platforms/STM32/OTGv1/usb_lld.c +++ b/firmware/chibios/os/hal/platforms/STM32/OTGv1/usb_lld.c @@ -33,7 +33,10 @@ /* Driver local definitions. */ /*===========================================================================*/ -#define TRDT_VALUE 5 +#define TRDT_VALUE 5 + +#define EP0_MAX_INSIZE 64 +#define EP0_MAX_OUTSIZE 64 /*===========================================================================*/ /* Driver exported variables. */ @@ -556,7 +559,23 @@ static void otg_epin_handler(USBDriver *usbp, usbep_t ep) { } if ((epint & DIEPINT_XFRC) && (otgp->DIEPMSK & DIEPMSK_XFRCM)) { /* Transmit transfer complete.*/ - _usb_isr_invoke_in_cb(usbp, ep); + USBInEndpointState *isp = usbp->epc[ep]->in_state; + + if (isp->txsize < isp->totsize) { + /* In case the transaction covered only part of the total transfer + then another transaction is immediately started in order to + cover the remaining.*/ + isp->txsize = isp->totsize - isp->txsize; + isp->txcnt = 0; + usb_lld_prepare_transmit(usbp, ep); + chSysLockFromIsr(); + usb_lld_start_in(usbp, ep); + chSysUnlockFromIsr(); + } + else { + /* End on IN transfer.*/ + _usb_isr_invoke_in_cb(usbp, ep); + } } if ((epint & DIEPINT_TXFE) && (otgp->DIEPEMPMSK & DIEPEMPMSK_INEPTXFEM(ep))) { @@ -592,7 +611,23 @@ static void otg_epout_handler(USBDriver *usbp, usbep_t ep) { } if ((epint & DOEPINT_XFRC) && (otgp->DOEPMSK & DOEPMSK_XFRCM)) { /* Receive transfer complete.*/ - _usb_isr_invoke_out_cb(usbp, ep); + USBOutEndpointState *osp = usbp->epc[ep]->out_state; + + if (osp->rxsize < osp->totsize) { + /* In case the transaction covered only part of the total transfer + then another transaction is immediately started in order to + cover the remaining.*/ + osp->rxsize = osp->totsize - osp->rxsize; + osp->rxcnt = 0; + usb_lld_prepare_receive(usbp, ep); + chSysLockFromIsr(); + usb_lld_start_out(usbp, ep); + chSysUnlockFromIsr(); + } + else { + /* End on OUT transfer.*/ + _usb_isr_invoke_out_cb(usbp, ep); + } } } @@ -861,6 +896,10 @@ void usb_lld_start(USBDriver *usbp) { rccEnableOTG_HS(FALSE); rccResetOTG_HS(); + /* Workaround for the problem described here: + http://forum.chibios.org/phpbb/viewtopic.php?f=16&t=1798 */ + rccDisableOTG_HSULPI(TRUE); + /* Enables IRQ vector.*/ nvicEnableVector(STM32_OTG2_NUMBER, CORTEX_PRIORITY_MASK(STM32_USB_OTG2_IRQ_PRIORITY)); @@ -1192,10 +1231,14 @@ void usb_lld_prepare_receive(USBDriver *usbp, usbep_t ep) { USBOutEndpointState *osp = usbp->epc[ep]->out_state; /* Transfer initialization.*/ + osp->totsize = osp->rxsize; + if ((ep == 0) && (osp->rxsize > EP0_MAX_OUTSIZE)) + osp->rxsize = EP0_MAX_OUTSIZE; + pcnt = (osp->rxsize + usbp->epc[ep]->out_maxsize - 1) / usbp->epc[ep]->out_maxsize; usbp->otg->oe[ep].DOEPTSIZ = DOEPTSIZ_STUPCNT(3) | DOEPTSIZ_PKTCNT(pcnt) | - DOEPTSIZ_XFRSIZ(usbp->epc[ep]->out_maxsize); + DOEPTSIZ_XFRSIZ(osp->rxsize); } @@ -1211,18 +1254,21 @@ void usb_lld_prepare_transmit(USBDriver *usbp, usbep_t ep) { USBInEndpointState *isp = usbp->epc[ep]->in_state; /* Transfer initialization.*/ + isp->totsize = isp->txsize; if (isp->txsize == 0) { /* Special case, sending zero size packet.*/ usbp->otg->ie[ep].DIEPTSIZ = DIEPTSIZ_PKTCNT(1) | DIEPTSIZ_XFRSIZ(0); } else { + if ((ep == 0) && (isp->txsize > EP0_MAX_INSIZE)) + isp->txsize = EP0_MAX_INSIZE; + /* Normal case.*/ uint32_t pcnt = (isp->txsize + usbp->epc[ep]->in_maxsize - 1) / usbp->epc[ep]->in_maxsize; usbp->otg->ie[ep].DIEPTSIZ = DIEPTSIZ_PKTCNT(pcnt) | - DIEPTSIZ_XFRSIZ(usbp->epc[ep]->in_state->txsize); + DIEPTSIZ_XFRSIZ(isp->txsize); } - } /** diff --git a/firmware/chibios/os/hal/platforms/STM32/OTGv1/usb_lld.h b/firmware/chibios/os/hal/platforms/STM32/OTGv1/usb_lld.h index dab007d03d..e8ff68fb0f 100644 --- a/firmware/chibios/os/hal/platforms/STM32/OTGv1/usb_lld.h +++ b/firmware/chibios/os/hal/platforms/STM32/OTGv1/usb_lld.h @@ -42,6 +42,11 @@ #define USB_MAX_ENDPOINTS 5 #endif +/** + * @brief Status stage handling method. + */ +#define USB_EP0_STATUS_STAGE USB_EP0_STATUS_STAGE_SW + /** * @brief The address can be changed immediately upon packet reception. */ @@ -221,6 +226,10 @@ typedef struct { OutputQueue *txqueue; } queue; } mode; + /** + * @brief Total transmit transfer size. + */ + size_t totsize; } USBInEndpointState; /** @@ -253,6 +262,10 @@ typedef struct { InputQueue *rxqueue; } queue; } mode; + /** + * @brief Total transmit transfer size. + */ + size_t totsize; } USBOutEndpointState; /** diff --git a/firmware/chibios/os/hal/platforms/STM32/RTCv2/rtc_lld.c b/firmware/chibios/os/hal/platforms/STM32/RTCv2/rtc_lld.c index 138dc904cc..c853fee697 100644 --- a/firmware/chibios/os/hal/platforms/STM32/RTCv2/rtc_lld.c +++ b/firmware/chibios/os/hal/platforms/STM32/RTCv2/rtc_lld.c @@ -20,7 +20,7 @@ /** * @file STM32/RTCv2/rtc_lld.c - * @brief STM32L1xx/STM32F2xx/STM32F4xx RTC low level driver. + * @brief RTC low level driver. * * @addtogroup RTC * @{ @@ -51,6 +51,7 @@ RTCDriver RTCD1; /*===========================================================================*/ /* Driver local functions. */ /*===========================================================================*/ + /** * @brief Wait for synchronization of RTC registers with APB1 bus. * @details This function must be invoked before trying to read RTC registers. @@ -64,10 +65,10 @@ RTCDriver RTCD1; * * @notapi */ -#define rtc_lld_enter_init() { \ - RTCD1.id_rtc->ISR |= RTC_ISR_INIT; \ - while ((RTCD1.id_rtc->ISR & RTC_ISR_INITF) == 0) \ - ; \ +#define rtc_lld_enter_init() { \ + RTCD1.id_rtc->ISR |= RTC_ISR_INIT; \ + while ((RTCD1.id_rtc->ISR & RTC_ISR_INITF) == 0) \ + ; \ } /** @@ -164,16 +165,17 @@ void rtc_lld_get_time(RTCDriver *rtcp, RTCTime *timespec) { * @note Default value after BKP domain reset for both comparators is 0. * @note Function does not performs any checks of alarm time validity. * - * @param[in] rtcp Pointer to RTC driver structure. - * @param[in] alarm Alarm identifier. Can be 1 or 2. - * @param[in] alarmspec Pointer to a @p RTCAlarm structure. + * @param[in] rtcp pointer to RTC driver structure + * @param[in] alarm alarm identifier starting from zero + * @param[in] alarmspec pointer to a @p RTCAlarm structure * * @api */ void rtc_lld_set_alarm(RTCDriver *rtcp, rtcalarm_t alarm, const RTCAlarm *alarmspec) { - if (alarm == 1){ + + if (alarm == 0) { if (alarmspec != NULL){ rtcp->id_rtc->CR &= ~RTC_CR_ALRAE; while(!(rtcp->id_rtc->ISR & RTC_ISR_ALRAWF)) @@ -209,7 +211,7 @@ void rtc_lld_set_alarm(RTCDriver *rtcp, * @brief Get alarm time. * * @param[in] rtcp pointer to RTC driver structure - * @param[in] alarm alarm identifier + * @param[in] alarm alarm identifier starting from zero * @param[out] alarmspec pointer to a @p RTCAlarm structure * * @api @@ -217,7 +219,8 @@ void rtc_lld_set_alarm(RTCDriver *rtcp, void rtc_lld_get_alarm(RTCDriver *rtcp, rtcalarm_t alarm, RTCAlarm *alarmspec) { - if (alarm == 1) + + if (alarm == 0) alarmspec->tv_datetime = rtcp->id_rtc->ALRMAR; #if RTC_ALARMS == 2 else @@ -236,11 +239,12 @@ void rtc_lld_get_alarm(RTCDriver *rtcp, * @api */ #if RTC_HAS_PERIODIC_WAKEUPS -void rtcSetPeriodicWakeup_v2(RTCDriver *rtcp, RTCWakeup *wakeupspec){ - chDbgCheck((wakeupspec->wakeup != 0x30000), - "rtc_lld_set_periodic_wakeup, forbidden combination"); +void rtcSetPeriodicWakeup_v2(RTCDriver *rtcp, const RTCWakeup *wakeupspec) { if (wakeupspec != NULL){ + chDbgCheck((wakeupspec->wakeup != 0x30000), + "rtc_lld_set_periodic_wakeup, forbidden combination"); + rtcp->id_rtc->CR &= ~RTC_CR_WUTE; while(!(rtcp->id_rtc->ISR & RTC_ISR_WUTWF)) ; @@ -267,7 +271,8 @@ void rtcSetPeriodicWakeup_v2(RTCDriver *rtcp, RTCWakeup *wakeupspec){ * @api */ #if RTC_HAS_PERIODIC_WAKEUPS -void rtcGetPeriodicWakeup_v2(RTCDriver *rtcp, RTCWakeup *wakeupspec){ +void rtcGetPeriodicWakeup_v2(RTCDriver *rtcp, RTCWakeup *wakeupspec) { + wakeupspec->wakeup = 0; wakeupspec->wakeup |= rtcp->id_rtc->WUTR; wakeupspec->wakeup |= (((uint32_t)rtcp->id_rtc->CR) & 0x7) << 16; diff --git a/firmware/chibios/os/hal/platforms/STM32/RTCv2/rtc_lld.h b/firmware/chibios/os/hal/platforms/STM32/RTCv2/rtc_lld.h index 632f3a5fbe..84cd6efe94 100644 --- a/firmware/chibios/os/hal/platforms/STM32/RTCv2/rtc_lld.h +++ b/firmware/chibios/os/hal/platforms/STM32/RTCv2/rtc_lld.h @@ -20,7 +20,7 @@ /** * @file STM32/RTCv2/rtc_lld.h - * @brief STM32L1xx/STM32F2xx/STM32F4xx RTC low level driver header. + * @brief RTC low level driver header. * * @addtogroup RTC * @{ @@ -210,7 +210,7 @@ extern "C" { rtcalarm_t alarm, RTCAlarm *alarmspec); #if RTC_HAS_PERIODIC_WAKEUPS - void rtcSetPeriodicWakeup_v2(RTCDriver *rtcp, RTCWakeup *wakeupspec); + void rtcSetPeriodicWakeup_v2(RTCDriver *rtcp, const RTCWakeup *wakeupspec); void rtcGetPeriodicWakeup_v2(RTCDriver *rtcp, RTCWakeup *wakeupspec); #endif /* RTC_HAS_PERIODIC_WAKEUPS */ uint32_t rtc_lld_get_time_fat(RTCDriver *rtcp); diff --git a/firmware/chibios/os/hal/platforms/STM32/SPIv1/spi_lld.h b/firmware/chibios/os/hal/platforms/STM32/SPIv1/spi_lld.h index f931851656..c7a417907c 100644 --- a/firmware/chibios/os/hal/platforms/STM32/SPIv1/spi_lld.h +++ b/firmware/chibios/os/hal/platforms/STM32/SPIv1/spi_lld.h @@ -42,7 +42,7 @@ /** * @brief SPI1 driver enable switch. * @details If set to @p TRUE the support for SPI1 is included. - * @note The default is @p TRUE. + * @note The default is @p FALSE. */ #if !defined(STM32_SPI_USE_SPI1) || defined(__DOXYGEN__) #define STM32_SPI_USE_SPI1 FALSE @@ -51,7 +51,7 @@ /** * @brief SPI2 driver enable switch. * @details If set to @p TRUE the support for SPI2 is included. - * @note The default is @p TRUE. + * @note The default is @p FALSE. */ #if !defined(STM32_SPI_USE_SPI2) || defined(__DOXYGEN__) #define STM32_SPI_USE_SPI2 FALSE @@ -60,7 +60,7 @@ /** * @brief SPI3 driver enable switch. * @details If set to @p TRUE the support for SPI3 is included. - * @note The default is @p TRUE. + * @note The default is @p FALSE. */ #if !defined(STM32_SPI_USE_SPI3) || defined(__DOXYGEN__) #define STM32_SPI_USE_SPI3 FALSE @@ -69,7 +69,7 @@ /** * @brief SPI4 driver enable switch. * @details If set to @p TRUE the support for SPI4 is included. - * @note The default is @p TRUE. + * @note The default is @p FALSE. */ #if !defined(STM32_SPI_USE_SPI4) || defined(__DOXYGEN__) #define STM32_SPI_USE_SPI4 FALSE @@ -78,7 +78,7 @@ /** * @brief SPI5 driver enable switch. * @details If set to @p TRUE the support for SPI5 is included. - * @note The default is @p TRUE. + * @note The default is @p FALSE. */ #if !defined(STM32_SPI_USE_SPI5) || defined(__DOXYGEN__) #define STM32_SPI_USE_SPI5 FALSE @@ -87,7 +87,7 @@ /** * @brief SPI6 driver enable switch. * @details If set to @p TRUE the support for SPI6 is included. - * @note The default is @p TRUE. + * @note The default is @p FALSE. */ #if !defined(STM32_SPI_USE_SPI6) || defined(__DOXYGEN__) #define STM32_SPI_USE_SPI6 FALSE @@ -520,7 +520,7 @@ typedef struct { /** * @brief Structure representing a SPI driver. */ -struct SPIDriver{ +struct SPIDriver { /** * @brief Driver state. */ diff --git a/firmware/chibios/os/hal/platforms/STM32/TIMv1/icu_lld.c b/firmware/chibios/os/hal/platforms/STM32/TIMv1/icu_lld.c index ab17fb6984..2ceeaca363 100644 --- a/firmware/chibios/os/hal/platforms/STM32/TIMv1/icu_lld.c +++ b/firmware/chibios/os/hal/platforms/STM32/TIMv1/icu_lld.c @@ -469,28 +469,28 @@ void icu_lld_start(ICUDriver *icup) { rccResetTIM9(); nvicEnableVector(STM32_TIM9_NUMBER, CORTEX_PRIORITY_MASK(STM32_ICU_TIM9_IRQ_PRIORITY)); - icup->clock = STM32_TIMCLK1; + icup->clock = STM32_TIMCLK2; } #endif } else { /* Driver re-configuration scenario, it must be stopped first.*/ icup->tim->CR1 = 0; /* Timer disabled. */ - icup->tim->DIER = icup->config->dier &/* DMA-related DIER settings. */ - ~STM32_TIM_DIER_IRQ_MASK; - icup->tim->SR = 0; /* Clear eventual pending IRQs. */ icup->tim->CCR[0] = 0; /* Comparator 1 disabled. */ icup->tim->CCR[1] = 0; /* Comparator 2 disabled. */ icup->tim->CNT = 0; /* Counter reset to zero. */ } /* Timer configuration.*/ + icup->tim->SR = 0; /* Clear eventual pending IRQs. */ + icup->tim->DIER = icup->config->dier & /* DMA-related DIER settings. */ + ~STM32_TIM_DIER_IRQ_MASK; psc = (icup->clock / icup->config->frequency) - 1; chDbgAssert((psc <= 0xFFFF) && ((psc + 1) * icup->config->frequency) == icup->clock, "icu_lld_start(), #1", "invalid frequency"); icup->tim->PSC = (uint16_t)psc; - icup->tim->ARR = 0xFFFF; + icup->tim->ARR = 0xFFFF; if (icup->config->channel == ICU_CHANNEL_1) { /* Selected input 1. diff --git a/firmware/chibios/os/hal/platforms/STM32/TIMv1/pwm_lld.c b/firmware/chibios/os/hal/platforms/STM32/TIMv1/pwm_lld.c index 1c79e2c4d1..78f7957ebe 100644 --- a/firmware/chibios/os/hal/platforms/STM32/TIMv1/pwm_lld.c +++ b/firmware/chibios/os/hal/platforms/STM32/TIMv1/pwm_lld.c @@ -398,7 +398,8 @@ void pwm_lld_init(void) { */ void pwm_lld_start(PWMDriver *pwmp) { uint32_t psc; - uint16_t ccer; + uint32_t ccer; + uint32_t dier; if (pwmp->state == PWM_STOP) { /* Clock activation and timer reset.*/ @@ -475,7 +476,7 @@ void pwm_lld_start(PWMDriver *pwmp) { rccResetTIM9(); nvicEnableVector(STM32_TIM9_NUMBER, CORTEX_PRIORITY_MASK(STM32_PWM_TIM9_IRQ_PRIORITY)); - pwmp->clock = STM32_TIMCLK1; + pwmp->clock = STM32_TIMCLK2; } #endif @@ -489,9 +490,6 @@ void pwm_lld_start(PWMDriver *pwmp) { else { /* Driver re-configuration scenario, it must be stopped first.*/ pwmp->tim->CR1 = 0; /* Timer disabled. */ - pwmp->tim->DIER = pwmp->config->dier &/* DMA-related DIER settings. */ - ~STM32_TIM_DIER_IRQ_MASK; - pwmp->tim->SR = 0; /* Clear eventual pending IRQs. */ pwmp->tim->CCR[0] = 0; /* Comparator 1 disabled. */ pwmp->tim->CCR[1] = 0; /* Comparator 2 disabled. */ pwmp->tim->CCR[2] = 0; /* Comparator 3 disabled. */ @@ -581,8 +579,9 @@ void pwm_lld_start(PWMDriver *pwmp) { pwmp->tim->CCER = ccer; pwmp->tim->EGR = STM32_TIM_EGR_UG; /* Update event. */ - pwmp->tim->DIER |= pwmp->config->callback == NULL ? 0 : STM32_TIM_DIER_UIE; pwmp->tim->SR = 0; /* Clear pending IRQs. */ + pwmp->tim->DIER = (pwmp->config->callback == NULL ? 0 : STM32_TIM_DIER_UIE) | + (pwmp->config->dier & ~STM32_TIM_DIER_IRQ_MASK); #if STM32_PWM_USE_TIM1 || STM32_PWM_USE_TIM8 #if STM32_PWM_USE_ADVANCED pwmp->tim->BDTR = pwmp->config->bdtr | STM32_TIM_BDTR_MOE; diff --git a/firmware/chibios/os/hal/platforms/STM32/can_lld.c b/firmware/chibios/os/hal/platforms/STM32/can_lld.c index 3e1391c855..4c02c006bc 100644 --- a/firmware/chibios/os/hal/platforms/STM32/can_lld.c +++ b/firmware/chibios/os/hal/platforms/STM32/can_lld.c @@ -65,8 +65,8 @@ CANDriver CAND2; * @notapi */ static void can_lld_set_filters(uint32_t can2sb, - uint32_t num, - const CANFilter *cfp) { + uint32_t num, + const CANFilter *cfp) { /* Temporarily enabling CAN1 clock.*/ rccEnableCAN1(FALSE); @@ -106,12 +106,19 @@ static void can_lld_set_filters(uint32_t can2sb, CANs.*/ CAN1->sFilterRegister[0].FR1 = 0; CAN1->sFilterRegister[0].FR2 = 0; +#if STM32_HAS_CAN2 CAN1->sFilterRegister[can2sb].FR1 = 0; CAN1->sFilterRegister[can2sb].FR2 = 0; +#endif CAN1->FM1R = 0; CAN1->FFA1R = 0; +#if STM32_HAS_CAN2 CAN1->FS1R = 1 | (1 << can2sb); CAN1->FA1R = 1 | (1 << can2sb); +#else + CAN1->FS1R = 1; + CAN1->FA1R = 1; +#endif } CAN1->FMR &= ~CAN_FMR_FINIT; @@ -383,7 +390,6 @@ void can_lld_init(void) { #else can_lld_set_filters(STM32_CAN_MAX_FILTERS, 0, NULL); #endif - } /** @@ -698,8 +704,8 @@ void can_lld_wakeup(CANDriver *canp) { */ void canSTM32SetFilters(uint32_t can2sb, uint32_t num, const CANFilter *cfp) { - chDbgCheck((can2sb > 1) && (can2sb < STM32_CAN_MAX_FILTERS) && - (num < STM32_CAN_MAX_FILTERS), + chDbgCheck((can2sb >= 1) && (can2sb < STM32_CAN_MAX_FILTERS) && + (num <= STM32_CAN_MAX_FILTERS), "canSTM32SetFilters"); #if STM32_CAN_USE_CAN1 diff --git a/firmware/chibios/os/hal/platforms/STM32/can_lld.h b/firmware/chibios/os/hal/platforms/STM32/can_lld.h index 8c3c17329a..7a037c4a35 100644 --- a/firmware/chibios/os/hal/platforms/STM32/can_lld.h +++ b/firmware/chibios/os/hal/platforms/STM32/can_lld.h @@ -355,6 +355,7 @@ extern "C" { void can_lld_sleep(CANDriver *canp); void can_lld_wakeup(CANDriver *canp); #endif /* CAN_USE_SLEEP_MODE */ + void canSTM32SetFilters(uint32_t can2sb, uint32_t num, const CANFilter *cfp); #ifdef __cplusplus } #endif diff --git a/firmware/chibios/os/hal/platforms/STM32/ext_lld.c b/firmware/chibios/os/hal/platforms/STM32/ext_lld.c index 23e3e98753..6dee976196 100644 --- a/firmware/chibios/os/hal/platforms/STM32/ext_lld.c +++ b/firmware/chibios/os/hal/platforms/STM32/ext_lld.c @@ -120,6 +120,24 @@ void ext_lld_stop(EXTDriver *extp) { */ void ext_lld_channel_enable(EXTDriver *extp, expchannel_t channel) { + /* Setting the associated GPIO for external channels.*/ + if (channel < 16) { + uint32_t n = channel >> 2; + uint32_t mask = ~(0xF << ((channel & 3) * 4)); + uint32_t port = ((extp->config->channels[channel].mode & + EXT_MODE_GPIO_MASK) >> + EXT_MODE_GPIO_OFF) << ((channel & 3) * 4); + +#if defined(STM32F10X_LD_VL) || defined(STM32F10X_MD_VL) || \ + defined(STM32F10X_HD_VL) || defined(STM32F10X_LD) || \ + defined(STM32F10X_MD) || defined(STM32F10X_HD) || \ + defined(STM32F10X_XL) || defined(STM32F10X_CL) + AFIO->EXTICR[n] = (AFIO->EXTICR[n] & mask) | port; +#else /* !defined(STM32F1XX) */ + SYSCFG->EXTICR[n] = (SYSCFG->EXTICR[n] & mask) | port; +#endif /* !defined(STM32F1XX) */ + } + #if STM32_EXTI_NUM_CHANNELS > 32 if (channel < 32) { #endif @@ -166,22 +184,6 @@ void ext_lld_channel_enable(EXTDriver *extp, expchannel_t channel) { } } #endif - - /* Setting the associated GPIO for external channels.*/ - if (channel < 16) { - uint32_t n = channel >> 2; - uint32_t mask = ~(0xF << ((channel & 3) * 4)); - uint32_t port = ((extp->config->channels[channel].mode & - EXT_MODE_GPIO_MASK) >> - EXT_MODE_GPIO_OFF) << ((channel & 3) * 4); - -#if defined(STM32L1XX_MD) || defined(STM32F0XX) || defined(STM32F2XX) || \ - defined(STM32F30X) || defined(STM32F37X) || defined(STM32F4XX) - SYSCFG->EXTICR[n] = (SYSCFG->EXTICR[n] & mask) | port; -#else /* STM32F1XX */ - AFIO->EXTICR[n] = (AFIO->EXTICR[n] & mask) | port; -#endif /* STM32F1XX */ - } } /** diff --git a/firmware/chibios/os/hal/platforms/STM32/mac_lld.c b/firmware/chibios/os/hal/platforms/STM32/mac_lld.c index 88862c754f..a237ca3f0c 100644 --- a/firmware/chibios/os/hal/platforms/STM32/mac_lld.c +++ b/firmware/chibios/os/hal/platforms/STM32/mac_lld.c @@ -83,8 +83,10 @@ static uint32_t tb[STM32_MAC_TRANSMIT_BUFFERS][BUFFER_SIZE]; * @param[in] macp pointer to the @p MACDriver object * @param[in] reg register number * @param[in] value new register value + * + * @notapi */ -static void mii_write(MACDriver *macp, uint32_t reg, uint32_t value) { +void mii_write(MACDriver *macp, uint32_t reg, uint32_t value) { ETH->MACMIIDR = value; ETH->MACMIIAR = macp->phyaddr | (reg << 6) | MACMIIDR_CR | @@ -100,8 +102,10 @@ static void mii_write(MACDriver *macp, uint32_t reg, uint32_t value) { * @param[in] reg register number * * @return The PHY register content. + * + * @notapi */ -static uint32_t mii_read(MACDriver *macp, uint32_t reg) { +uint32_t mii_read(MACDriver *macp, uint32_t reg) { ETH->MACMIIAR = macp->phyaddr | (reg << 6) | MACMIIDR_CR | ETH_MACMIIAR_MB; while ((ETH->MACMIIAR & ETH_MACMIIAR_MB) != 0) @@ -297,9 +301,11 @@ void mac_lld_start(MACDriver *macp) { /* MAC clocks activation and commanded reset procedure.*/ rccEnableETH(FALSE); +#if defined(STM32_MAC_DMABMR_SR) ETH->DMABMR |= ETH_DMABMR_SR; while(ETH->DMABMR & ETH_DMABMR_SR) ; +#endif /* ISR vector enabled.*/ nvicEnableVector(ETH_IRQn, diff --git a/firmware/chibios/os/hal/platforms/STM32/mac_lld.h b/firmware/chibios/os/hal/platforms/STM32/mac_lld.h index 730106a6a4..1d2c50b00c 100644 --- a/firmware/chibios/os/hal/platforms/STM32/mac_lld.h +++ b/firmware/chibios/os/hal/platforms/STM32/mac_lld.h @@ -328,6 +328,8 @@ extern MACDriver ETHD1; #ifdef __cplusplus extern "C" { #endif + void mii_write(MACDriver *macp, uint32_t reg, uint32_t value); + uint32_t mii_read(MACDriver *macp, uint32_t reg); void mac_lld_init(void); void mac_lld_start(MACDriver *macp); void mac_lld_stop(MACDriver *macp); diff --git a/firmware/chibios/os/hal/platforms/STM32/sdc_lld.c b/firmware/chibios/os/hal/platforms/STM32/sdc_lld.c index 19cd729340..483d277ff6 100644 --- a/firmware/chibios/os/hal/platforms/STM32/sdc_lld.c +++ b/firmware/chibios/os/hal/platforms/STM32/sdc_lld.c @@ -497,7 +497,7 @@ bool_t sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, while (((sta = SDIO->STA) & (SDIO_STA_CMDREND | SDIO_STA_CTIMEOUT | SDIO_STA_CCRCFAIL)) == 0) ; - SDIO->ICR = sta; + SDIO->ICR = sta & (SDIO_STA_CMDREND | SDIO_STA_CTIMEOUT | SDIO_STA_CCRCFAIL); if ((sta & (SDIO_STA_CTIMEOUT)) != 0) { sdc_lld_collect_errors(sdcp, sta); return CH_FAILED; @@ -531,7 +531,7 @@ bool_t sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, while (((sta = SDIO->STA) & (SDIO_STA_CMDREND | SDIO_STA_CTIMEOUT | SDIO_STA_CCRCFAIL)) == 0) ; - SDIO->ICR = sta; + SDIO->ICR = sta & (SDIO_STA_CMDREND | SDIO_STA_CTIMEOUT | SDIO_STA_CCRCFAIL); if ((sta & (SDIO_STA_CTIMEOUT | SDIO_STA_CCRCFAIL)) != 0) { sdc_lld_collect_errors(sdcp, sta); return CH_FAILED; @@ -566,7 +566,7 @@ bool_t sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, while (((sta = SDIO->STA) & (SDIO_STA_CMDREND | SDIO_STA_CTIMEOUT | SDIO_STA_CCRCFAIL)) == 0) ; - SDIO->ICR = sta; + SDIO->ICR = sta & (SDIO_STA_CMDREND | SDIO_STA_CTIMEOUT | SDIO_STA_CCRCFAIL); if ((sta & (STM32_SDIO_STA_ERROR_MASK)) != 0) { sdc_lld_collect_errors(sdcp, sta); return CH_FAILED; diff --git a/firmware/chibios/os/hal/platforms/STM32/stm32.h b/firmware/chibios/os/hal/platforms/STM32/stm32.h index 2b1d347841..16e0a80ea9 100644 --- a/firmware/chibios/os/hal/platforms/STM32/stm32.h +++ b/firmware/chibios/os/hal/platforms/STM32/stm32.h @@ -33,6 +33,8 @@ * - STM32F37X for Analog & DSP devices. * - STM32F4XX for High-performance STM32 F-4 devices. * - STM32L1XX_MD for Ultra Low Power Medium-density devices. + * - STM32L1XX_MDP for Ultra Low Power Medium-density Plus devices. + * - STM32L1XX_HD for Ultra Low Power High-density devices. * . * * @addtogroup HAL @@ -66,7 +68,8 @@ defined(STM32F427_437xx) || defined(STM32F429_439xx) #include "stm32f4xx.h" -#elif defined(STM32L1XX_MD) +#elif defined(STM32L1XX_MD) || defined(STM32L1XX_MDP) || \ + defined(STM32L1XX_HD) #include "stm32l1xx.h" #else diff --git a/firmware/chibios/os/hal/platforms/STM32F4xx/ext_lld_isr.c b/firmware/chibios/os/hal/platforms/STM32F4xx/ext_lld_isr.c index 763f3c2d6a..9b56f4ddb3 100644 --- a/firmware/chibios/os/hal/platforms/STM32F4xx/ext_lld_isr.c +++ b/firmware/chibios/os/hal/platforms/STM32F4xx/ext_lld_isr.c @@ -239,6 +239,7 @@ CH_IRQ_HANDLER(ETH_WKUP_IRQHandler) { CH_IRQ_EPILOGUE(); } +#if !defined(STM32F401xx) /** * @brief EXTI[20] interrupt handler (OTG_HS_WKUP). * @@ -268,6 +269,7 @@ CH_IRQ_HANDLER(TAMPER_STAMP_IRQHandler) { CH_IRQ_EPILOGUE(); } +#endif /* !defined(STM32F401xx) */ /** * @brief EXTI[22] interrupt handler (RTC_WKUP). @@ -315,12 +317,14 @@ void ext_lld_exti_irq_enable(void) { CORTEX_PRIORITY_MASK(STM32_EXT_EXTI17_IRQ_PRIORITY)); nvicEnableVector(OTG_FS_WKUP_IRQn, CORTEX_PRIORITY_MASK(STM32_EXT_EXTI18_IRQ_PRIORITY)); +#if !defined(STM32F401xx) nvicEnableVector(ETH_WKUP_IRQn, CORTEX_PRIORITY_MASK(STM32_EXT_EXTI19_IRQ_PRIORITY)); nvicEnableVector(OTG_HS_WKUP_IRQn, CORTEX_PRIORITY_MASK(STM32_EXT_EXTI20_IRQ_PRIORITY)); nvicEnableVector(TAMP_STAMP_IRQn, CORTEX_PRIORITY_MASK(STM32_EXT_EXTI21_IRQ_PRIORITY)); +#endif /* !defined(STM32F401xx) */ nvicEnableVector(RTC_WKUP_IRQn, CORTEX_PRIORITY_MASK(STM32_EXT_EXTI22_IRQ_PRIORITY)); } @@ -342,9 +346,11 @@ void ext_lld_exti_irq_disable(void) { nvicDisableVector(PVD_IRQn); nvicDisableVector(RTC_Alarm_IRQn); nvicDisableVector(OTG_FS_WKUP_IRQn); +#if !defined(STM32F401xx) nvicDisableVector(ETH_WKUP_IRQn); nvicDisableVector(OTG_HS_WKUP_IRQn); nvicDisableVector(TAMP_STAMP_IRQn); +#endif /* !defined(STM32F401xx) */ nvicDisableVector(RTC_WKUP_IRQn); } diff --git a/firmware/chibios/os/hal/platforms/STM32F4xx/stm32_rcc.h b/firmware/chibios/os/hal/platforms/STM32F4xx/stm32_rcc.h index 6a4b55de5c..91fce72cbf 100644 --- a/firmware/chibios/os/hal/platforms/STM32F4xx/stm32_rcc.h +++ b/firmware/chibios/os/hal/platforms/STM32F4xx/stm32_rcc.h @@ -664,6 +664,24 @@ * @api */ #define rccResetOTG_HS() rccResetAHB1(RCC_AHB1RSTR_OTGHSRST) + +/** + * @brief Enables the OTG_HS peripheral clock. + * + * @param[in] lp low power enable flag + * + * @api + */ +#define rccEnableOTG_HSULPI(lp) rccEnableAHB1(RCC_AHB1ENR_OTGHSULPIEN, lp) + +/** + * @brief Disables the OTG_HS peripheral clock. + * + * @param[in] lp low power enable flag + * + * @api + */ +#define rccDisableOTG_HSULPI(lp) rccDisableAHB1(RCC_AHB1ENR_OTGHSULPIEN, lp) /** @} */ /** diff --git a/firmware/chibios/os/hal/src/mmc_spi.c b/firmware/chibios/os/hal/src/mmc_spi.c index aa75ced429..19a2173ccb 100644 --- a/firmware/chibios/os/hal/src/mmc_spi.c +++ b/firmware/chibios/os/hal/src/mmc_spi.c @@ -455,6 +455,7 @@ bool_t mmcConnect(MMCDriver *mmcp) { /* Connection procedure in progress.*/ mmcp->state = BLK_CONNECTING; + mmcp->block_addresses = FALSE; /* Slow clock mode and 128 clock pulses.*/ spiStart(mmcp->config->spip, mmcp->config->lscfg); diff --git a/firmware/chibios/os/hal/src/sdc.c b/firmware/chibios/os/hal/src/sdc.c index 5554982ea2..55baa6e7a4 100644 --- a/firmware/chibios/os/hal/src/sdc.c +++ b/firmware/chibios/os/hal/src/sdc.c @@ -230,7 +230,12 @@ bool_t sdcConnect(SDCDriver *sdcp) { sdcp->cardmode = SDC_MODE_CARDTYPE_MMC; else #endif /* SDC_MMC_SUPPORT */ + { sdcp->cardmode = SDC_MODE_CARDTYPE_SDV11; + + /* Reset error flag illegal command.*/ + sdc_lld_send_cmd_none(sdcp, MMCSD_CMD_GO_IDLE_STATE, 0); + } } #if SDC_MMC_SUPPORT diff --git a/firmware/chibios/os/kernel/include/chevents.h b/firmware/chibios/os/kernel/include/chevents.h index 892b9b6cf7..026351e6c5 100644 --- a/firmware/chibios/os/kernel/include/chevents.h +++ b/firmware/chibios/os/kernel/include/chevents.h @@ -56,7 +56,7 @@ struct EventListener { by the thread to the Event Source. */ flagsmask_t el_flags; /**< @brief Flags added to the listener - by the event source.*/ + by the event source. */ }; /** @@ -115,7 +115,7 @@ typedef void (*evhandler_t)(eventid_t); * identifier is used as index for the event callback * function. * The value must range between zero and the size, in bit, - * of the @p eventid_t type minus one. + * of the @p eventmask_t type minus one. * * @api */ diff --git a/firmware/chibios/os/kernel/include/chthreads.h b/firmware/chibios/os/kernel/include/chthreads.h index 2c7aeb1c2b..cc942bb53e 100644 --- a/firmware/chibios/os/kernel/include/chthreads.h +++ b/firmware/chibios/os/kernel/include/chthreads.h @@ -284,8 +284,8 @@ typedef msg_t (*tfunc_t)(void *); * @brief Verifies if the current thread has a termination request pending. * @note Can be invoked in any context. * - * @retval TRUE termination request pending. - * @retval FALSE termination request not pending. + * @retval 0 termination request not pending. + * @retval !0 termination request pending. * * @special */ diff --git a/firmware/chibios/os/various/chrtclib.c b/firmware/chibios/os/various/chrtclib.c index 38cf4010fe..509ddde6e1 100644 --- a/firmware/chibios/os/various/chrtclib.c +++ b/firmware/chibios/os/various/chrtclib.c @@ -33,6 +33,8 @@ #include "chrtclib.h" +#if HAL_USE_RTC || defined(__DOXYGEN__) + #if (defined(STM32F4XX) || defined(STM32F2XX) || defined(STM32L1XX) || \ defined(STM32F30X) || defined(STM32F37X) || \ defined(STM32F1XX) || defined(STM32F10X_MD) || defined(STM32F10X_LD) || \ @@ -357,4 +359,6 @@ uint32_t rtcGetTimeFatFromCounter(RTCDriver *rtcp) { #endif /* STM32_RTC_IS_CALENDAR */ #endif /* (defined(STM32F4XX) || defined(STM32F2XX) || defined(STM32L1XX) || defined(STM32F1XX)) */ +#endif /* HAL_USE_RTC */ + /** @} */ diff --git a/firmware/chibios/os/various/chrtclib.h b/firmware/chibios/os/various/chrtclib.h index 508639d290..7761110416 100644 --- a/firmware/chibios/os/various/chrtclib.h +++ b/firmware/chibios/os/various/chrtclib.h @@ -31,6 +31,8 @@ #include +#if HAL_USE_RTC || defined(__DOXYGEN__) + /*===========================================================================*/ /* External declarations. */ /*===========================================================================*/ @@ -50,6 +52,8 @@ extern "C" { } #endif +#endif /* HAL_USE_RTC */ + #endif /* CHRTCLIB_H_ */ /** @} */