andreika-git
/
rusefi
mirror of https://github.com/andreika-git/rusefi.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

auto-sync

This commit is contained in:
rusEfi 2014-12-08 11:03:20 -06:00
parent e9e67c51b2
commit 5b9f245931
4 changed files with 6329 additions and 248 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4006
hardware/Breakout_TLE6244/Breakout_TLE6244.kicad_pcb
View File

File diff suppressed because it is too large Load Diff

1117
hardware/Breakout_TLE6244/Breakout_TLE6244.net Normal file
View File

File diff suppressed because it is too large Load Diff

40
hardware/Breakout_TLE6244/Breakout_TLE6244.pro
View File

@ -1,4 +1,4 @@
update=12/6/2014 8:55:54 PM update=12/8/2014 5:30:16 AM
version=1 version=1
last_client=pcbnew last_client=pcbnew
[cvpcb] [cvpcb]
@ -6,9 +6,11 @@ version=1
NetIExt=net NetIExt=net
[cvpcb/libraries] [cvpcb/libraries]
EquName1=devcms EquName1=devcms
[general]
version=1
[eeschema] [eeschema]
version=1 version=1
LibDir= LibDir=../rusefi_lib
NetFmtName= NetFmtName=
RptD_X=0 RptD_X=0
RptD_Y=100 RptD_Y=100
@ -45,27 +47,27 @@ LibName27=opto
LibName28=atmel LibName28=atmel
LibName29=contrib LibName29=contrib
LibName30=valves LibName30=valves
[general] LibName31=TLE6244
version=1 LibName32=art-electro-ic
[pcbnew] [pcbnew]
version=1 version=1
LastNetListRead= LastNetListRead=
UseCmpFile=1 UseCmpFile=1
PadDrill=0.600000000000 PadDrill=5.020000000000
PadDrillOvalY=0.600000000000 PadDrillOvalY=5.020000000000
PadSizeH=1.500000000000 PadSizeH=6.000000000000
PadSizeV=1.500000000000 PadSizeV=3.810000000000
PcbTextSizeV=1.500000000000 PcbTextSizeV=0.508000000000
PcbTextSizeH=1.500000000000 PcbTextSizeH=0.508000000000
PcbTextThickness=0.300000000000 PcbTextThickness=0.304800000000
ModuleTextSizeV=1.000000000000 ModuleTextSizeV=0.508000000000
ModuleTextSizeH=1.000000000000 ModuleTextSizeH=0.508000000000
ModuleTextSizeThickness=0.150000000000 ModuleTextSizeThickness=0.508000000000
SolderMaskClearance=0.000000000000 SolderMaskClearance=0.200000000000
SolderMaskMinWidth=0.000000000000 SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000 DrawSegmentWidth=0.127000000000
BoardOutlineThickness=0.100000000000 BoardOutlineThickness=0.127000000000
ModuleOutlineThickness=0.150000000000 ModuleOutlineThickness=0.254000000000
[pcbnew/libraries] [pcbnew/libraries]
LibDir=../rusefi_lib LibDir=../rusefi_lib
LibName1=sockets LibName1=sockets
@ -85,3 +87,5 @@ LibName14=dip_sockets
LibName15=pga_sockets LibName15=pga_sockets
LibName16=valves LibName16=valves
LibName17=HiQUAD64 LibName17=HiQUAD64
LibName18=SM0805-Jumper
LibName19=art-electro-conn

1414
hardware/Breakout_TLE6244/Breakout_TLE6244.sch Normal file
View File

File diff suppressed because it is too large Load Diff