mc33810: diagnostic for GPGD mode, comments, ops number two
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@ -11,6 +11,12 @@
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*
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*
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* @date Jan 03, 2020
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* @date Jan 03, 2020
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* @author Andrey Gusakov <dron0gus@gmail.com>, (c) 2020
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* @author Andrey Gusakov <dron0gus@gmail.com>, (c) 2020
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*
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* Masks bits/inputs numbers:
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* 0..3 - OUT1 .. 3 - Low-Side Injector drivers, 4.5A max
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* driven through DIN0 .. 3 or SPI (not supported)
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* 4..7 - GD0 .. 3 - Gate Driver outputs - IGBT of MOSFET pre-drivers,
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* driven throug GIN0 .. 3 or SPI in GPGD mode (not supported)
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*/
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*/
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#include "pch.h"
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#include "pch.h"
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@ -126,6 +132,8 @@ struct Mc33810 : public GpioChip {
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uint8_t o_state;
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uint8_t o_state;
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/* direct driven output mask */
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/* direct driven output mask */
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uint8_t o_direct_mask;
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uint8_t o_direct_mask;
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/* IGN/GPGD mode bits: [7:4] - GP3..GP0 */
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uint8_t o_gpgd_mask;
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/* ALL STATUS RESPONSE value and flags */
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/* ALL STATUS RESPONSE value and flags */
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bool all_status_updated;
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bool all_status_updated;
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@ -133,8 +141,9 @@ struct Mc33810 : public GpioChip {
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/* OUTx fault registers */
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/* OUTx fault registers */
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uint16_t out_fault[2];
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uint16_t out_fault[2];
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/* GPGD mode fault register */
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/* GP mode fault register */
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uint16_t gpgd_fault;
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/* TODO: check documentation if these faults also applied to GPx outputs in IGN mode */
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uint16_t gp_fault;
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/* IGN mode fault register */
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/* IGN mode fault register */
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uint16_t ign_fault;
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uint16_t ign_fault;
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@ -263,7 +272,7 @@ int Mc33810::update_output_and_diag()
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}
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}
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/* now we have updated ALL STATUS register in chip data */
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/* now we have updated ALL STATUS register in chip data */
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/* check OUT (injectors) first */
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/* check OUTx (injectors) first */
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if (all_status_value & 0x000f) {
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if (all_status_value & 0x000f) {
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/* request diagnostic of OUT0 and OUT1 */
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/* request diagnostic of OUT0 and OUT1 */
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ret = spi_rw(MC_CMD_READ_REG(REG_OUT10_FAULT), NULL);
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ret = spi_rw(MC_CMD_READ_REG(REG_OUT10_FAULT), NULL);
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@ -277,17 +286,21 @@ int Mc33810::update_output_and_diag()
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ret = spi_rw(MC_CMD_READ_REG(REG_ALL_STAT), &out_fault[1]);
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ret = spi_rw(MC_CMD_READ_REG(REG_ALL_STAT), &out_fault[1]);
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if (ret)
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if (ret)
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return ret;
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return ret;
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} else {
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out_fault[0] = out_fault[1] = 0;
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}
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}
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/* check GPGD - mode not supported yet */
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/* check outputs in GPGD mode */
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if (all_status_value & 0x00f0) {
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if (all_status_value & 0x00f0) {
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/* request diagnostic of GPGD */
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/* request diagnostic of GPGD */
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ret = spi_rw(MC_CMD_READ_REG(REG_GPGD_FAULT), NULL);
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ret = spi_rw(MC_CMD_READ_REG(REG_GPGD_FAULT), NULL);
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if (ret)
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if (ret)
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return ret;
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return ret;
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/* get diagnostic for GPGD and request ALL STATUS */
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/* get diagnostic for GPGD and request ALL STATUS */
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ret = spi_rw(MC_CMD_READ_REG(REG_ALL_STAT), &gpgd_fault);
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ret = spi_rw(MC_CMD_READ_REG(REG_ALL_STAT), &gp_fault);
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if (ret)
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if (ret)
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return ret;
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return ret;
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} else {
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gp_fault = 0;
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}
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}
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/* check IGN */
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/* check IGN */
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if (all_status_value & 0x0f00) {
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if (all_status_value & 0x0f00) {
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@ -299,6 +312,8 @@ int Mc33810::update_output_and_diag()
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ret = spi_rw(MC_CMD_READ_REG(REG_ALL_STAT), &ign_fault);
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ret = spi_rw(MC_CMD_READ_REG(REG_ALL_STAT), &ign_fault);
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if (ret)
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if (ret)
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return ret;
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return ret;
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} else {
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ign_fault = 0;
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}
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}
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alive_cnt++;
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alive_cnt++;
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@ -421,12 +436,16 @@ int Mc33810::chip_init()
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goto err_exit;
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goto err_exit;
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}
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}
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/* update local configuration mask */
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o_gpgd_mask =
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(engineConfiguration->mc33810Gpgd0Mode << 4) |
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(engineConfiguration->mc33810Gpgd1Mode << 5) |
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(engineConfiguration->mc33810Gpgd2Mode << 6) |
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(engineConfiguration->mc33810Gpgd3Mode << 7);
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uint16_t mode_select_cmd =
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uint16_t mode_select_cmd =
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/* set IGN/GP mode for GPx outputs */
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/* set IGN/GP mode for GPx outputs: [7:4] to [11:8] */
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(engineConfiguration->mc33810Gpgd0Mode << 8) |
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((o_gpgd_mask & 0xf0) << 4) |
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(engineConfiguration->mc33810Gpgd1Mode << 9) |
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(engineConfiguration->mc33810Gpgd2Mode << 10) |
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(engineConfiguration->mc33810Gpgd3Mode << 11) |
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/* disable/enable retry after recovering from under/overvoltage */
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/* disable/enable retry after recovering from under/overvoltage */
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(engineConfiguration->mc33810DisableRecoveryMode << 6) |
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(engineConfiguration->mc33810DisableRecoveryMode << 6) |
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0;
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0;
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@ -591,7 +610,16 @@ brain_pin_diag_e Mc33810::getDiag(size_t pin)
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if (val & BIT(3))
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if (val & BIT(3))
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diag |= PIN_DRIVER_OVERTEMP;
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diag |= PIN_DRIVER_OVERTEMP;
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} else {
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} else {
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/* INJ drivers, GPGD mode is not supported */
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/* Commom GP faults */
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val = gp_fault >> (2 * (pin - 4));
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if (val & BIT(0))
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diag |= PIN_OPEN;
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if (val & BIT(1))
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diag |= PIN_SHORT_TO_GND;
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/* IGN mode faults, only if not in GPGD mode */
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if ((o_gpgd_mask & BIT(pin)) == 0) {
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val = ign_fault >> (3 * (pin - 4));
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val = ign_fault >> (3 * (pin - 4));
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/* open load */
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/* open load */
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@ -604,6 +632,7 @@ brain_pin_diag_e Mc33810::getDiag(size_t pin)
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if (val & BIT(2))
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if (val & BIT(2))
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diag |= PIN_OVERLOAD;
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diag |= PIN_OVERLOAD;
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}
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}
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}
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/* convert to some common enum? */
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/* convert to some common enum? */
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return static_cast<brain_pin_diag_e>(diag);
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return static_cast<brain_pin_diag_e>(diag);
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}
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}
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@ -689,7 +718,7 @@ void mc33810_req_init() {
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size_t i;
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size_t i;
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for (i = 0; i < BOARD_MC33810_COUNT; i++) {
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for (i = 0; i < BOARD_MC33810_COUNT; i++) {
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auto& chip = chips[0];
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auto& chip = chips[i];
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chip.need_init = true;
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chip.need_init = true;
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}
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}
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