From 714c190093642718e1d43794af53ea7147426f35 Mon Sep 17 00:00:00 2001 From: Matthew Kennedy Date: Mon, 18 Nov 2024 02:55:09 -0800 Subject: [PATCH] h7 sdmmc clocking --- firmware/hw_layer/ports/stm32/stm32h7/cfg/mcuconf.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/firmware/hw_layer/ports/stm32/stm32h7/cfg/mcuconf.h b/firmware/hw_layer/ports/stm32/stm32h7/cfg/mcuconf.h index d677786844..86dd7bdae9 100644 --- a/firmware/hw_layer/ports/stm32/stm32h7/cfg/mcuconf.h +++ b/firmware/hw_layer/ports/stm32/stm32h7/cfg/mcuconf.h @@ -115,7 +115,7 @@ #define STM32_PLL2_FRACN_VALUE 0 #define STM32_PLL2_DIVP_VALUE 10 #define STM32_PLL2_DIVQ_VALUE 12 -#define STM32_PLL2_DIVR_VALUE 2 +#define STM32_PLL2_DIVR_VALUE 20 #define STM32_PLL3_ENABLED TRUE #define STM32_PLL3_P_ENABLED TRUE #define STM32_PLL3_Q_ENABLED TRUE @@ -155,7 +155,7 @@ #define STM32_STOPWUCK 0 #define STM32_RTCPRE_VALUE 8 #define STM32_CKPERSEL STM32_CKPERSEL_HSE_CK -#define STM32_SDMMCSEL STM32_SDMMCSEL_PLL1_Q_CK +#define STM32_SDMMCSEL STM32_SDMMCSEL_PLL2_R_CK #define STM32_QSPISEL STM32_QSPISEL_HCLK #define STM32_FMCSEL STM32_QSPISEL_HCLK #define STM32_SWPSEL STM32_SWPSEL_PCLK1