update to fresh openocd 0.10.0

misc/install/openocd/stlink-v2-1.cfg

@@ -1,16 +1,2 @@
-#
+echo "WARNING: interface/stlink-v2-1.cfg is deprecated, please switch to interface/stlink.cfg"
-# STMicroelectronics ST-LINK/V2-1 in-circuit debugger/programmer
+source [find openocd/stlink.cfg]
-#
-
-interface hla
-hla_layout stlink
-hla_device_desc "ST-LINK/V2-1"
-hla_vid_pid 0x0483 0x374b
-
-# Optionally specify the serial number of ST-LINK/V2 usb device.  ST-LINK/V2
-# devices seem to have serial numbers with unreadable characters.  ST-LINK/V2
-# firmware version >= V2.J21.S4 recommended to avoid issues with adapter serial
-# number reset issues.
-# eg.
-#hla_serial "\xaa\xbc\x6e\x06\x50\x75\xff\x55\x17\x42\x19\x3f"
-

misc/install/openocd/stlink-v2.cfg

@@ -1,16 +1,2 @@
-#
+echo "WARNING: interface/stlink-v2.cfg is deprecated, please switch to interface/stlink.cfg"
-# STMicroelectronics ST-LINK/V2 in-circuit debugger/programmer
+source [find openocd/stlink.cfg]
-#
-
-interface hla
-hla_layout stlink
-hla_device_desc "ST-LINK/V2"
-hla_vid_pid 0x0483 0x3748
-
-# Optionally specify the serial number of ST-LINK/V2 usb device.  ST-LINK/V2
-# devices seem to have serial numbers with unreadable characters.  ST-LINK/V2
-# firmware version >= V2.J21.S4 recommended to avoid issues with adapter serial
-# number reset issues.
-# eg.
-#hla_serial "\xaa\xbc\x6e\x06\x50\x75\xff\x55\x17\x42\x19\x3f"
-

misc/install/openocd/stlink.cfg

@@ -0,0 +1,17 @@
+#
+# STMicroelectronics ST-LINK/V1, ST-LINK/V2, ST-LINK/V2-1 in-circuit
+# debugger/programmer
+#
+
+interface hla
+hla_layout stlink
+hla_device_desc "ST-LINK"
+hla_vid_pid 0x0483 0x3744 0x0483 0x3748 0x0483 0x374b
+
+# Optionally specify the serial number of ST-LINK/V2 usb device.  ST-LINK/V2
+# devices seem to have serial numbers with unreadable characters.  ST-LINK/V2
+# firmware version >= V2.J21.S4 recommended to avoid issues with adapter serial
+# number reset issues.
+# eg.
+#hla_serial "\xaa\xbc\x6e\x06\x50\x75\xff\x55\x17\x42\x19\x3f"
+

misc/install/openocd/stm32f429disc1.cfg

@@ -3,7 +3,7 @@
 # http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/PF259090
 #
 
-source [find openocd/stlink-v2-1.cfg]
+source [find openocd/stlink.cfg]
 
 transport select hla_swd
 

misc/install/openocd/stm32f4discovery.cfg

@@ -1,10 +1,13 @@
 # This is an STM32F4 discovery board with a single STM32F407VGT6 chip.
 # http://www.st.com/internet/evalboard/product/252419.jsp
 
-source [find openocd/stlink-v2.cfg]
+source [find openocd/stlink.cfg]
 
 transport select hla_swd
 
+# increase working area to 64KB
+set WORKAREASIZE 0x10000
+
 source [find openocd/stm32f4x.cfg]
 
 reset_config srst_only

misc/install/openocd/stm32f4x.cfg

@@ -36,44 +36,14 @@ if { [info exists CPUTAPID] } {
 }
 
 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
-if { [info exists BSTAPID] } {
-   set _BSTAPID $BSTAPID
-} else {
-  # See STM Document RM0090
-  # Section 38.6.2
-  # STM32F405xx/07xx and STM32F415xx/17xx
-  set _BSTAPID1 0x06413041
-  # STM32F42xxx and STM32F43xxx
-  set _BSTAPID2 0x06419041
-  # See STM Document RM0368 (Rev. 3)
-  # STM32F401B/C
-  set _BSTAPID3 0x06423041
-  # STM32F401D/E
-  set _BSTAPID4 0x06433041
-  # See STM Document RM0383 (Rev 2)
-  # STM32F411
-  set _BSTAPID5 0x06431041
-  # See STM Document RM0386
-  # STM32F469
-  set _BSTAPID6 0x06434041
-  # See STM Document RM0401
-  # STM32F410
-  set _BSTAPID7 0x06458041
-  # STM32F412
-  set _BSTAPID8 0x06441041
-}
 
 if {[using_jtag]} {
- swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
+   jtag newtap $_CHIPNAME bs -irlen 5
-     -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
-     -expected-id $_BSTAPID4 -expected-id $_BSTAPID5 \
-     -expected-id $_BSTAPID6 -expected-id $_BSTAPID7 \
-     -expected-id $_BSTAPID8
 }
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
 
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 

misc/install/openocd_old_0.9.0/mem_helper.tcl

@@ -0,0 +1,31 @@
+# Helper for common memory read/modify/write procedures
+
+# mrw: "memory read word", returns value of $reg
+proc mrw {reg} {
+	set value ""
+	mem2array value 32 $reg 1
+	return $value(0)
+}
+
+add_usage_text mrw "address"
+add_help_text mrw "Returns value of word in memory."
+
+proc mrb {reg} {
+	set value ""
+	mem2array value 8 $reg 1
+	return $value(0)
+}
+
+add_usage_text mrb "address"
+add_help_text mrb "Returns value of byte in memory."
+
+# mmw: "memory modify word", updates value of $reg
+#       $reg <== ((value & ~$clearbits) | $setbits)
+proc mmw {reg setbits clearbits} {
+	set old [mrw $reg]
+	set new [expr ($old & ~$clearbits) | $setbits]
+	mww $reg $new
+}
+
+add_usage_text mmw "address setbits clearbits"
+add_help_text mmw "Modify word in memory. new_val = (old_val & ~clearbits) | setbits;"

misc/install/openocd_old_0.9.0/stlink-v2-1.cfg

@@ -0,0 +1,16 @@
+#
+# STMicroelectronics ST-LINK/V2-1 in-circuit debugger/programmer
+#
+
+interface hla
+hla_layout stlink
+hla_device_desc "ST-LINK/V2-1"
+hla_vid_pid 0x0483 0x374b
+
+# Optionally specify the serial number of ST-LINK/V2 usb device.  ST-LINK/V2
+# devices seem to have serial numbers with unreadable characters.  ST-LINK/V2
+# firmware version >= V2.J21.S4 recommended to avoid issues with adapter serial
+# number reset issues.
+# eg.
+#hla_serial "\xaa\xbc\x6e\x06\x50\x75\xff\x55\x17\x42\x19\x3f"
+

misc/install/openocd_old_0.9.0/stlink-v2.cfg

@@ -0,0 +1,16 @@
+#
+# STMicroelectronics ST-LINK/V2 in-circuit debugger/programmer
+#
+
+interface hla
+hla_layout stlink
+hla_device_desc "ST-LINK/V2"
+hla_vid_pid 0x0483 0x3748
+
+# Optionally specify the serial number of ST-LINK/V2 usb device.  ST-LINK/V2
+# devices seem to have serial numbers with unreadable characters.  ST-LINK/V2
+# firmware version >= V2.J21.S4 recommended to avoid issues with adapter serial
+# number reset issues.
+# eg.
+#hla_serial "\xaa\xbc\x6e\x06\x50\x75\xff\x55\x17\x42\x19\x3f"
+

misc/install/openocd_old_0.9.0/stm32f429disc1.cfg

@@ -0,0 +1,12 @@
+#
+# This is an STM32F429 discovery board with a single STM32F429ZI chip.
+# http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/PF259090
+#
+
+source [find openocd/stlink-v2-1.cfg]
+
+transport select hla_swd
+
+source [find openocd/stm32f4x.cfg]
+
+reset_config srst_only

misc/install/openocd_old_0.9.0/stm32f4discovery.cfg

@@ -0,0 +1,10 @@
+# This is an STM32F4 discovery board with a single STM32F407VGT6 chip.
+# http://www.st.com/internet/evalboard/product/252419.jsp
+
+source [find openocd/stlink-v2.cfg]
+
+transport select hla_swd
+
+source [find openocd/stm32f4x.cfg]
+
+reset_config srst_only

misc/install/openocd_old_0.9.0/stm32f4x.cfg

@@ -0,0 +1,137 @@
+# script for stm32f4x family
+
+#
+# stm32 devices support both JTAG and SWD transports.
+#
+source [find openocd/swj-dp.tcl]
+source [find openocd/mem_helper.tcl]
+
+if { [info exists CHIPNAME] } {
+   set _CHIPNAME $CHIPNAME
+} else {
+   set _CHIPNAME stm32f4x
+}
+
+set _ENDIAN little
+
+# Work-area is a space in RAM used for flash programming
+# By default use 32kB (Available RAM in smallest device STM32F410)
+if { [info exists WORKAREASIZE] } {
+   set _WORKAREASIZE $WORKAREASIZE
+} else {
+   set _WORKAREASIZE 0x8000
+}
+
+#jtag scan chain
+if { [info exists CPUTAPID] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+   if { [using_jtag] } {
+      # See STM Document RM0090
+      # Section 38.6.3 - corresponds to Cortex-M4 r0p1
+      set _CPUTAPID 0x4ba00477
+   } {
+      set _CPUTAPID 0x2ba01477
+   }
+}
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+if { [info exists BSTAPID] } {
+   set _BSTAPID $BSTAPID
+} else {
+  # See STM Document RM0090
+  # Section 38.6.2
+  # STM32F405xx/07xx and STM32F415xx/17xx
+  set _BSTAPID1 0x06413041
+  # STM32F42xxx and STM32F43xxx
+  set _BSTAPID2 0x06419041
+  # See STM Document RM0368 (Rev. 3)
+  # STM32F401B/C
+  set _BSTAPID3 0x06423041
+  # STM32F401D/E
+  set _BSTAPID4 0x06433041
+  # See STM Document RM0383 (Rev 2)
+  # STM32F411
+  set _BSTAPID5 0x06431041
+  # See STM Document RM0386
+  # STM32F469
+  set _BSTAPID6 0x06434041
+  # See STM Document RM0401
+  # STM32F410
+  set _BSTAPID7 0x06458041
+  # STM32F412
+  set _BSTAPID8 0x06441041
+}
+
+if {[using_jtag]} {
+ swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
+     -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
+     -expected-id $_BSTAPID4 -expected-id $_BSTAPID5 \
+     -expected-id $_BSTAPID6 -expected-id $_BSTAPID7 \
+     -expected-id $_BSTAPID8
+}
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME
+
+# JTAG speed should be <= F_CPU/6. F_CPU after reset is 16MHz, so use F_JTAG = 2MHz
+#
+# Since we may be running of an RC oscilator, we crank down the speed a
+# bit more to be on the safe side. Perhaps superstition, but if are
+# running off a crystal, we can run closer to the limit. Note
+# that there can be a pretty wide band where things are more or less stable.
+adapter_khz 2000
+
+adapter_nsrst_delay 100
+if {[using_jtag]} {
+ jtag_ntrst_delay 100
+}
+
+reset_config srst_nogate
+
+if {![using_hla]} {
+   # if srst is not fitted use SYSRESETREQ to
+   # perform a soft reset
+   cortex_m reset_config sysresetreq
+}
+
+$_TARGETNAME configure -event examine-end {
+	# Enable debug during low power modes (uses more power)
+	# DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
+	mmw 0xE0042004 0x00000007 0
+
+	# Stop watchdog counters during halt
+	# DBGMCU_APB1_FZ |= DBG_IWDG_STOP | DBG_WWDG_STOP
+	mmw 0xE0042008 0x00001800 0
+}
+
+$_TARGETNAME configure -event trace-config {
+	# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
+	# change this value accordingly to configure trace pins
+	# assignment
+	mmw 0xE0042004 0x00000020 0
+}
+
+$_TARGETNAME configure -event reset-init {
+	# Configure PLL to boost clock to HSI x 4 (64 MHz)
+	mww 0x40023804 0x08012008   ;# RCC_PLLCFGR 16 Mhz /8 (M) * 128 (N) /4(P)
+	mww 0x40023C00 0x00000102   ;# FLASH_ACR = PRFTBE | 2(Latency)
+	mmw 0x40023800 0x01000000 0 ;# RCC_CR |= PLLON
+	sleep 10                    ;# Wait for PLL to lock
+	mmw 0x40023808 0x00001000 0 ;# RCC_CFGR |= RCC_CFGR_PPRE1_DIV2
+	mmw 0x40023808 0x00000002 0 ;# RCC_CFGR |= RCC_CFGR_SW_PLL
+
+	# Boost JTAG frequency
+	adapter_khz 8000
+}
+
+$_TARGETNAME configure -event reset-start {
+	# Reduce speed since CPU speed will slow down to 16MHz with the reset
+	adapter_khz 2000
+}

misc/install/openocd_old_0.9.0/swj-dp.tcl

@@ -0,0 +1,34 @@
+# ARM Debug Interface V5 (ADI_V5) utility
+# ... Mostly for SWJ-DP (not SW-DP or JTAG-DP, since
+# SW-DP and JTAG-DP targets don't need to switch based
+# on which transport is active.
+#
+# declare a JTAG or SWD Debug Access Point (DAP)
+# based on the transport in use with this session.
+# You can't access JTAG ops when SWD is active, etc.
+
+# params are currently what "jtag newtap" uses
+# because OpenOCD internals are still strongly biased
+# to JTAG ....  but for SWD, "irlen" etc are ignored,
+# and the internals work differently
+
+# for now, ignore non-JTAG and non-SWD transports
+# (e.g. initial flash programming via SPI or UART)
+
+# split out "chip" and "tag" so we can someday handle
+# them more uniformly irlen too...)
+
+if [catch {transport select}] {
+  echo "Error: unable to select a session transport. Can't continue."
+  shutdown
+}
+
+proc swj_newdap {chip tag args} {
+ if [using_hla] {
+     eval hla newtap $chip $tag $args
+ } elseif [using_jtag] {
+     eval jtag newtap $chip $tag $args
+ } elseif [using_swd] {
+     eval swd newdap $chip $tag $args
+ }
+}