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a bit of AT32

This commit is contained in:
rusefillc 2023-07-04 23:40:08 -04:00
parent fa98b04909
commit 8b33fb79bb
1 changed files with 10 additions and 0 deletions
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10
firmware/hw_layer/ports/stm32/port_mpu_util.h
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@ -23,12 +23,22 @@
#define SCHEDULER_TIMER_DEVICE TIM5
#define SCHEDULER_TIMER_FREQ (US_TO_NT_MULTIPLIER * 1'000'000)
#ifdef AT32F4XX
/* TODO: Artery */
typedef enum {
BOR_Level_None = PWR_CR_PLS_LEV0, // 0x0C=12 Supply voltage ranges from 1.62 to 2.10 V
BOR_Level_1 = PWR_CR_PLS_LEV1, // 0x08 Supply voltage ranges from 2.10 to 2.40 V
BOR_Level_2 = PWR_CR_PLS_LEV3, // 0x04 Supply voltage ranges from 2.40 to 2.70 V
BOR_Level_3 = PWR_CR_PLS_LEV7 // 0x00 Supply voltage ranges from 2.70 to 3.60 V
} BOR_Level_t;
#else
typedef enum {
BOR_Level_None = OB_BOR_OFF, // 0x0C=12 Supply voltage ranges from 1.62 to 2.10 V
BOR_Level_1 = OB_BOR_LEVEL1, // 0x08 Supply voltage ranges from 2.10 to 2.40 V
BOR_Level_2 = OB_BOR_LEVEL2, // 0x04 Supply voltage ranges from 2.40 to 2.70 V
BOR_Level_3 = OB_BOR_LEVEL3 // 0x00 Supply voltage ranges from 2.70 to 3.60 V
} BOR_Level_t;
#endif
// we are lucky - all CAN pins use the same AF
#define EFI_CAN_RX_AF 9