Mc33972 update (#2599)
* MC33972: update -per-instance thread -enable pull-ups for enabled pins only * smart-gpio: mc33972: uses 8-bit spi frames 3 bytes are sent to make 24-bit frame
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8ba38a8a63
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@ -33,8 +33,6 @@
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#define DRIVER_NAME "mc33972"
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static bool drv_task_ready = false;
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typedef enum {
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MC33972_DISABLED = 0,
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MC33972_WAIT_INIT,
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@ -42,25 +40,35 @@ typedef enum {
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MC33972_FAILED
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} mc33972_drv_state;
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#define SP_BANK 0
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#define SG_BANK 1
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/* all commands and reply data are 24 bit */
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#define CMD(cmd, data) (((cmd) << 16) | ((data) << 0))
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#define CMD_STATUS CMD(0x00, 0x00)
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#define CMD_SETTINGS(mask) CMD(0x01, (mask))
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#define CMD_WAKEUPEN(i, mask) CMD((i) ? 0x03 : 0x02, (mask))
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#define CMD_METALLIC(i, mask) CMD((i) ? 0x05 : 0x04, (mask))
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#define CMD_ANALOG(cur, ch) CMD(0x06, (((curr) & 0x3) << 5) | (((d) & 0x1f) << 0))
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#define CMD_WETTING_TMR(i, mask) CMD((i) ? 0x08 : 0x07, (mask))
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#define CMD_TRI_STATE(i, mask) CMD((i) ? 0x0a : 0x09, (mask))
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#define CMD_WAKEUPEN(i, mask) CMD(0x02 + (i), (mask))
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#define CMD_METALLIC(i, mask) CMD(0x04 + (i), (mask))
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#define CMD_ANALOG(curr, ch) CMD(0x06, (((curr) & 0x3) << 5) | (((ch) & 0x1f) << 0))
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#define CMD_WETTING_TMR(i, mask) CMD(0x07 + (i), (mask))
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#define CMD_TRI_STATE(i, mask) CMD(0x09 + (i), (mask))
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#define CMD_CALIB CMD(0x0b, 0x00)
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#define CMD_SLEEP(int_t, scan_t) CMD(0x0c, (((int_t) & 0x7) << 3) | (((scan_t) & 0x7) << 0))
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#define CMD_RST CMD(0x7f, 0x00)
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/* all switch to battery or ground pins mask */
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#define SP_PINS_MASK 0x00ff
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#define SP_PINS_EXTRACT(pins) (((pins) >> 14) & SP_PINS_MASK)
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/* all switch-to-ground inputs mask */
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#define SG_PINS_MASK 0x3fff
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#define SG_PINS_EXTRACT(pins) (((pins) >> 0) & SG_PINS_MASK)
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/* reply is allways same 24 status bits */
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#define FLAG_THERM (1 << 23)
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#define FLAG_INT (1 << 22)
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/* from LSB to MSB: SG0..SG13, SP0..SP7 */
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#define FLAG_PIN(pin) (1 << (pin))
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#define PIN_MASK(pin) (BIT(pin))
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/*==========================================================================*/
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/* Driver exported variables. */
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@ -70,17 +78,21 @@ typedef enum {
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/* Driver local variables and types. */
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/*==========================================================================*/
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/* OS */
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SEMAPHORE_DECL(mc33972_wake, 10 /* or BOARD_MC33972_COUNT ? */);
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static THD_WORKING_AREA(mc33972_thread_1_wa, 256);
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/* Driver */
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struct mc33972_priv {
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const struct mc33972_config *cfg;
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/* thread stuff */
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thread_t *thread;
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THD_WORKING_AREA(thread_wa, 256);
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semaphore_t wake;
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/* last input state from chip */
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uint32_t i_state;
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/* currently selected analog input */
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uint8_t analog_ch;
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/* enabled inputs */
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uint32_t en_pins;
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mc33972_drv_state drv_state;
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};
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@ -155,6 +167,45 @@ static int mc33972_update_status(struct mc33972_priv *chip)
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return ret;
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}
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static int mc33972_update_pullups(struct mc33972_priv *chip)
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{
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int ret;
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/* enable tri-state for all unused pins */
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ret = mc33972_spi_w(chip, CMD_TRI_STATE(SP_BANK, SP_PINS_EXTRACT(~chip->en_pins)));
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if (ret)
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return ret;
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ret = mc33972_spi_w(chip, CMD_TRI_STATE(SG_BANK, SG_PINS_EXTRACT(~chip->en_pins)));
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return ret;
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}
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static int mc33972_comm_test(struct mc33972_priv *chip)
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{
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int ret;
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/* After an input has been selected as the analog,
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* the corresponding bit in the next SO data stream
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* will be logic [0] */
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/* go throught all inputs, read inputs status and
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* check that muxed input bit is zero */
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for (int i = 0; i < MC33972_INPUTS; i++) {
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/* indexed starting from 1 */
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ret = mc33972_spi_w(chip, CMD_ANALOG(0, i + 1));
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if (ret)
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return ret;
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ret = mc33972_update_status(chip);
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if (ret)
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return ret;
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if (chip->i_state & PIN_MASK(i))
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return -1;
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}
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return 0;
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}
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/**
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* @brief MC33972 chip init.
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* @details There is no way to check communication.
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@ -165,9 +216,10 @@ static int mc33972_chip_init(struct mc33972_priv *chip)
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{
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int ret;
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/* reset first */
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ret = mc33972_spi_w(chip, CMD_RST);
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if (ret)
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goto err;
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return ret;
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/* is it enought? */
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chThdSleepMilliseconds(3);
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@ -175,7 +227,7 @@ static int mc33972_chip_init(struct mc33972_priv *chip)
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/*
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* Default settings from Power-ON Reset via V PWR or the
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* Reset Command are as follows:
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* * Programmable switch – set to switch to battery
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* * Programmable switch - set to switch to battery
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* * All inputs set as wake-up
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* * Wetting current on (16 mA)
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* * Wetting current timer on (20 ms)
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@ -183,20 +235,25 @@ static int mc33972_chip_init(struct mc33972_priv *chip)
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* * Analog select 00000 (no input channel selected)
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*/
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/* disable tri-state */
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ret = mc33972_spi_w(chip, CMD_TRI_STATE(0, 0));
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ret |= mc33972_spi_w(chip, CMD_TRI_STATE(1, 0));
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/* check communication */
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ret = mc33972_comm_test(chip);
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if (ret)
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goto err;
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return ret;
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/* disable tri-state for used pins only */
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ret = mc33972_update_pullups(chip);
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if (ret)
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return ret;
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/* Set wetting current to 2 mA */
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ret = mc33972_spi_w(chip, CMD_METALLIC(0, 0));
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ret |= mc33972_spi_w(chip, CMD_METALLIC(1, 0));
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ret = mc33972_spi_w(chip, CMD_METALLIC(SP_BANK, 0));
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if (ret)
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goto err;
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err:
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return ret;
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ret = mc33972_spi_w(chip, CMD_METALLIC(SG_BANK, 0));
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if (ret)
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return ret;
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return 0;
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}
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/**
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@ -204,16 +261,23 @@ err:
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* @details Wake up driver. Will cause input and diagnostic
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* update
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*/
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/* todo: why is this unused? dead code? bug?
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static int mc33972_wake_driver(struct mc33972_priv *chip)
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{
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(void)chip;
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chSemSignal(&mc33972_wake);
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/* Entering a reentrant critical zone.*/
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syssts_t sts = chSysGetStatusAndLockX();
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chSemSignalI(&chip->wake);
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if (!port_is_isr_context()) {
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/**
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* chSemSignalI above requires rescheduling
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* interrupt handlers have implicit rescheduling
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*/
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chSchRescheduleS();
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}
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/* Leaving the critical zone.*/
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chSysRestoreStatusX(sts);
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return 0;
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}
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*/
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/*==========================================================================*/
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/* Driver thread. */
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@ -221,36 +285,44 @@ static int mc33972_wake_driver(struct mc33972_priv *chip)
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static THD_FUNCTION(mc33972_driver_thread, p)
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{
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int i;
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msg_t msg;
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(void)p;
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int ret;
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struct mc33972_priv *chip = p;
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chRegSetThreadName(DRIVER_NAME);
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/* repeat init until success */
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do {
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ret = mc33972_chip_init(chip);
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if (ret) {
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chThdSleepMilliseconds(1000);
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continue;
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}
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/* else */
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chip->drv_state = MC33972_READY;
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} while (chip->drv_state != MC33972_READY);
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while(1) {
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msg = chSemWaitTimeout(&mc33972_wake, TIME_MS2I(MC33972_POLL_INTERVAL_MS));
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msg_t msg = chSemWaitTimeout(&chip->wake, TIME_MS2I(MC33972_POLL_INTERVAL_MS));
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/* should we care about msg == MSG_TIMEOUT? */
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(void)msg;
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for (i = 0; i < BOARD_MC33972_COUNT; i++) {
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int ret;
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struct mc33972_priv *chip;
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chip = &chips[i];
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if ((chip->cfg == NULL) ||
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(chip->drv_state == MC33972_DISABLED) ||
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(chip->drv_state == MC33972_FAILED))
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continue;
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if (msg == MSG_TIMEOUT) {
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/* only input state update */
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ret = mc33972_update_status(chip);
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} else {
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/* someone waked thread and asks us to update pin config */
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/* inputs state is also readed */
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ret = mc33972_update_pullups(chip);
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}
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if (ret) {
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/* set state to MC33972_FAILED? */
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}
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}
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}
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}
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/*==========================================================================*/
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/* Driver interrupt handlers. */
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/* Driver exported functions. */
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/*==========================================================================*/
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static int mc33972_setPadMode(void *data, unsigned int pin, iomode_t mode) {
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struct mc33972_priv *chip;
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if ((pin >= MC33972_INPUTS) || (data == NULL))
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return -1;
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chip = (struct mc33972_priv *)data;
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/* currently driver doesn't know how to hanlde different modes */
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(void)mode;
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/* NOTE: currently this driver supports only input mode...
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* while chip can output by manipulating with pull-up and
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* pull-down modes....
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* if this function is called for pin, that means someone
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* wants to read this pin and we can enable pull-up
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* Also pull down is not supported yet */
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chip->en_pins |= PIN_MASK(pin);
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/* ask for reinit */
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mc33972_wake_driver(chip);
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return 0;
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}
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static int mc33972_readPad(void *data, unsigned int pin) {
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struct mc33972_priv *chip;
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@ -271,7 +368,7 @@ static int mc33972_readPad(void *data, unsigned int pin) {
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chip = (struct mc33972_priv *)data;
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/* convert to some common enum? */
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return !!(chip->i_state & FLAG_PIN(pin));
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return !!(chip->i_state & PIN_MASK(pin));
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}
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static brain_pin_diag_e mc33972_getDiag(void *data, unsigned int pin) {
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static int mc33972_init(void * data)
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{
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int ret;
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struct mc33972_priv *chip;
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chip = (struct mc33972_priv *)data;
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ret = mc33972_chip_init(chip);
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if (ret)
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return ret;
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/* no pins enabled yet */
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chip->en_pins = 0x0000;
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chip->drv_state = MC33972_READY;
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/* init semaphore */
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chSemObjectInit(&chip->wake, 0);
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if (!drv_task_ready) {
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chThdCreateStatic(mc33972_thread_1_wa, sizeof(mc33972_thread_1_wa),
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PRIO_GPIOCHIP, mc33972_driver_thread, NULL);
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drv_task_ready = true;
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}
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/* start thread */
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chip->thread = chThdCreateStatic(chip->thread_wa, sizeof(chip->thread_wa),
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PRIO_GPIOCHIP, mc33972_driver_thread, chip);
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return 0;
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}
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static int mc33972_deinit(void *data)
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{
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(void)data;
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struct mc33972_priv *chip;
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chip = (struct mc33972_priv *)data;
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/* TODO: disable pulls for all pins? */
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/* stop thread */
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chThdTerminate(chip->thread);
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/* TODO: set all pins to inactive state, stop task? */
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return 0;
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}
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struct gpiochip_ops mc33972_ops = {
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.setPadMode = mc33972_setPadMode,
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.writePad = NULL, /* chip input only */
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.readPad = mc33972_readPad,
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.getDiag = mc33972_getDiag,
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@ -86,7 +86,7 @@ struct mc33972_config mc33972 = {
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.ssport = NULL,
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.sspad = 0,
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.cr1 =
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SPI_CR1_24BIT_MODE |
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SPI_CR1_8BIT_MODE |
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SPI_CR1_SSM |
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SPI_CR1_SSI |
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/* SPI_CR1_LSBFIRST | */
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/* SPI_CR1_CPOL | */ /* = 0 */
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SPI_CR1_CPHA | /* = 1 */
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0,
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.cr2 = SPI_CR2_24BIT_MODE
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.cr2 = SPI_CR2_8BIT_MODE
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},
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};
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#endif /* (BOARD_MC33972_COUNT > 0) */
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