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This commit is contained in:
rusEfi 2015-01-12 08:03:51 -06:00
parent 45901c919e
commit aaf64814ef
5 changed files with 9988 additions and 2 deletions
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5470
hardware/brain_board_176-pin/176-pin_board.kicad_pcb Normal file
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1618
hardware/brain_board_176-pin/176-pin_board.net Normal file
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68
hardware/brain_board_176-pin/176-pin_board.pro Normal file
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@ -0,0 +1,68 @@
update=1/11/2015 12:15:25 PM
version=1
last_client=pcbnew
[general]
version=1
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[eeschema]
version=1
LibDir=../rusefi_lib
NetFmtName=
RptD_X=0
RptD_Y=100
RptLab=1
LabSize=60
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=conn
LibName4=linear
LibName5=special
LibName6=stm32
LibName7=logo_flipped
LibName8=art-electro-conn
LibName9=art-electro-conn_2
LibName10=art-electro-ic
LibName11=STM32F407IGT6
LibName12=art-electro-power
LibName13=art-electro-max
[pcbnew]
version=1
LastNetListRead=176-pin_STM32F407IGT6_board.net
UseCmpFile=0
PadDrill=0.000000000000
PadDrillOvalY=0.000000000000
PadSizeH=1.300000000000
PadSizeV=1.900000000000
PcbTextSizeV=1.000000000000
PcbTextSizeH=1.000000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.150000000000
ModuleOutlineThickness=0.150000000000
[pcbnew/libraries]
LibDir=../rusefi_lib
LibName1=sockets
LibName2=connect
LibName3=discret
LibName4=pin_array
LibName5=divers
LibName6=smd_capacitors
LibName7=smd_resistors
LibName8=smd_crystal&oscillator
LibName9=smd_transistors
LibName10=libcms
LibName11=logo_flipped
LibName12=art-electro-conn
LibName13=art-electro-conn_2
LibName14=art-electro-power
LibName15=LQFP-176

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hardware/brain_board_176-pin/176-pin_board.sch Normal file
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5
hardware/frankenso/known_issues.txt
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@ -53,8 +53,9 @@
52) RESOLVED IN R0.4 Add header for CAN bus with 5V and GND. see P401
53) verify D9 is the same BOM item as discovery board.
54) RESOLVED IN R0.4 Add 5V and GND vias to proto area
55) knock1 is actually knock2 and vice versa. Need to fix net names & the pinout picture
56) route unused stm32 pins (D3 PC13 etc) to unused connector pins
55) Add Top, T-1, T-2 and T-3 to PCB copper layers to more clearly identify layers to MFG
56) knock1 is actually knock2 and vice versa. Need to fix net names & the pinout picture
57) route unused stm32 pins (D3 PC13 etc) to unused connector pins
For honda add-on / rewiring board