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TLE8888 watchdog #917 

first steps
This commit is contained in:
rusefi 2020-02-10 11:11:00 -05:00
parent cb8612a15c
commit b3bc3325b9
2 changed files with 19 additions and 0 deletions
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13
firmware/hw_layer/drivers/gpio/tle8888.c
View File

@ -73,6 +73,8 @@ typedef enum {
#define CMD_WR(a, d) (CMD_WRITE | CMD_REG_ADDR(a) | CMD_REG_DATA(d)) #define CMD_WR(a, d) (CMD_WRITE | CMD_REG_ADDR(a) | CMD_REG_DATA(d))
#define CMD_R(a) (CMD_READ | CMD_REG_ADDR(a)) #define CMD_R(a) (CMD_READ | CMD_REG_ADDR(a))
#define CMD_WWDServiceCmd CMD_WR(0x15, 0x00)
#define CMD_SR CMD_WR(0x1a, 0x03) #define CMD_SR CMD_WR(0x1a, 0x03)
// 0x238 = 568 // 0x238 = 568
#define CMD_OE_SET CMD_WR(0x1c, 0x02) #define CMD_OE_SET CMD_WR(0x1c, 0x02)
@ -86,6 +88,8 @@ typedef enum {
#define CMD_OPSTAT0 CMD_R(0x34) #define CMD_OPSTAT0 CMD_R(0x34)
#define CMD_OPSTAT1 CMD_R(0x35) #define CMD_OPSTAT1 CMD_R(0x35)
#define CMD_FWDStat1 CMD_R(0x35)
//#define CMD_VRSCONFIG0(d) CMD_WR(0x49, d) //#define CMD_VRSCONFIG0(d) CMD_WR(0x49, d)
#define CMD_VRSCONFIG1(d) CMD_WR(0x4a, d) #define CMD_VRSCONFIG1(d) CMD_WR(0x4a, d)
#define CMD_INCONFIG(n, d) CMD_WR(0x53 + (n & 0x03), d) #define CMD_INCONFIG(n, d) CMD_WR(0x53 + (n & 0x03), d)
@ -105,6 +109,7 @@ SEMAPHORE_DECL(tle8888_wake, 10 /* or BOARD_TLE8888_COUNT ? */);
static THD_WORKING_AREA(tle8888_thread_1_wa, 256); static THD_WORKING_AREA(tle8888_thread_1_wa, 256);
static bool needInitialSpi = true; static bool needInitialSpi = true;
int resetCounter = 0;
float vBattForTle8888 = 14; float vBattForTle8888 = 14;
// set debug_mode 31 // set debug_mode 31
@ -156,6 +161,9 @@ void tle8888PostState(TsDebugChannels *debugChannels) {
debugChannels->debugIntField5 = tle8888reinitializationCounter; debugChannels->debugIntField5 = tle8888reinitializationCounter;
debugChannels->debugFloatField1 = initResponse0; debugChannels->debugFloatField1 = initResponse0;
debugChannels->debugFloatField2 = initResponse1; debugChannels->debugFloatField2 = initResponse1;
debugChannels->debugFloatField3 = chips[0].OpStat[1];
debugChannels->debugFloatField4 = resetCounter;
} }
#endif /* EFI_TUNER_STUDIO */ #endif /* EFI_TUNER_STUDIO */
@ -169,6 +177,9 @@ static SPIDriver *get_bus(struct tle8888_priv *chip)
return chip->cfg->spi_bus; return chip->cfg->spi_bus;
} }
/**
* @return always return 0 for now
*/
static int tle8888_spi_rw(struct tle8888_priv *chip, uint16_t tx, uint16_t *rx) static int tle8888_spi_rw(struct tle8888_priv *chip, uint16_t tx, uint16_t *rx)
{ {
SPIDriver *spi = get_bus(chip); SPIDriver *spi = get_bus(chip);
@ -260,6 +271,7 @@ static int tle8888_update_status(struct tle8888_priv *chip)
if (ret) if (ret)
return ret; return ret;
// available in debugFloatField3
chip->OpStat[1] = rx; chip->OpStat[1] = rx;
/* TODO: unlock? */ /* TODO: unlock? */
@ -380,6 +392,7 @@ static THD_FUNCTION(tle8888_driver_thread, p) {
/* if bit OE is cleared - reset happened */ /* if bit OE is cleared - reset happened */
if (!(chip->OpStat[1] & (1 << 6))) { if (!(chip->OpStat[1] & (1 << 6))) {
needInitialSpi = true; needInitialSpi = true;
resetCounter++;
} }
} }
} }

6
firmware/hw_layer/drivers/gpio/tle8888.h
View File

@ -19,6 +19,12 @@
* 4 INJ channels - OUT1..4 - IN5..8 */ * 4 INJ channels - OUT1..4 - IN5..8 */
#define TLE8888_DIRECT_OUTPUTS (4 + 4 + TLE8888_DIRECT_MISC) #define TLE8888_DIRECT_OUTPUTS (4 + 4 + TLE8888_DIRECT_MISC)
// we can change this value on TLE8888QK but we probably do not have a reason to change
#define Window_watchdog_close_window_time_ms 100.8
// unchangeable value for TLE8888QK
#define Window_watchdog_open_window_time_ms 12.8
/* DOTO: add irq support */ /* DOTO: add irq support */
#define TLE8888_POLL_INTERVAL_MS 100 #define TLE8888_POLL_INTERVAL_MS 100