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testing stm32 stop/standby (#3666) 

* testing stop/standby

* comments

* guard

* s

* we shall figure out f7 later

* ok maybe we do worry about f7

* comments and tweaks

* f7

* f4 maybe probably
This commit is contained in:
Matthew Kennedy 2021-12-07 12:12:33 -08:00 committed by GitHub
parent e58ff36e70
commit c0b37d78e4
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4 changed files with 86 additions and 0 deletions
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5
firmware/hw_layer/ports/stm32/port_mpu_util.h
View File

@ -63,3 +63,8 @@ typedef enum {
#ifndef ADC_CR2_SWSTART
#define ADC_CR2_SWSTART ((uint32_t)0x40000000)
#endif
#ifdef __cplusplus
void stm32_stop();
void stm32_standby();
#endif

37
firmware/hw_layer/ports/stm32/stm32f4/mpu_util.cpp
View File

@ -30,3 +30,40 @@ uintptr_t getFlashAddrFirstCopy() {
uintptr_t getFlashAddrSecondCopy() {
return 0x080C0000;
}
void stm32_stop() {
SysTick->CTRL = 0;
__disable_irq();
RCC->AHB1RSTR = RCC_AHB1RSTR_GPIOERST;
// configure mode bits
PWR->CR &= ~PWR_CR_PDDS; // cleared PDDS means stop mode (not standby)
PWR->CR |= PWR_CR_FPDS; // turn off flash in stop mode
PWR->CR |= PWR_CR_LPDS; // regulator in low power mode
// enable Deepsleep mode
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
// Wait for event - this will return when stop mode is done
__WFE();
// Lastly, reboot
NVIC_SystemReset();
}
void stm32_standby() {
SysTick->CTRL = 0;
__disable_irq();
// configure mode bits
PWR->CR |= PWR_CR_PDDS; // PDDS = use standby mode (not stop mode)
// enable Deepsleep mode
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
// Wait for event - this should never return as it kills the chip until a reset
__WFE();
// Lastly, reboot
NVIC_SystemReset();
}

39
firmware/hw_layer/ports/stm32/stm32f7/mpu_util.cpp
View File

@ -174,3 +174,42 @@ void sys_dual_bank(void) {
*/
}
void stm32_stop() {
SysTick->CTRL = 0;
__disable_irq();
RCC->AHB1RSTR = RCC_AHB1RSTR_GPIOERST;
// configure mode bits
PWR->CR1 &= ~PWR_CR1_PDDS; // cleared PDDS means stop mode (not standby)
PWR->CR1 |= PWR_CR1_FPDS; // turn off flash in stop mode
PWR->CR1 |= PWR_CR1_UDEN; // regulator underdrive in stop mode
PWR->CR1 |= PWR_CR1_LPUDS; // low power regulator in under drive mode
PWR->CR1 |= PWR_CR1_LPDS; // regulator in low power mode
// enable Deepsleep mode
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
__WFE();
// Lastly, reboot
NVIC_SystemReset();
}
void stm32_standby() {
SysTick->CTRL = 0;
__disable_irq();
RCC->AHB1RSTR = RCC_AHB1RSTR_GPIOERST;
// configure mode bits
PWR->CR1 |= PWR_CR1_PDDS; // PDDS = use standby mode (not stop mode)
// enable Deepsleep mode
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
// Wait for event - this should never return as it kills the chip until a reset
__WFE();
// Lastly, reboot
NVIC_SystemReset();
}

5
firmware/rusefi.cpp
View File

@ -176,6 +176,11 @@ void runRusEfi() {
addConsoleAction("dual_bank", sys_dual_bank);
#endif
#if defined(STM32F4) || defined(STM32F7)
addConsoleAction("stm32_stop", stm32_stop);
addConsoleAction("stm32_standby", stm32_standby);
#endif
addConsoleAction(CMD_REBOOT, scheduleReboot);
addConsoleAction(CMD_REBOOT_DFU, jump_to_bootloader);