Fix UART rx floats (#7038)

* io serial: enable internal pull-up for EFI_CONSOLE_RX_BRAIN_PIN

* io serial: enable internal pull up for binarySerialRxPin
This commit is contained in:
Andrey G 2024-11-04 16:05:54 +03:00 committed by GitHub
parent d99f5f0f6d
commit ccbf45808a
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GPG Key ID: B5690EEEBB952194
2 changed files with 38 additions and 4 deletions

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@ -479,12 +479,29 @@
#define EFI_CONSOLE_AF 7
#endif
// Rx pin should have either internal either external pull up to avoid floating and receiving random garbage
#ifndef EFI_CONSOLE_RX_BRAIN_PIN_MODE
#define EFI_CONSOLE_RX_BRAIN_PIN_MODE (PAL_MODE_ALTERNATE(EFI_CONSOLE_AF) | PAL_STM32_PUPDR_PULLUP)
#endif
#ifndef EFI_CONSOLE_TX_BRAIN_PIN_MODE
#define EFI_CONSOLE_TX_BRAIN_PIN_MODE (PAL_MODE_ALTERNATE(EFI_CONSOLE_AF))
#endif
// todo: this should be detected automatically based on pin selection
// https://github.com/rusefi/rusefi/issues/3536
#ifndef TS_SERIAL_AF
#define TS_SERIAL_AF 7
#endif
#ifndef TS_SERIAL_RX_BRAIN_PIN_MODE
#define TS_SERIAL_RX_BRAIN_PIN_MODE (PAL_MODE_ALTERNATE(TS_SERIAL_AF) | PAL_STM32_PUPDR_PULLUP)
#endif
#ifndef TS_SERIAL_TX_BRAIN_PIN_MODE
#define TS_SERIAL_TX_BRAIN_PIN_MODE (PAL_MODE_ALTERNATE(TS_SERIAL_AF))
#endif
#ifndef LED_CRITICAL_ERROR_BRAIN_PIN
#define LED_CRITICAL_ERROR_BRAIN_PIN Gpio::D14
#endif

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@ -16,6 +16,14 @@
#ifdef TS_PRIMARY_UxART_PORT
#ifndef EFI_CONSOLE_RX_BRAIN_PIN_MODE
#define EFI_CONSOLE_RX_BRAIN_PIN_MODE (PAL_MODE_ALTERNATE(EFI_CONSOLE_AF))
#endif
#ifndef EFI_CONSOLE_TX_BRAIN_PIN_MODE
#define EFI_CONSOLE_TX_BRAIN_PIN_MODE (PAL_MODE_ALTERNATE(EFI_CONSOLE_AF))
#endif
#if EFI_TS_PRIMARY_IS_SERIAL
SerialTsChannel
#elif EFI_USE_UART_DMA
@ -32,8 +40,8 @@
#if EFI_PROD_CODE
// historically the idea was that primary UART has to be very hard-coded as the last line of reliability defense
// as of 2022 it looks like sometimes we just need the GPIO on MRE for instance more than we need UART
efiSetPadMode("Primary UART RX", EFI_CONSOLE_RX_BRAIN_PIN, PAL_MODE_ALTERNATE(EFI_CONSOLE_AF));
efiSetPadMode("Primary UART TX", EFI_CONSOLE_TX_BRAIN_PIN, PAL_MODE_ALTERNATE(EFI_CONSOLE_AF));
efiSetPadMode("Primary UART RX", EFI_CONSOLE_RX_BRAIN_PIN, EFI_CONSOLE_RX_BRAIN_PIN_MODE);
efiSetPadMode("Primary UART TX", EFI_CONSOLE_TX_BRAIN_PIN, EFI_CONSOLE_TX_BRAIN_PIN_MODE);
#endif /* EFI_PROD_CODE */
primaryChannel.start(engineConfiguration->uartConsoleSerialSpeed);
@ -46,6 +54,15 @@
#endif // defined(TS_PRIMARY_UxART_PORT)
#ifdef TS_SECONDARY_UxART_PORT
#ifndef TS_SERIAL_RX_BRAIN_PIN_MODE
#define TS_SERIAL_RX_BRAIN_PIN_MODE (PAL_MODE_ALTERNATE(TS_SERIAL_AF))
#endif
#ifndef TS_SERIAL_TX_BRAIN_PIN_MODE
#define TS_SERIAL_TX_BRAIN_PIN_MODE (PAL_MODE_ALTERNATE(TS_SERIAL_AF))
#endif
#if EFI_TS_SECONDARY_IS_SERIAL
SerialTsChannel
#elif EFI_USE_UART_DMA
@ -60,8 +77,8 @@
TsChannelBase* setupChannel() {
#if EFI_PROD_CODE
efiSetPadMode("Secondary UART RX", engineConfiguration->binarySerialRxPin, PAL_MODE_ALTERNATE(TS_SERIAL_AF));
efiSetPadMode("Secondary UART TX", engineConfiguration->binarySerialTxPin, PAL_MODE_ALTERNATE(TS_SERIAL_AF));
efiSetPadMode("Secondary UART RX", engineConfiguration->binarySerialRxPin, TS_SERIAL_RX_BRAIN_PIN_MODE);
efiSetPadMode("Secondary UART TX", engineConfiguration->binarySerialTxPin, TS_SERIAL_TX_BRAIN_PIN_MODE);
#endif /* EFI_PROD_CODE */
secondaryChannel.start(engineConfiguration->tunerStudioSerialSpeed);