Openblt usb for F7 (#5365)
* OpenBLT: enable USB for F7 * OpenBLT: simple flash over USB script
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@ -113,7 +113,7 @@ static void SystemClock_Config(void)
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RCC_OscInitStruct.PLL.PLLM = 25;
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RCC_OscInitStruct.PLL.PLLN = 432;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
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RCC_OscInitStruct.PLL.PLLQ = 2;
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RCC_OscInitStruct.PLL.PLLQ = 9; //48 MHz for USB
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
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{
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/* Clock configuration incorrect or hardware failure. Hang the system to prevent
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@ -176,6 +176,10 @@ void HAL_MspInit(void)
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/* CAN clock enable. */
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__HAL_RCC_CAN1_CLK_ENABLE();
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#endif
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#if (BOOT_COM_USB_ENABLE > 0)
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/* USB clock enable. */
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__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
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#endif
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/* Configure GPIO pin for the Red LED. */
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GPIO_InitStruct.Pin = STATUS_LED_PIN;
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@ -217,7 +221,15 @@ void HAL_MspInit(void)
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GPIO_InitStruct.Alternate = GPIO_AF9_CAN1;
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HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
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#endif
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#if (BOOT_COM_USB_ENABLE > 0)
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/* USB pin configuration. */
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GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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#endif
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} /*** end of HAL_MspInit ***/
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@ -240,6 +252,14 @@ void HAL_MspDeInit(void)
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HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7);
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HAL_GPIO_DeInit(GPIOC, GPIO_PIN_13);
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#if (BOOT_COM_USB_ENABLE > 0)
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/* Deinit used GPIOs. */
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HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11);
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HAL_GPIO_DeInit(GPIOA, GPIO_PIN_12);
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/* USB clock enable. */
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__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
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#endif
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#if (BOOT_COM_CAN_ENABLE > 0)
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/* Deinit used GPIOs. */
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HAL_GPIO_DeInit(GPIOD, GPIO_PIN_0);
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@ -22,4 +22,6 @@ BRDFLAGS += -DBOOT_CPU_XTAL_SPEED_KHZ=25000
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BRDFLAGS += -DBOOT_CPU_SYSTEM_SPEED_KHZ=216000
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BRDFLAGS += -DBOOT_COM_RS232_CHANNEL_INDEX=0
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# \brief Select the desired CAN peripheral as a zero based index.
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BRDFLAGS += -DBOOT_COM_CAN_CHANNEL_INDEX=0
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BRDFLAGS += -DBOOT_COM_CAN_CHANNEL_INDEX=0
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# USB support
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BRDFLAGS += -DBBOOT_COM_USB_ENABLE=1
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@ -0,0 +1,15 @@
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#!/bin/bash
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# This script will try to flash/update RusEFI part of firmware over USB interface.
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echo This script may need root privileges for accessing USB device or special udev rules (TODO)
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BootCommander -t=xcp_usb deliver/rusefi_update.srec
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# OR
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# You can build it from sources with:
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# (cd ext/openblt/Host/Source/LibOpenBLT/ ; mkdir build ; cd build ; cmake .. ; make -j )
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# and
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# (cd ext/openblt/Host/Source/BootCommander/ ; mkdir build ; cd build ; cmake .. ; make -j )
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# And run:
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# ext/openblt/Host/BootCommander -t=xcp_usb deliver/rusefi_update.srec
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@ -53,6 +53,19 @@
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/****************************************************************************************
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* C O M M U N I C A T I O N I N T E R F A C E C O N F I G U R A T I O N
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****************************************************************************************/
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/* The USB communication interface is selected by setting the BOOT_COM_USB_ENABLE
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* configurable to 1. The maximum amount of data bytes in a message for data transmission
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* and reception is set through BOOT_COM_USB_TX_MAX_DATA and BOOT_COM_USB_RX_MAX_DATA,
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* respectively.
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*
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*/
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/** \brief Enable/disable USB transport layer. */
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#define BOOT_COM_USB_ENABLE (1)
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/** \brief Configure number of bytes in the target->host data packet. */
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#define BOOT_COM_USB_TX_MAX_DATA (63)
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/** \brief Configure number of bytes in the host->target data packet. */
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#define BOOT_COM_USB_RX_MAX_DATA (63)
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/* The CAN communication interface is selected by setting the BOOT_COM_CAN_ENABLE
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* configurable to 1. Configurable BOOT_COM_CAN_BAUDRATE selects the communication speed
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* in bits/second. Two CAN messages are reserved for communication with the host. The
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@ -85,18 +85,16 @@ PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/led.h
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PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/shared_params.c
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PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/shared_params.h
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ifeq ($(PROJECT_CPU),ARCH_STM32F4)
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# USB support
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PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/usbd_desc.c
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PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/usbd_desc.h
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PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/usbd_conf.c
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PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/usbd_conf.h
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PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/usbd_bulk.c
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PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/usbd_bulk.h
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# Common USB lib
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PROJ_FILES += $(wildcard $(PROJECT_DIR)/ext/openblt/Target/Demo/ARMCM4_STM32F4_Nucleo_F429ZI_GCC/Boot/lib/STM32_USB_Device_Library/Core/Src/*.c)
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PROJ_FILES += $(wildcard $(PROJECT_DIR)/ext/openblt/Target/Demo/ARMCM4_STM32F4_Nucleo_F429ZI_GCC/Boot/lib/STM32_USB_Device_Library/Core/Inc/*.h)
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endif
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# USB support
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PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/usbd_desc.c
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PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/usbd_desc.h
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PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/usbd_conf.c
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PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/usbd_conf.h
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PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/usbd_bulk.c
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PROJ_FILES += $(PROJECT_DIR)/hw_layer/openblt/usbd_bulk.h
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# Common USB lib
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PROJ_FILES += $(wildcard $(PROJECT_DIR)/ext/openblt/Target/Demo/ARMCM4_STM32F4_Nucleo_F429ZI_GCC/Boot/lib/STM32_USB_Device_Library/Core/Src/*.c)
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PROJ_FILES += $(wildcard $(PROJECT_DIR)/ext/openblt/Target/Demo/ARMCM4_STM32F4_Nucleo_F429ZI_GCC/Boot/lib/STM32_USB_Device_Library/Core/Inc/*.h)
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# CPU-dependent sources
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ifeq ($(PROJECT_CPU),ARCH_STM32F4)
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@ -20,8 +20,18 @@
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx.h"
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#ifdef STM32F429xx
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#include "stm32f4xx.h" /* STM32 CPU and HAL header */
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#include "stm32f4xx_hal.h"
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#endif
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#ifdef STM32F767xx
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#include "stm32f7xx.h" /* STM32 CPU and HAL header */
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#include "stm32f7xx_hal.h"
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#endif
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#ifdef STM32H743xx
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#include "stm32h7xx.h" /* STM32 CPU and HAL header */
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#include "stm32h7xx_hal.h"
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#endif
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#include "usbd_def.h"
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#include "usbd_core.h"
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#include "usbd_bulk.h"
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@ -31,8 +31,15 @@
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "stm32f4xx.h"
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#include "stm32f4xx_hal.h"
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#ifdef STM32F429xx
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#include "stm32f4xx.h" /* STM32 CPU and HAL header */
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#endif
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#ifdef STM32F767xx
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#include "stm32f7xx.h" /* STM32 CPU and HAL header */
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#endif
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#ifdef STM32H743xx
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#include "stm32h7xx.h" /* STM32 CPU and HAL header */
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#endif
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/* USER CODE BEGIN INCLUDE */
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@ -82,7 +82,7 @@
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/* #define HAL_IRDA_MODULE_ENABLED */
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/* #define HAL_SMARTCARD_MODULE_ENABLED */
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/* #define HAL_WWDG_MODULE_ENABLED */
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/* #define HAL_PCD_MODULE_ENABLED */
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#define HAL_PCD_MODULE_ENABLED
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/* #define HAL_HCD_MODULE_ENABLED */
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/* #define HAL_DFSDM_MODULE_ENABLED */
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/* #define HAL_DSI_MODULE_ENABLED */
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@ -5,11 +5,10 @@
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# exclude flash-layout.c as this one is directly included in a source file, when used.
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PROJ_FILES += $(filter-out $(OPENBLT_PORT_DIR)/flash_layout.c, $(call rwildcard, $(OPENBLT_PORT_DIR), *.c *.h *.s))
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# reuse ST32F7xx HAL and CMSIS from one of OpenBLT examples to avoid having copy in rusEFI git
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PROJ_FILES += $(filter-out uip, $(call rwildcard, $(OPENBLT_TRGT_DIR)/Demo/ARMCM7_STM32F7_Nucleo_F767ZI_GCC/Boot/lib/CMSIS/, *.c *.h *.s))
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PROJ_FILES += $(filter-out uip, $(call rwildcard, $(OPENBLT_TRGT_DIR)/Demo/ARMCM7_STM32F7_Nucleo_F767ZI_GCC/Boot/lib/STM32F7xx_HAL_Driver/, *.c *.h *.s))
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PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Demo/ARMCM7_STM32F7_Nucleo_F746ZG_GCC/Boot/lib/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_can.c)
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PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Demo/ARMCM7_STM32F7_Nucleo_F746ZG_GCC/Boot/lib/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_can.h)
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PROJ_FILES += $(filter-out uip, $(call rwildcard, $(OPENBLT_TRGT_DIR)/Demo/ARMCM7_STM32F7_Nucleo_F746ZG_GCC/Boot/lib/CMSIS/, *.c *.h *.s))
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PROJ_FILES += $(filter-out uip, $(call rwildcard, $(OPENBLT_TRGT_DIR)/Demo/ARMCM7_STM32F7_Nucleo_F746ZG_GCC/Boot/lib/STM32F7xx_HAL_Driver/, *.c *.h *.s))
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# stm32f767xx.h
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PROJ_FILES += $(wildcard $(OPENBLT_TRGT_DIR)/Demo/ARMCM7_STM32F7_Nucleo_F767ZI_GCC/Boot/lib/CMSIS/Device/ST/STM32F7xx/Include/*.h)
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#|--------------------------------------------------------------------------------------|
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#| Specific options for toolchain binaries |
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#|--------------------------------------------------------------------------------------|
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