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H 9960 2920 60 0000 R CNN +F 1 "MOSFET_N" H 10550 2600 60 0000 R CNN +F 2 "" H 9950 2750 60 0000 C CNN +F 3 "" H 9950 2750 60 0000 C CNN + 1 9950 2750 + 1 0 0 -1 +$EndComp +Text HLabel 10300 2500 2 60 Output ~ 0 +In5 +Text HLabel 9550 3550 0 60 UnSpc ~ 0 +Gnd +Wire Wire Line + 10050 2950 10050 3550 +Wire Wire Line + 10050 3550 9550 3550 +Wire Wire Line + 9600 3450 9600 3550 +Connection ~ 9600 3550 +Wire Wire Line + 9600 2550 9600 2950 +Text HLabel 9550 1850 0 60 UnSpc ~ 0 +Ex_p +Wire Wire Line + 9550 1850 9600 1850 +Wire Wire Line + 9600 1850 9600 2050 +Wire Wire Line + 10300 2500 10050 2500 +Wire Wire Line + 10050 2450 10050 2550 +Wire Wire Line + 9250 2750 9750 2750 +Connection ~ 9600 2750 +$Comp +L MOSFET_N Q? +U 1 1 5337426E +P 9950 4650 +F 0 "Q?" H 9960 4820 60 0000 R CNN +F 1 "MOSFET_N" H 10550 4500 60 0000 R CNN +F 2 "" H 9950 4650 60 0000 C CNN +F 3 "" H 9950 4650 60 0000 C CNN + 1 9950 4650 + 1 0 0 -1 +$EndComp +Text HLabel 10300 4400 2 60 Output ~ 0 +In10 +Text HLabel 9550 5450 0 60 UnSpc ~ 0 +Gnd +Wire Wire Line + 10050 4850 10050 5450 +Wire Wire Line + 10050 5450 9550 5450 +Wire Wire Line + 9600 5350 9600 5450 +Connection ~ 9600 5450 +Wire Wire Line + 9600 4450 9600 4850 +Text HLabel 9550 3750 0 60 UnSpc ~ 0 +Ex_p +Wire Wire Line + 9550 3750 9600 3750 +Wire Wire Line + 9600 3750 9600 3950 +Wire Wire Line + 10300 4400 10050 4400 +Wire Wire Line + 10050 4350 10050 4450 +Wire Wire Line + 9250 4650 9750 4650 +Connection ~ 9600 4650 +Text HLabel 10100 3750 2 60 UnSpc ~ 0 +3.3V +Wire Wire Line + 10100 3750 10050 3750 +Wire Wire Line + 10050 3750 10050 3850 +Text HLabel 3700 1850 2 60 UnSpc ~ 0 +3.3V +Wire Wire Line + 3700 1850 3650 1850 +Wire Wire Line + 3650 1850 3650 1950 +Text HLabel 5300 1850 2 60 UnSpc ~ 0 +3.3V +Wire Wire Line + 5300 1850 5250 1850 +Wire Wire Line + 5250 1850 5250 1950 +Text HLabel 6900 1850 2 60 UnSpc ~ 0 +3.3V +Wire Wire Line + 6900 1850 6850 1850 +Wire Wire Line + 6850 1850 6850 1950 +Text HLabel 8500 1850 2 60 UnSpc ~ 0 +3.3V +Wire Wire Line + 8500 1850 8450 1850 +Wire Wire Line + 8450 1850 8450 1950 +Text HLabel 10100 1850 2 60 UnSpc ~ 0 +3.3V +Wire Wire Line + 10100 1850 10050 1850 +Wire Wire Line + 10050 1850 10050 1950 +Text HLabel 3700 3750 2 60 UnSpc ~ 0 +3.3V +Wire Wire Line + 3700 3750 3650 3750 +Wire Wire Line + 3650 3750 3650 3850 +Text HLabel 5300 3750 2 60 UnSpc ~ 0 +3.3V +Wire Wire Line + 5300 3750 5250 3750 +Wire Wire Line + 5250 3750 5250 3850 +Text HLabel 6900 3750 2 60 UnSpc ~ 0 +3.3V +Wire Wire Line + 6900 3750 6850 3750 +Wire Wire Line + 6850 3750 6850 3850 +Text HLabel 8500 3750 2 60 UnSpc ~ 0 +3.3V +Wire Wire Line + 8500 3750 8450 3750 +Wire Wire Line + 8450 3750 8450 3850 +Connection ~ 3650 4400 +Connection ~ 5250 4400 +Connection ~ 6850 4400 +Connection ~ 8450 4400 +Connection ~ 10050 4400 +Connection ~ 3650 2500 +Connection ~ 5250 2500 +Connection ~ 8450 2500 +Connection ~ 10050 2500 +Connection ~ 6850 2500 +$Comp +L R R? +U 1 1 5338461F +P 3650 2200 +F 0 "R?" V 3730 2200 40 0000 C CNN +F 1 "10k" V 3657 2201 40 0000 C CNN +F 2 "" V 3580 2200 30 0000 C CNN +F 3 "" H 3650 2200 30 0000 C CNN + 1 3650 2200 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 5338462A +P 3200 3200 +F 0 "R?" V 3280 3200 40 0000 C CNN +F 1 "10k" V 3207 3201 40 0000 C CNN +F 2 "" V 3130 3200 30 0000 C CNN +F 3 "" H 3200 3200 30 0000 C CNN + 1 3200 3200 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 53384635 +P 4800 2300 +F 0 "R?" V 4880 2300 40 0000 C CNN +F 1 "10k" V 4807 2301 40 0000 C CNN +F 2 "" V 4730 2300 30 0000 C CNN +F 3 "" H 4800 2300 30 0000 C CNN + 1 4800 2300 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 53384640 +P 5250 2200 +F 0 "R?" V 5330 2200 40 0000 C CNN +F 1 "10k" V 5257 2201 40 0000 C CNN +F 2 "" V 5180 2200 30 0000 C CNN +F 3 "" H 5250 2200 30 0000 C CNN + 1 5250 2200 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 5338464B +P 4800 3200 +F 0 "R?" V 4880 3200 40 0000 C CNN +F 1 "10k" V 4807 3201 40 0000 C CNN +F 2 "" V 4730 3200 30 0000 C CNN +F 3 "" H 4800 3200 30 0000 C CNN + 1 4800 3200 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 53384656 +P 6400 2300 +F 0 "R?" V 6480 2300 40 0000 C CNN +F 1 "10k" V 6407 2301 40 0000 C CNN +F 2 "" V 6330 2300 30 0000 C CNN +F 3 "" H 6400 2300 30 0000 C CNN + 1 6400 2300 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 53384661 +P 6850 2200 +F 0 "R?" V 6930 2200 40 0000 C CNN +F 1 "10k" V 6857 2201 40 0000 C CNN +F 2 "" V 6780 2200 30 0000 C CNN +F 3 "" H 6850 2200 30 0000 C CNN + 1 6850 2200 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 5338466C +P 6400 3200 +F 0 "R?" V 6480 3200 40 0000 C CNN +F 1 "10k" V 6407 3201 40 0000 C CNN +F 2 "" V 6330 3200 30 0000 C CNN +F 3 "" H 6400 3200 30 0000 C CNN + 1 6400 3200 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 53384677 +P 8000 2300 +F 0 "R?" V 8080 2300 40 0000 C CNN +F 1 "10k" V 8007 2301 40 0000 C CNN +F 2 "" V 7930 2300 30 0000 C CNN +F 3 "" H 8000 2300 30 0000 C CNN + 1 8000 2300 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 53384682 +P 8450 2200 +F 0 "R?" V 8530 2200 40 0000 C CNN +F 1 "10k" V 8457 2201 40 0000 C CNN +F 2 "" V 8380 2200 30 0000 C CNN +F 3 "" H 8450 2200 30 0000 C CNN + 1 8450 2200 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 5338468D +P 8000 3200 +F 0 "R?" V 8080 3200 40 0000 C CNN +F 1 "10k" V 8007 3201 40 0000 C CNN +F 2 "" V 7930 3200 30 0000 C CNN +F 3 "" H 8000 3200 30 0000 C CNN + 1 8000 3200 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 53384698 +P 9600 2300 +F 0 "R?" V 9680 2300 40 0000 C CNN +F 1 "10k" V 9607 2301 40 0000 C CNN +F 2 "" V 9530 2300 30 0000 C CNN +F 3 "" H 9600 2300 30 0000 C CNN + 1 9600 2300 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 533846A3 +P 10050 2200 +F 0 "R?" V 10130 2200 40 0000 C CNN +F 1 "10k" V 10057 2201 40 0000 C CNN +F 2 "" V 9980 2200 30 0000 C CNN +F 3 "" H 10050 2200 30 0000 C CNN + 1 10050 2200 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 533846AE +P 9600 3200 +F 0 "R?" V 9680 3200 40 0000 C CNN +F 1 "10k" V 9607 3201 40 0000 C CNN +F 2 "" V 9530 3200 30 0000 C CNN +F 3 "" H 9600 3200 30 0000 C CNN + 1 9600 3200 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 533846B9 +P 3200 4200 +F 0 "R?" V 3280 4200 40 0000 C CNN +F 1 "10k" V 3207 4201 40 0000 C CNN +F 2 "" V 3130 4200 30 0000 C CNN +F 3 "" H 3200 4200 30 0000 C CNN + 1 3200 4200 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 533846CE +P 3650 4100 +F 0 "R?" V 3730 4100 40 0000 C CNN +F 1 "10k" V 3657 4101 40 0000 C CNN +F 2 "" V 3580 4100 30 0000 C CNN +F 3 "" H 3650 4100 30 0000 C CNN + 1 3650 4100 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 533846D9 +P 3200 5100 +F 0 "R?" V 3280 5100 40 0000 C CNN +F 1 "10k" V 3207 5101 40 0000 C CNN +F 2 "" V 3130 5100 30 0000 C CNN +F 3 "" H 3200 5100 30 0000 C CNN + 1 3200 5100 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 533846E4 +P 4800 4200 +F 0 "R?" V 4880 4200 40 0000 C CNN +F 1 "10k" V 4807 4201 40 0000 C CNN +F 2 "" V 4730 4200 30 0000 C CNN +F 3 "" H 4800 4200 30 0000 C CNN + 1 4800 4200 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 533846EF +P 4800 5100 +F 0 "R?" V 4880 5100 40 0000 C CNN +F 1 "10k" V 4807 5101 40 0000 C CNN +F 2 "" V 4730 5100 30 0000 C CNN +F 3 "" H 4800 5100 30 0000 C CNN + 1 4800 5100 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 533846FA +P 5250 4100 +F 0 "R?" V 5330 4100 40 0000 C CNN +F 1 "10k" V 5257 4101 40 0000 C CNN +F 2 "" V 5180 4100 30 0000 C CNN +F 3 "" H 5250 4100 30 0000 C CNN + 1 5250 4100 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 53384705 +P 6400 4200 +F 0 "R?" V 6480 4200 40 0000 C CNN +F 1 "10k" V 6407 4201 40 0000 C CNN +F 2 "" V 6330 4200 30 0000 C CNN +F 3 "" H 6400 4200 30 0000 C CNN + 1 6400 4200 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 53384710 +P 6400 5100 +F 0 "R?" V 6480 5100 40 0000 C CNN +F 1 "10k" V 6407 5101 40 0000 C CNN +F 2 "" V 6330 5100 30 0000 C CNN +F 3 "" H 6400 5100 30 0000 C CNN + 1 6400 5100 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 5338471B +P 6850 4100 +F 0 "R?" V 6930 4100 40 0000 C CNN +F 1 "10k" V 6857 4101 40 0000 C CNN +F 2 "" V 6780 4100 30 0000 C CNN +F 3 "" H 6850 4100 30 0000 C CNN + 1 6850 4100 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 53384726 +P 8000 4200 +F 0 "R?" V 8080 4200 40 0000 C CNN +F 1 "10k" V 8007 4201 40 0000 C CNN +F 2 "" V 7930 4200 30 0000 C CNN +F 3 "" H 8000 4200 30 0000 C CNN + 1 8000 4200 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 53384731 +P 8450 4100 +F 0 "R?" V 8530 4100 40 0000 C CNN +F 1 "10k" V 8457 4101 40 0000 C CNN +F 2 "" V 8380 4100 30 0000 C CNN +F 3 "" H 8450 4100 30 0000 C CNN + 1 8450 4100 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 5338473C +P 8000 5100 +F 0 "R?" V 8080 5100 40 0000 C CNN +F 1 "10k" V 8007 5101 40 0000 C CNN +F 2 "" V 7930 5100 30 0000 C CNN +F 3 "" H 8000 5100 30 0000 C CNN + 1 8000 5100 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 53384747 +P 9600 4200 +F 0 "R?" V 9680 4200 40 0000 C CNN +F 1 "10k" V 9607 4201 40 0000 C CNN +F 2 "" V 9530 4200 30 0000 C CNN +F 3 "" H 9600 4200 30 0000 C CNN + 1 9600 4200 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 53384752 +P 9600 5100 +F 0 "R?" V 9680 5100 40 0000 C CNN +F 1 "10k" V 9607 5101 40 0000 C CNN +F 2 "" V 9530 5100 30 0000 C CNN +F 3 "" H 9600 5100 30 0000 C CNN + 1 9600 5100 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 5338475D +P 10050 4100 +F 0 "R?" V 10130 4100 40 0000 C CNN +F 1 "10k" V 10057 4101 40 0000 C CNN +F 2 "" V 9980 4100 30 0000 C CNN +F 3 "" H 10050 4100 30 0000 C CNN + 1 10050 4100 + 1 0 0 -1 +$EndComp +$Comp +L CONN_12 P? +U 1 1 53389EA5 +P 1250 3600 +F 0 "P?" V 1200 3600 60 0000 C CNN +F 1 "CONN_12" V 1300 3600 60 0000 C CNN +F 2 "" H 1250 3600 60 0000 C CNN +F 3 "" H 1250 3600 60 0000 C CNN + 1 1250 3600 + -1 0 0 1 +$EndComp +Wire Wire Line + 1600 3050 2050 3050 +Wire Wire Line + 1600 3150 1950 3150 +Wire Wire Line + 1600 3250 1950 3250 +Wire Wire Line + 1600 3350 1950 3350 +Wire Wire Line + 1600 3450 1950 3450 +Wire Wire Line + 1600 3550 1950 3550 +Wire Wire Line + 1600 3650 1950 3650 +Wire Wire Line + 1600 3750 1950 3750 +Wire Wire Line + 1600 3850 1950 3850 +Wire Wire Line + 1600 3950 1950 3950 +Wire Wire Line + 1600 4050 1950 4050 +Wire Wire Line + 1600 4150 2050 4150 +Text Label 1800 4050 0 60 ~ 0 +IN1 +Text Label 1800 3950 0 60 ~ 0 +IN2 +Text Label 1800 3850 0 60 ~ 0 +IN3 +Text Label 1800 3750 0 60 ~ 0 +IN4 +Text Label 1800 3650 0 60 ~ 0 +IN5 +Text Label 1800 3550 0 60 ~ 0 +IN6 +Text Label 1800 3450 0 60 ~ 0 +IN7 +Text Label 1800 3350 0 60 ~ 0 +IN8 +Text Label 1800 3250 0 60 ~ 0 +IN9 +Text Label 1800 3150 0 60 ~ 0 +IN10 +Text Label 2900 2750 0 60 ~ 0 +IN1 +Text Label 4500 2750 0 60 ~ 0 +IN2 +Text Label 6100 2750 0 60 ~ 0 +IN3 +Text Label 7700 2750 0 60 ~ 0 +IN4 +Text Label 9300 2750 0 60 ~ 0 +IN5 +Text Label 2900 4650 0 60 ~ 0 +IN6 +Text Label 4500 4650 0 60 ~ 0 +IN7 +Text Label 6100 4650 0 60 ~ 0 +IN8 +Text Label 7700 4650 0 60 ~ 0 +IN9 +Text Label 9300 4650 0 60 ~ 0 +IN10 +Text HLabel 2050 3050 2 60 UnSpc ~ 0 +Gnd +Text HLabel 2050 4150 2 60 UnSpc ~ 0 +Gnd +$EndSCHEMATC diff --git a/hardware/ECUStimS/HiLo.sch b/hardware/ECUStimS/HiLo.sch new file mode 100644 index 0000000000..e56b2d8518 --- /dev/null +++ b/hardware/ECUStimS/HiLo.sch @@ -0,0 +1,522 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:ECUStimS +LIBS:ECUStimS-cache +EELAYER 24 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 5 5 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 6850 3850 7550 3850 +Wire Wire Line + 6850 3750 7550 3750 +$Comp +L C C? +U 1 1 524F7FBD +P 5750 4650 +F 0 "C?" V 5800 4700 40 0000 L CNN +F 1 "0.1uF" V 5800 4400 40 0000 L CNN +F 2 "SM0805" H 5788 4500 30 0001 C CNN +F 3 "~" H 5750 4650 60 0000 C CNN +F 4 "AVX,08051C104KAT2A" V 5750 4650 60 0001 C CNN "MFG,MFG#" +F 5 "SEEED,NA" V 5750 4650 60 0001 C CNN "SEEED,#" +F 6 "DIGI,478-5028-1-ND" V 5750 4650 60 0001 C CNN "VEND1,VEND1#" + 1 5750 4650 + 0 1 -1 0 +$EndComp +Wire Wire Line + 6950 3650 7550 3650 +Wire Wire Line + 7050 3550 7550 3550 +Wire Wire Line + 5300 4650 5550 4650 +Wire Wire Line + 5300 4550 5850 4550 +$Comp +L LED LD? +U 1 1 52E5BF3C +P 6550 4750 +F 0 "LD?" H 6400 4650 50 0000 C CNN +F 1 "LED" H 6550 4650 50 0000 C CNN +F 2 "SM1206" H 6550 4750 60 0001 C CNN +F 3 "" H 6550 4750 60 0000 C CNN +F 4 "AVAGO,HSMR-C150" H 6550 4750 60 0001 C CNN "MFG,MFG#" +F 5 "SEEED,NA" H 6550 4750 60 0001 C CNN "SEEED,#" +F 6 "DIGI,516-1436-1-ND" H 6550 4750 60 0001 C CNN "VEND1,VEND1#" + 1 6550 4750 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 52E5BF4C +P 6100 4750 +F 0 "R?" V 6180 4750 40 0000 C CNN +F 1 "2700" V 6107 4751 40 0000 C CNN +F 2 "SM0805" V 6030 4750 30 0001 C CNN +F 3 "" H 6100 4750 30 0000 C CNN +F 4 "PANASONIC,ERJ-6ENF2701V" V 6100 4750 60 0001 C CNN "MFG,MFG#" +F 5 "SEEED,NA" V 6100 4750 60 0001 C CNN "SEEED,#" +F 6 "DIGI,P2.70KCCT-ND" V 6100 4750 60 0001 C CNN "VEND1,VEND1#" + 1 6100 4750 + 0 1 1 0 +$EndComp +Wire Wire Line + 5300 4750 5850 4750 +$Comp +L R R? +U 1 1 52E5BFE6 +P 6100 4950 +F 0 "R?" V 6180 4950 40 0000 C CNN +F 1 "100" V 6107 4951 40 0000 C CNN +F 2 "SM0805" V 6030 4950 30 0001 C CNN +F 3 "" H 6100 4950 30 0000 C CNN +F 4 "PANASONIC,ERJ-6ENF1000V" V 6100 4950 60 0001 C CNN "MFG,MFG#" +F 5 "seeed,NA" V 6100 4950 60 0001 C CNN "seeed,#" +F 6 "digi,P100CTR-ND" V 6100 4950 60 0001 C CNN "vend1,vend1#" + 1 6100 4950 + 0 1 1 0 +$EndComp +Wire Wire Line + 5850 4750 5850 4950 +Wire Wire Line + 5850 4550 5850 4350 +Wire Wire Line + 6750 2750 6750 5200 +Connection ~ 6750 4750 +Wire Wire Line + 5950 4650 6750 4650 +Connection ~ 6750 4650 +Wire Wire Line + 5300 3750 5550 3750 +Wire Wire Line + 5300 3650 5850 3650 +Wire Wire Line + 5300 3850 5850 3850 +Wire Wire Line + 5850 3850 5850 4050 +Wire Wire Line + 5850 3650 5850 3450 +Connection ~ 6750 3850 +Connection ~ 6750 3750 +Wire Wire Line + 5300 2850 5550 2850 +Wire Wire Line + 5300 2750 5850 2750 +Wire Wire Line + 5300 2950 5850 2950 +Wire Wire Line + 5850 2950 5850 3150 +Wire Wire Line + 5850 2750 5850 2550 +Connection ~ 6750 2950 +Connection ~ 6750 2850 +Wire Wire Line + 6350 4950 7050 4950 +Wire Wire Line + 6350 3450 6850 3450 +Wire Wire Line + 6850 3450 6850 3750 +Wire Wire Line + 6350 3150 6950 3150 +Wire Wire Line + 6950 3150 6950 3650 +Wire Wire Line + 6350 2550 7050 2550 +Wire Wire Line + 7050 2550 7050 3550 +Wire Wire Line + 6850 3850 6850 4050 +Wire Wire Line + 6850 4050 6350 4050 +Wire Wire Line + 7550 3950 6950 3950 +Wire Wire Line + 6950 3950 6950 4350 +Wire Wire Line + 6950 4350 6350 4350 +Connection ~ 5400 4650 +Connection ~ 5400 3750 +Connection ~ 5400 2850 +Wire Wire Line + 5400 2350 5400 4650 +Wire Wire Line + 7550 4050 7050 4050 +Wire Wire Line + 7050 4050 7050 4950 +$Comp +L R R? +U 1 1 52E63CB5 +P 6100 4550 +F 0 "R?" V 6180 4550 40 0000 C CNN +F 1 "2700" V 6107 4551 40 0000 C CNN +F 2 "SM0805" V 6030 4550 30 0001 C CNN +F 3 "" H 6100 4550 30 0000 C CNN +F 4 "PANASONIC,ERJ-6ENF2701V" V 6100 4550 60 0001 C CNN "MFG,MFG#" +F 5 "SEEED,NA" V 6100 4550 60 0001 C CNN "SEEED,#" +F 6 "DIGI,P2.70KCCT-ND" V 6100 4550 60 0001 C CNN "VEND1,VEND1#" + 1 6100 4550 + 0 1 -1 0 +$EndComp +$Comp +L R R? +U 1 1 52E63CBE +P 6100 4350 +F 0 "R?" V 6180 4350 40 0000 C CNN +F 1 "100" V 6107 4351 40 0000 C CNN +F 2 "SM0805" V 6030 4350 30 0001 C CNN +F 3 "" H 6100 4350 30 0000 C CNN +F 4 "PANASONIC,ERJ-6ENF1000V" V 6100 4350 60 0001 C CNN "MFG,MFG#" +F 5 "seeed,NA" V 6100 4350 60 0001 C CNN "seeed,#" +F 6 "digi,P100CTR-ND" V 6100 4350 60 0001 C CNN "vend1,vend1#" + 1 6100 4350 + 0 1 -1 0 +$EndComp +$Comp +L LED LD? +U 1 1 52E63CC7 +P 6550 4550 +F 0 "LD?" H 6400 4450 50 0000 C CNN +F 1 "LED" H 6550 4450 50 0000 C CNN +F 2 "SM1206" H 6550 4550 60 0001 C CNN +F 3 "" H 6550 4550 60 0000 C CNN +F 4 "AVAGO,HSMR-C150" H 6550 4550 60 0001 C CNN "MFG,MFG#" +F 5 "SEEED,NA" H 6550 4550 60 0001 C CNN "SEEED,#" +F 6 "DIGI,516-1436-1-ND" H 6550 4550 60 0001 C CNN "VEND1,VEND1#" + 1 6550 4550 + 1 0 0 1 +$EndComp +$Comp +L R R? +U 1 1 52E63D08 +P 6100 3650 +F 0 "R?" V 6180 3650 40 0000 C CNN +F 1 "2700" V 6107 3651 40 0000 C CNN +F 2 "SM0805" V 6030 3650 30 0001 C CNN +F 3 "" H 6100 3650 30 0000 C CNN +F 4 "PANASONIC,ERJ-6ENF2701V" V 6100 3650 60 0001 C CNN "MFG,MFG#" +F 5 "SEEED,NA" V 6100 3650 60 0001 C CNN "SEEED,#" +F 6 "DIGI,P2.70KCCT-ND" V 6100 3650 60 0001 C CNN "VEND1,VEND1#" + 1 6100 3650 + 0 1 -1 0 +$EndComp +$Comp +L R R? +U 1 1 52E63D11 +P 6100 3450 +F 0 "R?" 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V 3730 4850 40 0000 C CNN +F 1 "10K" V 3657 4851 40 0000 C CNN +F 2 "" V 3580 4850 30 0000 C CNN +F 3 "" H 3650 4850 30 0000 C CNN + 1 3650 4850 + -1 0 0 1 +$EndComp +Text HLabel 4400 5700 0 60 UnSpc ~ 0 +GND +$Comp +L CONN_4 P? +U 1 1 5337A253 +P 4950 4750 +F 0 "P?" V 4900 4750 50 0000 C CNN +F 1 "CONN_4" V 5000 4750 50 0000 C CNN +F 2 "" H 4950 4750 60 0000 C CNN +F 3 "" H 4950 4750 60 0000 C CNN + 1 4950 4750 + 1 0 0 -1 +$EndComp +$Comp +L R R? +U 1 1 5337A259 +P 4750 4250 +F 0 "R?" V 4830 4250 40 0000 C CNN +F 1 "1K" V 4757 4251 40 0000 C CNN +F 2 "" V 4680 4250 30 0000 C CNN +F 3 "" H 4750 4250 30 0000 C CNN + 1 4750 4250 + 0 -1 -1 0 +$EndComp +Text HLabel 5150 4500 2 60 Input ~ 0 +5V +Text HLabel 5150 4000 2 60 Input ~ 0 +Ex_P +$Comp +L CONN_3 P? +U 1 1 5337A261 +P 5400 4250 +F 0 "P?" V 5350 4250 50 0000 C CNN +F 1 "CONN_3" V 5450 4250 40 0000 C CNN +F 2 "" H 5400 4250 60 0000 C CNN +F 3 "" H 5400 4250 60 0000 C CNN + 1 5400 4250 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2400 4850 2550 4850 +Wire Wire Line + 3400 4700 3550 4700 +Wire Wire Line + 3550 4700 3550 4600 +Wire Wire Line + 3550 4600 3850 4600 +Connection ~ 3650 4600 +Wire Wire Line + 3400 5000 3550 5000 +Wire Wire Line + 3550 5000 3550 5100 +Wire Wire Line + 3550 5100 3850 5100 +Connection ~ 3650 5100 +Wire Wire Line + 4350 4600 4600 4600 +Wire Wire Line + 4350 4700 4600 4700 +Wire Wire Line + 4350 4700 4350 5100 +Wire Wire Line + 4500 5600 4500 5700 +Wire Wire Line + 4400 5700 4600 5700 +Wire Wire Line + 2500 4850 2500 5400 +Wire Wire Line + 2500 5400 4200 5400 +Connection ~ 2500 4850 +Wire Wire Line + 4600 4800 4500 4800 +Connection ~ 4500 4800 +Wire Wire Line + 4600 5700 4600 4900 +Connection ~ 4500 5700 +Wire Wire Line + 4500 4250 4500 5200 +Wire Wire Line + 5150 4000 5050 4000 +Wire Wire Line + 5050 4000 5050 4150 +Wire Wire Line + 5050 4350 5050 4500 +Wire Wire Line + 5050 4500 5150 4500 +Wire Wire Line + 5050 4250 5000 4250 +$Comp +L C C? +U 1 1 5337B12E +P 5200 1200 +F 0 "C?" H 5200 1300 40 0000 L CNN +F 1 "1 uF" H 5206 1115 40 0000 L CNN +F 2 "" H 5238 1050 30 0000 C CNN +F 3 "" H 5200 1200 60 0000 C CNN + 1 5200 1200 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4950 1000 5600 1000 +Wire Wire Line + 4950 1400 5650 1400 +Connection ~ 5400 1400 +Connection ~ 5200 1400 +Connection ~ 5400 1000 +Connection ~ 5200 1000 +$EndSCHEMATC diff --git a/hardware/ECUStimS/gpl.txt b/hardware/ECUStimS/gpl.txt new file mode 100644 index 0000000000..94a9ed024d --- /dev/null +++ b/hardware/ECUStimS/gpl.txt @@ -0,0 +1,674 @@ + GNU GENERAL PUBLIC LICENSE + Version 3, 29 June 2007 + + Copyright (C) 2007 Free Software Foundation, Inc. + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The GNU General Public License is a free, copyleft license for +software and other kinds of works. + + The licenses for most software and other practical works are designed +to take away your freedom to share and change the works. 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But first, please read +. diff --git a/hardware/ECUStimS/lib/ECUStimS.dcm b/hardware/ECUStimS/lib/ECUStimS.dcm new file mode 100644 index 0000000000..5f3ed79b79 --- /dev/null +++ b/hardware/ECUStimS/lib/ECUStimS.dcm @@ -0,0 +1,3 @@ +EESchema-DOCLIB Version 2.0 +# +#End Doc Library diff --git a/hardware/ECUStimS/link.txt b/hardware/ECUStimS/link.txt new file mode 100644 index 0000000000..7bd4759c30 --- /dev/null +++ b/hardware/ECUStimS/link.txt @@ -0,0 +1 @@ +Homepage: https://github.com/DanMoto/ECUStimS \ No newline at end of file diff --git a/hardware/Stimulator/LICENSE b/hardware/Stimulator/LICENSE new file mode 100644 index 0000000000..70566f2d0e --- /dev/null +++ b/hardware/Stimulator/LICENSE @@ -0,0 +1,674 @@ +GNU GENERAL PUBLIC LICENSE + Version 3, 29 June 2007 + + Copyright (C) 2007 Free Software Foundation, Inc. + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + + Preamble + + The GNU General Public License is a free, copyleft license for +software and other kinds of works. + + The licenses for most software and other practical works are designed +to take away your freedom to share and change the works. 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If the +Program specifies that a certain numbered version of the GNU General +Public License "or any later version" applies to it, you have the +option of following the terms and conditions either of that numbered +version or of any later version published by the Free Software +Foundation. If the Program does not specify a version number of the +GNU General Public License, you may choose any version ever published +by the Free Software Foundation. + + If the Program specifies that a proxy can decide which future +versions of the GNU General Public License can be used, that proxy's +public statement of acceptance of a version permanently authorizes you +to choose that version for the Program. + + Later license versions may give you additional or different +permissions. However, no additional obligations are imposed on any +author or copyright holder as a result of your choosing to follow a +later version. + + 15. Disclaimer of Warranty. + + THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY +APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT +HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY +OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, +THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM +IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF +ALL NECESSARY SERVICING, REPAIR OR CORRECTION. + + 16. Limitation of Liability. + + IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING +WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR CONVEYS +THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY +GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE +USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF +DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD +PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS), +EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF +SUCH DAMAGES. + + 17. Interpretation of Sections 15 and 16. + + If the disclaimer of warranty and limitation of liability provided +above cannot be given local legal effect according to their terms, +reviewing courts shall apply local law that most closely approximates +an absolute waiver of all civil liability in connection with the +Program, unless a warranty or assumption of liability accompanies a +copy of the Program in return for a fee. + + END OF TERMS AND CONDITIONS + + How to Apply These Terms to Your New Programs + + If you develop a new program, and you want it to be of the greatest +possible use to the public, the best way to achieve this is to make it +free software which everyone can redistribute and change under these terms. + + To do so, attach the following notices to the program. It is safest +to attach them to the start of each source file to most effectively +state the exclusion of warranty; and each file should have at least +the "copyright" line and a pointer to where the full notice is found. + + {one line to give the program's name and a brief idea of what it does.} + Copyright (C) {year} {name of author} + + This program is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + +Also add information on how to contact you by electronic and paper mail. + + If the program does terminal interaction, make it output a short +notice like this when it starts in an interactive mode: + + {project} Copyright (C) {year} {fullname} + This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'. + This is free software, and you are welcome to redistribute it + under certain conditions; type `show c' for details. + +The hypothetical commands `show w' and `show c' should show the appropriate +parts of the General Public License. Of course, your program's commands +might be different; for a GUI interface, you would use an "about box". + + You should also get your employer (if you work as a programmer) or school, +if any, to sign a "copyright disclaimer" for the program, if necessary. +For more information on this, and how to apply and follow the GNU GPL, see +. + + The GNU General Public License does not permit incorporating your program +into proprietary programs. If your program is a subroutine library, you +may consider it more useful to permit linking proprietary applications with +the library. If this is what you want to do, use the GNU Lesser General +Public License instead of this License. But first, please read +. \ No newline at end of file diff --git a/hardware/Stimulator/README.md b/hardware/Stimulator/README.md new file mode 100644 index 0000000000..5d45d3366d --- /dev/null +++ b/hardware/Stimulator/README.md @@ -0,0 +1,6 @@ +Stimulator +========== + +Rusefi Stimulator + +https://github.com/DanMoto/Stimulator diff --git a/hardware/Stimulator/Stimulator.cmp b/hardware/Stimulator/Stimulator.cmp new file mode 100644 index 0000000000..d356504ca9 --- /dev/null +++ b/hardware/Stimulator/Stimulator.cmp @@ -0,0 +1,367 @@ +Cmp-Mod V01 Created by Cvpcb (2014-04-17 BZR 4805)-product date = Sat 19 Apr 2014 13:32:46 CDT + +BeginCmp +TimeStamp = /5351DBB7; +Reference = C1; +ValeurCmp = 0.1uF; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /53525540; +Reference = C2; +ValeurCmp = 0.1uF; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /5352554B; +Reference = C3; +ValeurCmp = 0.1uF; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /5352B651; +Reference = C4; +ValeurCmp = 0.1uF; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /535248BF; +Reference = P1; +ValeurCmp = CONN_3X2; +IdModule = Pin_Headers:Pin_Header_Straight_2x03; +EndCmp + +BeginCmp +TimeStamp = /5352E339; +Reference = P2; +ValeurCmp = CONN_9X2; +IdModule = Pin_Headers:Pin_Header_Straight_2x09; +EndCmp + +BeginCmp +TimeStamp = /5352BDDA; +Reference = P10; +ValeurCmp = CONN_10X2; +IdModule = Pin_Headers:Pin_Header_Straight_2x10; +EndCmp + +BeginCmp +TimeStamp = /5352B94C; +Reference = P12; +ValeurCmp = CONN_8X2; +IdModule = Pin_Headers:Pin_Header_Straight_2x08; +EndCmp + +BeginCmp +TimeStamp = /5351D41F; +Reference = Q1; +ValeurCmp = 2N7002; +IdModule = Transistors_SMD:sot23; +EndCmp + +BeginCmp +TimeStamp = /5351D5DB; +Reference = Q2; +ValeurCmp = 2N7002; +IdModule = Transistors_SMD:sot23; +EndCmp + +BeginCmp +TimeStamp = /5351D60F; +Reference = Q3; +ValeurCmp = 2N7002; +IdModule = Transistors_SMD:sot23; +EndCmp + +BeginCmp +TimeStamp = /5351D643; +Reference = Q4; +ValeurCmp = 2N7002; +IdModule = Transistors_SMD:sot23; +EndCmp + +BeginCmp +TimeStamp = /5352B8F0; +Reference = Q5; +ValeurCmp = 2N7002; +IdModule = Transistors_SMD:sot23; +EndCmp + +BeginCmp +TimeStamp = /5352B8FE; +Reference = Q6; +ValeurCmp = 2N7002; +IdModule = Transistors_SMD:sot23; +EndCmp + +BeginCmp +TimeStamp = /53525508; +Reference = R1; +ValeurCmp = 0; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /535259D3; +Reference = R2; +ValeurCmp = 0; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /535259F4; +Reference = R3; +ValeurCmp = 0; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /535259FF; +Reference = R4; +ValeurCmp = 0; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /53525A20; +Reference = R5; +ValeurCmp = 0; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /53525A2B; +Reference = R6; +ValeurCmp = 0; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /535259E9; +Reference = R7; +ValeurCmp = 0; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /535259DE; +Reference = R8; +ValeurCmp = 0; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /53525A0A; +Reference = R9; +ValeurCmp = 0; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /53525A15; +Reference = R10; +ValeurCmp = 0; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /53525A41; +Reference = R11; +ValeurCmp = 0; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /53525A36; +Reference = R12; +ValeurCmp = 0; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /5351D486; +Reference = R13; +ValeurCmp = 10k; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /5351D5E7; +Reference = R14; +ValeurCmp = 10k; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /5351D61B; +Reference = R15; +ValeurCmp = 10k; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /5351D64F; +Reference = R16; +ValeurCmp = 10k; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /53525479; +Reference = R17; +ValeurCmp = 10k; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /5352546E; +Reference = R18; +ValeurCmp = 10k; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /53525463; +Reference = R19; +ValeurCmp = 10k; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /5351D649; +Reference = R20; +ValeurCmp = 10k; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /535254A5; +Reference = R21; +ValeurCmp = 10k; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /5352549A; +Reference = R22; +ValeurCmp = 10k; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /5352548F; +Reference = R23; +ValeurCmp = 10k; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /53525484; +Reference = R24; +ValeurCmp = 10k; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /5352B65F; +Reference = R25; +ValeurCmp = 0; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /5352B665; +Reference = R26; +ValeurCmp = 0; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /5352B671; +Reference = R27; +ValeurCmp = 0; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /5352B66B; +Reference = R28; +ValeurCmp = 0; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /5352B8F6; +Reference = R29; +ValeurCmp = 10k; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /5352B90A; +Reference = R30; +ValeurCmp = 10k; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /5352B936; +Reference = R31; +ValeurCmp = 10k; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /5352B904; +Reference = R32; +ValeurCmp = 10k; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /5352B942; +Reference = R33; +ValeurCmp = 10k; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /5352B93C; +Reference = R34; +ValeurCmp = 10k; +IdModule = SMD_Packages:SM0805; +EndCmp + +BeginCmp +TimeStamp = /5351D954; +Reference = U1; +ValeurCmp = MCP42010; +IdModule = SOIC_Packages:SOIC-14_Narrow; +EndCmp + +BeginCmp +TimeStamp = /5351ED1B; +Reference = U2; +ValeurCmp = MCP42010; +IdModule = SOIC_Packages:SOIC-14_Narrow; +EndCmp + +BeginCmp +TimeStamp = /5351ED74; +Reference = U3; +ValeurCmp = MCP42010; +IdModule = SOIC_Packages:SOIC-14_Narrow; +EndCmp + +BeginCmp +TimeStamp = /5352B616; +Reference = U4; +ValeurCmp = MCP42010; +IdModule = SOIC_Packages:SOIC-14_Narrow; +EndCmp + +EndListe diff --git a/hardware/Stimulator/Stimulator.kicad_pcb b/hardware/Stimulator/Stimulator.kicad_pcb new file mode 100644 index 0000000000..ec14d90b48 --- /dev/null +++ b/hardware/Stimulator/Stimulator.kicad_pcb @@ -0,0 +1,2695 @@ +(kicad_pcb (version 3) (host pcbnew "(2014-04-17 BZR 4805)-product") + + (general + (links 153) + (no_connects 0) + (area 108.614287 53.665 176.069172 95.300001) + (thickness 1.6) + (drawings 40) + (tracks 647) + (zones 0) + (modules 52) + (nets 54) + ) + + (page A4) + (layers + (15 F.Cu mixed) + (0 B.Cu mixed) + (16 B.Adhes user) + (17 F.Adhes user) + (18 B.Paste user) + (19 F.Paste user) + (20 B.SilkS user) + (21 F.SilkS user) + (22 B.Mask user) + (23 F.Mask user) + (24 Dwgs.User user) + (28 Edge.Cuts user) + ) + + (setup + (last_trace_width 0.254) + (trace_clearance 0.254) + (zone_clearance 0.508) + (zone_45_only no) + (trace_min 0.254) + (segment_width 0.2) + (edge_width 0.1) + (via_size 0.889) + (via_drill 0.635) + (via_min_size 0.889) + (via_min_drill 0.508) + (uvia_size 0.508) + (uvia_drill 0.127) + (uvias_allowed no) + (uvia_min_size 0.508) + (uvia_min_drill 0.127) + (pcb_text_width 0.3) + (pcb_text_size 1.5 1.5) + (mod_edge_width 0.15) + (mod_text_size 1 1) + (mod_text_width 0.15) + (pad_size 1.5 1.5) + (pad_drill 0.6) + (pad_to_mask_clearance 0) + (aux_axis_origin 124.46 62.23) + (visible_elements FFFFFF7F) + (pcbplotparams + (layerselection 301957121) + (usegerberextensions true) + (excludeedgelayer true) + (linewidth 0.100000) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15) + (hpglpenoverlay 2) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue true) + (plotothertext true) + (plotinvisibletext false) + (padsonsilk false) + (subtractmaskfromsilk false) + (outputformat 1) + (mirror false) + (drillshape 0) + (scaleselection 1) + (outputdirectory gerber/)) + ) + + (net 0 "") + (net 1 /Vd) + (net 2 GND) + (net 3 /Vdpu) + (net 4 /Vipu) + (net 5 /SCK) + (net 6 /MOSI) + (net 7 /Vc) + (net 8 /IN_1) + (net 9 /IN_2) + (net 10 /IN_3) + (net 11 /IN_4) + (net 12 /OUT1) + (net 13 /OUT2) + (net 14 /OUT3) + (net 15 /OUT4) + (net 16 /OUT5) + (net 17 /OUT6) + (net 18 /EIN_1) + (net 19 /EIN_2) + (net 20 /EIN_3) + (net 21 /EIN_4) + (net 22 "Net-(Q1-Pad1)") + (net 23 "Net-(Q2-Pad1)") + (net 24 "Net-(Q3-Pad1)") + (net 25 "Net-(Q4-Pad1)") + (net 26 "Net-(R1-Pad2)") + (net 27 "Net-(R2-Pad2)") + (net 28 "Net-(R3-Pad2)") + (net 29 "Net-(R4-Pad2)") + (net 30 "Net-(R5-Pad2)") + (net 31 "Net-(R6-Pad2)") + (net 32 "Net-(R7-Pad1)") + (net 33 "Net-(R8-Pad1)") + (net 34 "Net-(R9-Pad1)") + (net 35 "Net-(R10-Pad1)") + (net 36 "Net-(R11-Pad1)") + (net 37 "Net-(R12-Pad1)") + (net 38 /OUT7) + (net 39 /OUT8) + (net 40 /EIN_5) + (net 41 "Net-(Q5-Pad1)") + (net 42 /IN_5) + (net 43 "Net-(Q6-Pad1)") + (net 44 /IN_6) + (net 45 "Net-(R25-Pad2)") + (net 46 "Net-(R26-Pad2)") + (net 47 "Net-(R27-Pad1)") + (net 48 "Net-(R28-Pad1)") + (net 49 /EIN_6) + (net 50 /CS_12) + (net 51 /CS_43) + (net 52 /CS_56) + (net 53 /CS_87) + + (net_class Default "This is the default net class." + (clearance 0.254) + (trace_width 0.254) + (via_dia 0.889) + (via_drill 0.635) + (uvia_dia 0.508) + (uvia_drill 0.127) + (add_net /CS_12) + (add_net /CS_43) + (add_net /CS_56) + (add_net /CS_87) + (add_net /EIN_1) + (add_net /EIN_2) + (add_net /EIN_3) + (add_net /EIN_4) + (add_net /EIN_5) + (add_net /EIN_6) + (add_net /IN_1) + (add_net /IN_2) + (add_net /IN_3) + (add_net /IN_4) + (add_net /IN_5) + (add_net /IN_6) + (add_net /MOSI) + (add_net /OUT1) + (add_net /OUT2) + (add_net /OUT3) + (add_net /OUT4) + (add_net /OUT5) + (add_net /OUT6) + (add_net /OUT7) + (add_net /OUT8) + (add_net /SCK) + (add_net /Vc) + (add_net /Vd) + (add_net /Vdpu) + (add_net /Vipu) + (add_net "Net-(Q1-Pad1)") + (add_net "Net-(Q2-Pad1)") + (add_net "Net-(Q3-Pad1)") + (add_net "Net-(Q4-Pad1)") + (add_net "Net-(Q5-Pad1)") + (add_net "Net-(Q6-Pad1)") + (add_net "Net-(R1-Pad2)") + (add_net "Net-(R10-Pad1)") + (add_net "Net-(R11-Pad1)") + (add_net "Net-(R12-Pad1)") + (add_net "Net-(R2-Pad2)") + (add_net "Net-(R25-Pad2)") + (add_net "Net-(R26-Pad2)") + (add_net "Net-(R27-Pad1)") + (add_net "Net-(R28-Pad1)") + (add_net "Net-(R3-Pad2)") + (add_net "Net-(R4-Pad2)") + (add_net "Net-(R5-Pad2)") + (add_net "Net-(R6-Pad2)") + (add_net "Net-(R7-Pad1)") + (add_net "Net-(R8-Pad1)") + (add_net "Net-(R9-Pad1)") + ) + + (net_class Power "" + (clearance 0.254) + (trace_width 0.508) + (via_dia 0.889) + (via_drill 0.635) + (uvia_dia 0.508) + (uvia_drill 0.127) + (add_net GND) + ) + + (module SMD_Packages:SM0805 (layer F.Cu) (tedit 5352F23B) (tstamp 535213D4) + (at 139.065 76.2) + (path /5351DBB7) + (attr smd) + (fp_text reference C1 (at 0 1.905) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_text value 0.1uF (at 0 0.381) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906)) + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask) + (net 1 /Vd)) + (pad 2 smd rect (at 0.9525 0) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask) + (net 2 GND)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer B.Cu) (tedit 5352F239) (tstamp 535213E1) + (at 144.145 76.2 180) + (path /53525540) + (attr smd) + (fp_text reference C2 (at 0 -1.905 180) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_text value 0.1uF (at 0 -0.381 180) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_circle (center -1.651 -0.762) (end -1.651 -0.635) (layer B.SilkS) (width 0.09906)) + (fp_line (start -0.508 -0.762) (end -1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -0.508 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 0.508 0.762) (end 1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask) + (net 1 /Vd)) + (pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer F.Cu) (tedit 5352F226) (tstamp 535213EE) + (at 159.385 68.58 180) + (path /5352554B) + (attr smd) + (fp_text reference C3 (at 0 1.905 180) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_text value 0.1uF (at 0 0.381 180) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906)) + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397) (layers F.Cu) + (net 1 /Vd)) + (pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397) (layers F.Cu) + (net 2 GND)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Pin_Headers:Pin_Header_Straight_2x03 (layer F.Cu) (tedit 53530FF4) (tstamp 53521400) + (at 128.27 67.31 270) + (descr "1 pin") + (tags "CONN DEV") + (path /535248BF) + (fp_text reference P1 (at 5.08 -7.62 360) (layer F.SilkS) + (effects (font (size 1.27 1.27) (thickness 0.2032))) + ) + (fp_text value CONN_3X2 (at 0 0 270) (layer F.SilkS) hide + (effects (font (size 1.27 1.27) (thickness 0.2032))) + ) + (fp_line (start -3.81 0) (end -1.27 0) (layer F.SilkS) (width 0.254)) + (fp_line (start -1.27 0) (end -1.27 2.54) (layer F.SilkS) (width 0.254)) + (fp_line (start -3.81 2.54) (end 3.81 2.54) (layer F.SilkS) (width 0.254)) + (fp_line (start 3.81 2.54) (end 3.81 -2.54) (layer F.SilkS) (width 0.254)) + (fp_line (start 3.81 -2.54) (end -1.27 -2.54) (layer F.SilkS) (width 0.254)) + (fp_line (start -3.81 2.54) (end -3.81 0) (layer F.SilkS) (width 0.254)) + (fp_line (start -3.81 -2.54) (end -3.81 0) (layer F.SilkS) (width 0.254)) + (fp_line (start -1.27 -2.54) (end -3.81 -2.54) (layer F.SilkS) (width 0.254)) + (pad 1 thru_hole rect (at -2.54 1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 4 /Vipu)) + (pad 2 thru_hole oval (at -2.54 -1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 4 /Vipu)) + (pad 3 thru_hole oval (at 0 1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 7 /Vc)) + (pad 4 thru_hole oval (at 0 -1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 3 /Vdpu)) + (pad 5 thru_hole oval (at 2.54 1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 1 /Vd)) + (pad 6 thru_hole oval (at 2.54 -1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 1 /Vd)) + (model Pin_Headers/Pin_Header_Straight_2x03.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Transistors_SMD:sot23 (layer F.Cu) (tedit 5352F18B) (tstamp 535214A4) + (at 140.335 90.17 270) + (descr SOT23) + (path /5351D41F) + (attr smd) + (fp_text reference Q1 (at 1.905 0 360) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.09906))) + ) + (fp_text value 2N7002 (at 0 0.09906 270) (layer F.SilkS) hide + (effects (font (size 0.50038 0.50038) (thickness 0.09906))) + ) + (fp_line (start 0.9525 0.6985) (end 0.9525 1.3589) (layer F.SilkS) (width 0.127)) + (fp_line (start -0.9525 0.6985) (end -0.9525 1.3589) (layer F.SilkS) (width 0.127)) + (fp_line (start 0 -0.6985) (end 0 -1.3589) (layer F.SilkS) (width 0.127)) + (fp_line (start -1.4986 -0.6985) (end 1.4986 -0.6985) (layer F.SilkS) (width 0.127)) + (fp_line (start 1.4986 -0.6985) (end 1.4986 0.6985) (layer F.SilkS) (width 0.127)) + (fp_line (start 1.4986 0.6985) (end -1.4986 0.6985) (layer F.SilkS) (width 0.127)) + (fp_line (start -1.4986 0.6985) (end -1.4986 -0.6985) (layer F.SilkS) (width 0.127)) + (pad 1 smd rect (at -0.9525 1.05664 270) (size 0.59944 1.00076) (layers F.Cu F.Paste F.Mask) + (net 22 "Net-(Q1-Pad1)")) + (pad 2 smd rect (at 0 -1.05664 270) (size 0.59944 1.00076) (layers F.Cu F.Paste F.Mask) + (net 18 /EIN_1)) + (pad 3 smd rect (at 0.9525 1.05664 270) (size 0.59944 1.00076) (layers F.Cu F.Paste F.Mask) + (net 8 /IN_1)) + (model smd/smd_transistors/sot23.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Transistors_SMD:sot23 (layer B.Cu) (tedit 5352F18F) (tstamp 535214B2) + (at 140.335 90.17 90) + (descr SOT23) + (path /5351D5DB) + (attr smd) + (fp_text reference Q2 (at -1.905 0 180) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.09906)) (justify mirror)) + ) + (fp_text value 2N7002 (at 0 -0.09906 90) (layer B.SilkS) hide + (effects (font (size 0.50038 0.50038) (thickness 0.09906)) (justify mirror)) + ) + (fp_line (start 0.9525 -0.6985) (end 0.9525 -1.3589) (layer B.SilkS) (width 0.127)) + (fp_line (start -0.9525 -0.6985) (end -0.9525 -1.3589) (layer B.SilkS) (width 0.127)) + (fp_line (start 0 0.6985) (end 0 1.3589) (layer B.SilkS) (width 0.127)) + (fp_line (start -1.4986 0.6985) (end 1.4986 0.6985) (layer B.SilkS) (width 0.127)) + (fp_line (start 1.4986 0.6985) (end 1.4986 -0.6985) (layer B.SilkS) (width 0.127)) + (fp_line (start 1.4986 -0.6985) (end -1.4986 -0.6985) (layer B.SilkS) (width 0.127)) + (fp_line (start -1.4986 -0.6985) (end -1.4986 0.6985) (layer B.SilkS) (width 0.127)) + (pad 1 smd rect (at -0.9525 -1.05664 90) (size 0.59944 1.00076) (layers B.Cu B.Paste B.Mask) + (net 23 "Net-(Q2-Pad1)")) + (pad 2 smd rect (at 0 1.05664 90) (size 0.59944 1.00076) (layers B.Cu B.Paste B.Mask) + (net 19 /EIN_2)) + (pad 3 smd rect (at 0.9525 -1.05664 90) (size 0.59944 1.00076) (layers B.Cu B.Paste B.Mask) + (net 9 /IN_2)) + (model smd/smd_transistors/sot23.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Transistors_SMD:sot23 (layer F.Cu) (tedit 5352F274) (tstamp 535214C0) + (at 140.335 84.455 270) + (descr SOT23) + (path /5351D60F) + (attr smd) + (fp_text reference Q3 (at -2.54 0 360) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.09906))) + ) + (fp_text value 2N7002 (at 0 0.09906 270) (layer F.SilkS) hide + (effects (font (size 0.50038 0.50038) (thickness 0.09906))) + ) + (fp_line (start 0.9525 0.6985) (end 0.9525 1.3589) (layer F.SilkS) (width 0.127)) + (fp_line (start -0.9525 0.6985) (end -0.9525 1.3589) (layer F.SilkS) (width 0.127)) + (fp_line (start 0 -0.6985) (end 0 -1.3589) (layer F.SilkS) (width 0.127)) + (fp_line (start -1.4986 -0.6985) (end 1.4986 -0.6985) (layer F.SilkS) (width 0.127)) + (fp_line (start 1.4986 -0.6985) (end 1.4986 0.6985) (layer F.SilkS) (width 0.127)) + (fp_line (start 1.4986 0.6985) (end -1.4986 0.6985) (layer F.SilkS) (width 0.127)) + (fp_line (start -1.4986 0.6985) (end -1.4986 -0.6985) (layer F.SilkS) (width 0.127)) + (pad 1 smd rect (at -0.9525 1.05664 270) (size 0.59944 1.00076) (layers F.Cu) + (net 24 "Net-(Q3-Pad1)")) + (pad 2 smd rect (at 0 -1.05664 270) (size 0.59944 1.00076) (layers F.Cu) + (net 20 /EIN_3)) + (pad 3 smd rect (at 0.9525 1.05664 270) (size 0.59944 1.00076) (layers F.Cu) + (net 10 /IN_3)) + (model smd/smd_transistors/sot23.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Transistors_SMD:sot23 (layer B.Cu) (tedit 5352F276) (tstamp 535214CE) + (at 140.335 84.455 90) + (descr SOT23) + (path /5351D643) + (attr smd) + (fp_text reference Q4 (at 2.54 0 180) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.09906)) (justify mirror)) + ) + (fp_text value 2N7002 (at 0 -0.09906 90) (layer B.SilkS) hide + (effects (font (size 0.50038 0.50038) (thickness 0.09906)) (justify mirror)) + ) + (fp_line (start 0.9525 -0.6985) (end 0.9525 -1.3589) (layer B.SilkS) (width 0.127)) + (fp_line (start -0.9525 -0.6985) (end -0.9525 -1.3589) (layer B.SilkS) (width 0.127)) + (fp_line (start 0 0.6985) (end 0 1.3589) (layer B.SilkS) (width 0.127)) + (fp_line (start -1.4986 0.6985) (end 1.4986 0.6985) (layer B.SilkS) (width 0.127)) + (fp_line (start 1.4986 0.6985) (end 1.4986 -0.6985) (layer B.SilkS) (width 0.127)) + (fp_line (start 1.4986 -0.6985) (end -1.4986 -0.6985) (layer B.SilkS) (width 0.127)) + (fp_line (start -1.4986 -0.6985) (end -1.4986 0.6985) (layer B.SilkS) (width 0.127)) + (pad 1 smd rect (at -0.9525 -1.05664 90) (size 0.59944 1.00076) (layers B.Cu) + (net 25 "Net-(Q4-Pad1)")) + (pad 2 smd rect (at 0 1.05664 90) (size 0.59944 1.00076) (layers B.Cu) + (net 21 /EIN_4)) + (pad 3 smd rect (at 0.9525 -1.05664 90) (size 0.59944 1.00076) (layers B.Cu) + (net 11 /IN_4)) + (model smd/smd_transistors/sot23.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer F.Cu) (tedit 5352F21C) (tstamp 535214DB) + (at 147.955 68.58 180) + (path /53525508) + (attr smd) + (fp_text reference R1 (at 0 -1.905 180) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_text value 0 (at 0 0.381 180) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906)) + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397) (layers F.Cu) + (net 3 /Vdpu)) + (pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397) (layers F.Cu) + (net 26 "Net-(R1-Pad2)")) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer F.Cu) (tedit 5352F217) (tstamp 535214E8) + (at 147.955 66.04 180) + (path /535259D3) + (attr smd) + (fp_text reference R2 (at 0 1.905 180) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_text value 0 (at 0 0.381 180) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906)) + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397) (layers F.Cu) + (net 2 GND)) + (pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397) (layers F.Cu) + (net 27 "Net-(R2-Pad2)")) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer B.Cu) (tedit 5352F213) (tstamp 535214F5) + (at 135.255 68.58) + (path /535259F4) + (attr smd) + (fp_text reference R3 (at 0 1.905) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_text value 0 (at 0 -0.381) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_circle (center -1.651 -0.762) (end -1.651 -0.635) (layer B.SilkS) (width 0.09906)) + (fp_line (start -0.508 -0.762) (end -1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -0.508 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 0.508 0.762) (end 1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask) + (net 3 /Vdpu)) + (pad 2 smd rect (at 0.9525 0) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask) + (net 28 "Net-(R3-Pad2)")) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer B.Cu) (tedit 5353102C) (tstamp 53521502) + (at 135.255 66.04) + (path /535259FF) + (attr smd) + (fp_text reference R4 (at 1.27 -1.905) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_text value 0 (at 0 -0.381) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_circle (center -1.651 -0.762) (end -1.651 -0.635) (layer B.SilkS) (width 0.09906)) + (fp_line (start -0.508 -0.762) (end -1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -0.508 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 0.508 0.762) (end 1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 2 smd rect (at 0.9525 0) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask) + (net 29 "Net-(R4-Pad2)")) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer F.Cu) (tedit 5352F22E) (tstamp 5352150F) + (at 150.495 76.2) + (path /53525A20) + (attr smd) + (fp_text reference R5 (at 0 -1.905) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_text value 0 (at 0 0.381) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906)) + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask) + (net 3 /Vdpu)) + (pad 2 smd rect (at 0.9525 0) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask) + (net 30 "Net-(R5-Pad2)")) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer F.Cu) (tedit 5352F22B) (tstamp 5352151C) + (at 150.495 78.74) + (path /53525A2B) + (attr smd) + (fp_text reference R6 (at 0 1.905) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_text value 0 (at 0 0.381) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906)) + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask) + (net 2 GND)) + (pad 2 smd rect (at 0.9525 0) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask) + (net 31 "Net-(R6-Pad2)")) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer F.Cu) (tedit 5352F214) (tstamp 53521529) + (at 135.255 68.58 180) + (path /535259E9) + (attr smd) + (fp_text reference R7 (at 0 -1.905 180) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_text value 0 (at 0 0.381 180) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906)) + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397) (layers F.Cu) + (net 32 "Net-(R7-Pad1)")) + (pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397) (layers F.Cu) + (net 3 /Vdpu)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer F.Cu) (tedit 5353102B) (tstamp 53521536) + (at 135.255 66.04 180) + (path /535259DE) + (attr smd) + (fp_text reference R8 (at -1.27 1.905 180) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_text value 0 (at 0 0.381 180) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906)) + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397) (layers F.Cu) + (net 33 "Net-(R8-Pad1)")) + (pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397) (layers F.Cu) + (net 2 GND)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer B.Cu) (tedit 5352F21F) (tstamp 53521543) + (at 147.955 68.58) + (path /53525A0A) + (attr smd) + (fp_text reference R9 (at 0 1.905) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_text value 0 (at 0 -0.381) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_circle (center -1.651 -0.762) (end -1.651 -0.635) (layer B.SilkS) (width 0.09906)) + (fp_line (start -0.508 -0.762) (end -1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -0.508 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 0.508 0.762) (end 1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask) + (net 34 "Net-(R9-Pad1)")) + (pad 2 smd rect (at 0.9525 0) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask) + (net 3 /Vdpu)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer B.Cu) (tedit 5352F21A) (tstamp 53521550) + (at 147.955 66.04) + (path /53525A15) + (attr smd) + (fp_text reference R10 (at 0 -1.905) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_text value 0 (at 0 -0.381) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_circle (center -1.651 -0.762) (end -1.651 -0.635) (layer B.SilkS) (width 0.09906)) + (fp_line (start -0.508 -0.762) (end -1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -0.508 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 0.508 0.762) (end 1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask) + (net 35 "Net-(R10-Pad1)")) + (pad 2 smd rect (at 0.9525 0) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer F.Cu) (tedit 5352F1F1) (tstamp 5352155D) + (at 163.195 76.2) + (path /53525A41) + (attr smd) + (fp_text reference R11 (at 0 -1.905) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_text value 0 (at 0 0.381) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906)) + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask) + (net 36 "Net-(R11-Pad1)")) + (pad 2 smd rect (at 0.9525 0) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask) + (net 3 /Vdpu)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer F.Cu) (tedit 5352F1ED) (tstamp 5352156A) + (at 163.195 78.74) + (path /53525A36) + (attr smd) + (fp_text reference R12 (at 0 1.905) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_text value 0 (at 0 0.381) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906)) + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask) + (net 37 "Net-(R12-Pad1)")) + (pad 2 smd rect (at 0.9525 0) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask) + (net 2 GND)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer F.Cu) (tedit 5352F181) (tstamp 53521577) + (at 135.89 91.44 180) + (path /5351D486) + (attr smd) + (fp_text reference R13 (at 0 -1.27 180) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_text value 10k (at 0 0.381 180) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906)) + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask) + (net 8 /IN_1)) + (pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask) + (net 7 /Vc)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer B.Cu) (tedit 5352F179) (tstamp 53521584) + (at 135.89 88.9 180) + (path /5351D5E7) + (attr smd) + (fp_text reference R14 (at 0 1.27 180) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_text value 10k (at 0 -0.381 180) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_circle (center -1.651 -0.762) (end -1.651 -0.635) (layer B.SilkS) (width 0.09906)) + (fp_line (start -0.508 -0.762) (end -1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -0.508 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 0.508 0.762) (end 1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask) + (net 9 /IN_2)) + (pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask) + (net 7 /Vc)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer F.Cu) (tedit 5352F16F) (tstamp 53521591) + (at 135.89 85.725 180) + (path /5351D61B) + (attr smd) + (fp_text reference R15 (at 0 -1.27 180) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_text value 10k (at 0 0.381 180) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906)) + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397) (layers F.Cu) + (net 10 /IN_3)) + (pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397) (layers F.Cu) + (net 7 /Vc)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer B.Cu) (tedit 5352F16B) (tstamp 5352159E) + (at 135.89 83.185 180) + (path /5351D64F) + (attr smd) + (fp_text reference R16 (at 0 1.27 180) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_text value 10k (at 0 -0.381 180) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_circle (center -1.651 -0.762) (end -1.651 -0.635) (layer B.SilkS) (width 0.09906)) + (fp_line (start -0.508 -0.762) (end -1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -0.508 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 0.508 0.762) (end 1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397) (layers B.Cu) + (net 11 /IN_4)) + (pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397) (layers B.Cu) + (net 7 /Vc)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer F.Cu) (tedit 5352F17C) (tstamp 535215AB) + (at 135.89 88.9) + (path /53525479) + (attr smd) + (fp_text reference R17 (at 0 -1.27) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_text value 10k (at 0 0.381) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906)) + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask) + (net 7 /Vc)) + (pad 2 smd rect (at 0.9525 0) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask) + (net 22 "Net-(Q1-Pad1)")) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer B.Cu) (tedit 5352F184) (tstamp 535215B8) + (at 135.89 91.44) + (path /5352546E) + (attr smd) + (fp_text reference R18 (at 0 1.27) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_text value 10k (at 0 -0.381) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_circle (center -1.651 -0.762) (end -1.651 -0.635) (layer B.SilkS) (width 0.09906)) + (fp_line (start -0.508 -0.762) (end -1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -0.508 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 0.508 0.762) (end 1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask) + (net 7 /Vc)) + (pad 2 smd rect (at 0.9525 0) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask) + (net 23 "Net-(Q2-Pad1)")) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer F.Cu) (tedit 5352F16D) (tstamp 535215C5) + (at 135.89 83.185) + (path /53525463) + (attr smd) + (fp_text reference R19 (at 0 -1.27) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_text value 10k (at 0 0.381) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906)) + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0) (size 0.889 1.397) (layers F.Cu) + (net 7 /Vc)) + (pad 2 smd rect (at 0.9525 0) (size 0.889 1.397) (layers F.Cu) + (net 24 "Net-(Q3-Pad1)")) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer B.Cu) (tedit 5352F176) (tstamp 535215D2) + (at 135.89 85.725) + (path /5351D649) + (attr smd) + (fp_text reference R20 (at 0 1.27) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_text value 10k (at 0 -0.381) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_circle (center -1.651 -0.762) (end -1.651 -0.635) (layer B.SilkS) (width 0.09906)) + (fp_line (start -0.508 -0.762) (end -1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -0.508 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 0.508 0.762) (end 1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0) (size 0.889 1.397) (layers B.Cu) + (net 7 /Vc)) + (pad 2 smd rect (at 0.9525 0) (size 0.889 1.397) (layers B.Cu) + (net 25 "Net-(Q4-Pad1)")) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer F.Cu) (tedit 5352F1AD) (tstamp 535215DF) + (at 144.145 90.17 90) + (path /535254A5) + (attr smd) + (fp_text reference R21 (at 0 1.905 90) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_text value 10k (at 0 0.381 90) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906)) + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask) + (net 18 /EIN_1)) + (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask) + (net 4 /Vipu)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer B.Cu) (tedit 5352F1B0) (tstamp 535215EC) + (at 144.145 90.17 90) + (path /5352549A) + (attr smd) + (fp_text reference R22 (at 0 0.3175 90) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_text value 10k (at 0 1.905 90) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_circle (center -1.651 -0.762) (end -1.651 -0.635) (layer B.SilkS) (width 0.09906)) + (fp_line (start -0.508 -0.762) (end -1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -0.508 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 0.508 0.762) (end 1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask) + (net 19 /EIN_2)) + (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers B.Cu B.Paste B.Mask) + (net 4 /Vipu)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer F.Cu) (tedit 5352F1A1) (tstamp 535215F9) + (at 144.145 84.455 270) + (path /5352548F) + (attr smd) + (fp_text reference R23 (at 0 -1.905 360) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_text value 10k (at 0 0.381 270) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906)) + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) (layers F.Cu) + (net 20 /EIN_3)) + (pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) (layers F.Cu) + (net 4 /Vipu)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer B.Cu) (tedit 5352F1A4) (tstamp 53521606) + (at 144.145 84.455 270) + (path /53525484) + (attr smd) + (fp_text reference R24 (at 0 0.3175 270) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_text value 10k (at 0 -1.905 360) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_circle (center -1.651 -0.762) (end -1.651 -0.635) (layer B.SilkS) (width 0.09906)) + (fp_line (start -0.508 -0.762) (end -1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -0.508 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 0.508 0.762) (end 1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 270) (size 0.889 1.397) (layers B.Cu) + (net 21 /EIN_4)) + (pad 2 smd rect (at 0.9525 0 270) (size 0.889 1.397) (layers B.Cu) + (net 4 /Vipu)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SOIC_Packages:SOIC-14_Narrow (layer F.Cu) (tedit 5352F133) (tstamp 5352161F) + (at 141.605 69.85 90) + (descr "module CMS SOJ 14 pins etroit") + (tags "CMS SOJ") + (path /5351D954) + (attr smd) + (fp_text reference U1 (at 5.715 -1.27 180) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value MCP42010 (at 0 0.635 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -4.6 0.6) (end -4.6 1.8) (layer F.SilkS) (width 0.2)) + (fp_line (start -4.6 -1.8) (end -4.6 -0.6) (layer F.SilkS) (width 0.2)) + (fp_arc (start -4.6 0) (end -4 0) (angle 90) (layer F.SilkS) (width 0.2)) + (fp_arc (start -4.6 0) (end -4.6 -0.6) (angle 90) (layer F.SilkS) (width 0.2)) + (fp_line (start -4.6 -1.8) (end 4.6 -1.8) (layer F.SilkS) (width 0.2)) + (fp_line (start 4.6 -1.8) (end 4.6 1.8) (layer F.SilkS) (width 0.2)) + (fp_line (start 4.6 1.8) (end -4.6 1.8) (layer F.SilkS) (width 0.2)) + (pad 1 smd rect (at -3.81 2.7 90) (size 0.6 1.5) (layers F.Cu) + (net 50 /CS_12)) + (pad 2 smd rect (at -2.54 2.7 90) (size 0.6 1.5) (layers F.Cu) + (net 5 /SCK)) + (pad 3 smd rect (at -1.27 2.7 90) (size 0.6 1.5) (layers F.Cu) + (net 6 /MOSI)) + (pad 4 smd rect (at 0 2.7 90) (size 0.6 1.5) (layers F.Cu) + (net 2 GND)) + (pad 5 smd rect (at 1.27 2.7 90) (size 0.6 1.5) (layers F.Cu) + (net 26 "Net-(R1-Pad2)")) + (pad 6 smd rect (at 2.54 2.7 90) (size 0.6 1.5) (layers F.Cu) + (net 12 /OUT1)) + (pad 7 smd rect (at 3.81 2.7 90) (size 0.6 1.5) (layers F.Cu) + (net 27 "Net-(R2-Pad2)")) + (pad 8 smd rect (at 3.81 -2.7 90) (size 0.6 1.5) (layers F.Cu) + (net 33 "Net-(R8-Pad1)")) + (pad 9 smd rect (at 2.54 -2.7 90) (size 0.6 1.5) (layers F.Cu) + (net 13 /OUT2)) + (pad 10 smd rect (at 1.27 -2.7 90) (size 0.6 1.5) (layers F.Cu) + (net 32 "Net-(R7-Pad1)")) + (pad 11 smd rect (at 0 -2.7 90) (size 0.6 1.5) (layers F.Cu) + (net 1 /Vd)) + (pad 12 smd rect (at -1.27 -2.7 90) (size 0.6 1.5) (layers F.Cu) + (net 1 /Vd)) + (pad 13 smd rect (at -2.54 -2.7 90) (size 0.6 1.5) (layers F.Cu)) + (pad 14 smd rect (at -3.81 -2.7 90) (size 0.6 1.5) (layers F.Cu) + (net 1 /Vd)) + (model smd/cms_so14.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.5 0.3 0.5)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SOIC_Packages:SOIC-14_Narrow (layer B.Cu) (tedit 5352F14B) (tstamp 53521638) + (at 141.605 69.85 90) + (descr "module CMS SOJ 14 pins etroit") + (tags "CMS SOJ") + (path /5351ED1B) + (attr smd) + (fp_text reference U2 (at 5.715 1.27 180) (layer B.SilkS) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value MCP42010 (at 0 -1.016 90) (layer B.SilkS) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start -4.6 -0.6) (end -4.6 -1.8) (layer B.SilkS) (width 0.2)) + (fp_line (start -4.6 1.8) (end -4.6 0.6) (layer B.SilkS) (width 0.2)) + (fp_arc (start -4.6 0) (end -4 0) (angle -90) (layer B.SilkS) (width 0.2)) + (fp_arc (start -4.6 0) (end -4.6 0.6) (angle -90) (layer B.SilkS) (width 0.2)) + (fp_line (start -4.6 1.8) (end 4.6 1.8) (layer B.SilkS) (width 0.2)) + (fp_line (start 4.6 1.8) (end 4.6 -1.8) (layer B.SilkS) (width 0.2)) + (fp_line (start 4.6 -1.8) (end -4.6 -1.8) (layer B.SilkS) (width 0.2)) + (pad 1 smd rect (at -3.81 -2.7 90) (size 0.6 1.5) (layers B.Cu B.Paste B.Mask) + (net 51 /CS_43)) + (pad 2 smd rect (at -2.54 -2.7 90) (size 0.6 1.5) (layers B.Cu B.Paste B.Mask) + (net 5 /SCK)) + (pad 3 smd rect (at -1.27 -2.7 90) (size 0.6 1.5) (layers B.Cu B.Paste B.Mask) + (net 6 /MOSI)) + (pad 4 smd rect (at 0 -2.7 90) (size 0.6 1.5) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 5 smd rect (at 1.27 -2.7 90) (size 0.6 1.5) (layers B.Cu B.Paste B.Mask) + (net 28 "Net-(R3-Pad2)")) + (pad 6 smd rect (at 2.54 -2.7 90) (size 0.6 1.5) (layers B.Cu B.Paste B.Mask) + (net 15 /OUT4)) + (pad 7 smd rect (at 3.81 -2.7 90) (size 0.6 1.5) (layers B.Cu B.Paste B.Mask) + (net 29 "Net-(R4-Pad2)")) + (pad 8 smd rect (at 3.81 2.7 90) (size 0.6 1.5) (layers B.Cu B.Paste B.Mask) + (net 35 "Net-(R10-Pad1)")) + (pad 9 smd rect (at 2.54 2.7 90) (size 0.6 1.5) (layers B.Cu B.Paste B.Mask) + (net 14 /OUT3)) + (pad 10 smd rect (at 1.27 2.7 90) (size 0.6 1.5) (layers B.Cu B.Paste B.Mask) + (net 34 "Net-(R9-Pad1)")) + (pad 11 smd rect (at 0 2.7 90) (size 0.6 1.5) (layers B.Cu B.Paste B.Mask) + (net 1 /Vd)) + (pad 12 smd rect (at -1.27 2.7 90) (size 0.6 1.5) (layers B.Cu B.Paste B.Mask) + (net 1 /Vd)) + (pad 13 smd rect (at -2.54 2.7 90) (size 0.6 1.5) (layers B.Cu B.Paste B.Mask)) + (pad 14 smd rect (at -3.81 2.7 90) (size 0.6 1.5) (layers B.Cu B.Paste B.Mask) + (net 1 /Vd)) + (model smd/cms_so14.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.5 0.3 0.5)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SOIC_Packages:SOIC-14_Narrow (layer F.Cu) (tedit 5352F1FD) (tstamp 53521651) + (at 156.845 74.93 270) + (descr "module CMS SOJ 14 pins etroit") + (tags "CMS SOJ") + (path /5351ED74) + (attr smd) + (fp_text reference U3 (at 5.715 0.635 360) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value MCP42010 (at 0 1.016 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -4.6 0.6) (end -4.6 1.8) (layer F.SilkS) (width 0.2)) + (fp_line (start -4.6 -1.8) (end -4.6 -0.6) (layer F.SilkS) (width 0.2)) + (fp_arc (start -4.6 0) (end -4 0) (angle 90) (layer F.SilkS) (width 0.2)) + (fp_arc (start -4.6 0) (end -4.6 -0.6) (angle 90) (layer F.SilkS) (width 0.2)) + (fp_line (start -4.6 -1.8) (end 4.6 -1.8) (layer F.SilkS) (width 0.2)) + (fp_line (start 4.6 -1.8) (end 4.6 1.8) (layer F.SilkS) (width 0.2)) + (fp_line (start 4.6 1.8) (end -4.6 1.8) (layer F.SilkS) (width 0.2)) + (pad 1 smd rect (at -3.81 2.7 270) (size 0.6 1.5) (layers F.Cu F.Paste F.Mask) + (net 53 /CS_87)) + (pad 2 smd rect (at -2.54 2.7 270) (size 0.6 1.5) (layers F.Cu F.Paste F.Mask) + (net 5 /SCK)) + (pad 3 smd rect (at -1.27 2.7 270) (size 0.6 1.5) (layers F.Cu F.Paste F.Mask) + (net 6 /MOSI)) + (pad 4 smd rect (at 0 2.7 270) (size 0.6 1.5) (layers F.Cu F.Paste F.Mask) + (net 2 GND)) + (pad 5 smd rect (at 1.27 2.7 270) (size 0.6 1.5) (layers F.Cu F.Paste F.Mask) + (net 30 "Net-(R5-Pad2)")) + (pad 6 smd rect (at 2.54 2.7 270) (size 0.6 1.5) (layers F.Cu F.Paste F.Mask) + (net 39 /OUT8)) + (pad 7 smd rect (at 3.81 2.7 270) (size 0.6 1.5) (layers F.Cu F.Paste F.Mask) + (net 31 "Net-(R6-Pad2)")) + (pad 8 smd rect (at 3.81 -2.7 270) (size 0.6 1.5) (layers F.Cu F.Paste F.Mask) + (net 37 "Net-(R12-Pad1)")) + (pad 9 smd rect (at 2.54 -2.7 270) (size 0.6 1.5) (layers F.Cu F.Paste F.Mask) + (net 38 /OUT7)) + (pad 10 smd rect (at 1.27 -2.7 270) (size 0.6 1.5) (layers F.Cu F.Paste F.Mask) + (net 36 "Net-(R11-Pad1)")) + (pad 11 smd rect (at 0 -2.7 270) (size 0.6 1.5) (layers F.Cu F.Paste F.Mask) + (net 1 /Vd)) + (pad 12 smd rect (at -1.27 -2.7 270) (size 0.6 1.5) (layers F.Cu F.Paste F.Mask) + (net 1 /Vd)) + (pad 13 smd rect (at -2.54 -2.7 270) (size 0.6 1.5) (layers F.Cu F.Paste F.Mask)) + (pad 14 smd rect (at -3.81 -2.7 270) (size 0.6 1.5) (layers F.Cu F.Paste F.Mask) + (net 1 /Vd)) + (model smd/cms_so14.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.5 0.3 0.5)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer B.Cu) (tedit 5352F224) (tstamp 5352BFD5) + (at 154.305 68.58) + (path /5352B651) + (attr smd) + (fp_text reference C4 (at 0 -1.905) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_text value 0.1uF (at 0 -0.381) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_circle (center -1.651 -0.762) (end -1.651 -0.635) (layer B.SilkS) (width 0.09906)) + (fp_line (start -0.508 -0.762) (end -1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -0.508 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 0.508 0.762) (end 1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0) (size 0.889 1.397) (layers B.Cu) + (net 1 /Vd)) + (pad 2 smd rect (at 0.9525 0) (size 0.889 1.397) (layers B.Cu) + (net 2 GND)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Pin_Headers:Pin_Header_Straight_2x10 (layer F.Cu) (tedit 53530F19) (tstamp 5352BFF5) + (at 170.18 76.2 270) + (descr "1 pin") + (tags "CONN DEV") + (path /5352BDDA) + (fp_text reference P10 (at -12.065 6.985 360) (layer F.SilkS) + (effects (font (size 1.27 1.27) (thickness 0.2032))) + ) + (fp_text value CONN_10X2 (at 0 0 270) (layer F.SilkS) hide + (effects (font (size 1.27 1.27) (thickness 0.2032))) + ) + (fp_line (start 12.7 -2.54) (end -12.7 -2.54) (layer F.SilkS) (width 0.254)) + (fp_line (start -10.16 2.54) (end 12.7 2.54) (layer F.SilkS) (width 0.254)) + (fp_line (start 12.7 -2.54) (end 12.7 2.54) (layer F.SilkS) (width 0.254)) + (fp_line (start -12.7 -2.54) (end -12.7 0) (layer F.SilkS) (width 0.254)) + (fp_line (start -12.7 2.54) (end -10.16 2.54) (layer F.SilkS) (width 0.254)) + (fp_line (start -12.7 0) (end -10.16 0) (layer F.SilkS) (width 0.254)) + (fp_line (start -10.16 0) (end -10.16 2.54) (layer F.SilkS) (width 0.254)) + (fp_line (start -12.7 2.54) (end -12.7 0) (layer F.SilkS) (width 0.254)) + (pad 1 thru_hole rect (at -11.43 1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 3 /Vdpu)) + (pad 2 thru_hole oval (at -11.43 -1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 3 /Vdpu)) + (pad 3 thru_hole oval (at -8.89 1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 12 /OUT1)) + (pad 4 thru_hole oval (at -8.89 -1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 12 /OUT1)) + (pad 5 thru_hole oval (at -6.35 1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 13 /OUT2)) + (pad 6 thru_hole oval (at -6.35 -1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 13 /OUT2)) + (pad 7 thru_hole oval (at -3.81 1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 14 /OUT3)) + (pad 8 thru_hole oval (at -3.81 -1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 14 /OUT3)) + (pad 9 thru_hole oval (at -1.27 1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 15 /OUT4)) + (pad 10 thru_hole oval (at -1.27 -1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 15 /OUT4)) + (pad 11 thru_hole oval (at 1.27 1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 16 /OUT5)) + (pad 12 thru_hole oval (at 1.27 -1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 16 /OUT5)) + (pad 13 thru_hole oval (at 3.81 1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 17 /OUT6)) + (pad 14 thru_hole oval (at 3.81 -1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 17 /OUT6)) + (pad 15 thru_hole oval (at 6.35 1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 38 /OUT7)) + (pad 16 thru_hole oval (at 6.35 -1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 38 /OUT7)) + (pad 17 thru_hole oval (at 8.89 1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 39 /OUT8)) + (pad 18 thru_hole oval (at 8.89 -1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 39 /OUT8)) + (pad 19 thru_hole oval (at 11.43 1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 2 GND)) + (pad 20 thru_hole oval (at 11.43 -1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 2 GND)) + (model Pin_Headers/Pin_Header_Straight_2x10.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Transistors_SMD:sot23 (layer F.Cu) (tedit 5352F26A) (tstamp 5352C003) + (at 157.48 84.455 270) + (descr SOT23) + (path /5352B8F0) + (attr smd) + (fp_text reference Q5 (at -1.905 -1.905 360) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.09906))) + ) + (fp_text value 2N7002 (at 0 0.09906 270) (layer F.SilkS) hide + (effects (font (size 0.50038 0.50038) (thickness 0.09906))) + ) + (fp_line (start 0.9525 0.6985) (end 0.9525 1.3589) (layer F.SilkS) (width 0.127)) + (fp_line (start -0.9525 0.6985) (end -0.9525 1.3589) (layer F.SilkS) (width 0.127)) + (fp_line (start 0 -0.6985) (end 0 -1.3589) (layer F.SilkS) (width 0.127)) + (fp_line (start -1.4986 -0.6985) (end 1.4986 -0.6985) (layer F.SilkS) (width 0.127)) + (fp_line (start 1.4986 -0.6985) (end 1.4986 0.6985) (layer F.SilkS) (width 0.127)) + (fp_line (start 1.4986 0.6985) (end -1.4986 0.6985) (layer F.SilkS) (width 0.127)) + (fp_line (start -1.4986 0.6985) (end -1.4986 -0.6985) (layer F.SilkS) (width 0.127)) + (pad 1 smd rect (at -0.9525 1.05664 270) (size 0.59944 1.00076) (layers F.Cu F.Paste F.Mask) + (net 41 "Net-(Q5-Pad1)")) + (pad 2 smd rect (at 0 -1.05664 270) (size 0.59944 1.00076) (layers F.Cu F.Paste F.Mask) + (net 40 /EIN_5)) + (pad 3 smd rect (at 0.9525 1.05664 270) (size 0.59944 1.00076) (layers F.Cu F.Paste F.Mask) + (net 42 /IN_5)) + (model smd/smd_transistors/sot23.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Transistors_SMD:sot23 (layer B.Cu) (tedit 5352F26C) (tstamp 5352C011) + (at 157.48 84.455 90) + (descr SOT23) + (path /5352B8FE) + (attr smd) + (fp_text reference Q6 (at 1.905 1.905 180) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.09906)) (justify mirror)) + ) + (fp_text value 2N7002 (at 0 -0.09906 90) (layer B.SilkS) hide + (effects (font (size 0.50038 0.50038) (thickness 0.09906)) (justify mirror)) + ) + (fp_line (start 0.9525 -0.6985) (end 0.9525 -1.3589) (layer B.SilkS) (width 0.127)) + (fp_line (start -0.9525 -0.6985) (end -0.9525 -1.3589) (layer B.SilkS) (width 0.127)) + (fp_line (start 0 0.6985) (end 0 1.3589) (layer B.SilkS) (width 0.127)) + (fp_line (start -1.4986 0.6985) (end 1.4986 0.6985) (layer B.SilkS) (width 0.127)) + (fp_line (start 1.4986 0.6985) (end 1.4986 -0.6985) (layer B.SilkS) (width 0.127)) + (fp_line (start 1.4986 -0.6985) (end -1.4986 -0.6985) (layer B.SilkS) (width 0.127)) + (fp_line (start -1.4986 -0.6985) (end -1.4986 0.6985) (layer B.SilkS) (width 0.127)) + (pad 1 smd rect (at -0.9525 -1.05664 90) (size 0.59944 1.00076) (layers B.Cu) + (net 43 "Net-(Q6-Pad1)")) + (pad 2 smd rect (at 0 1.05664 90) (size 0.59944 1.00076) (layers B.Cu) + (net 49 /EIN_6)) + (pad 3 smd rect (at 0.9525 -1.05664 90) (size 0.59944 1.00076) (layers B.Cu) + (net 44 /IN_6)) + (model smd/smd_transistors/sot23.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer B.Cu) (tedit 5352F1F5) (tstamp 5352C01E) + (at 163.195 76.2 180) + (path /5352B65F) + (attr smd) + (fp_text reference R25 (at 0 1.905 180) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_text value 0 (at 0 -0.381 180) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_circle (center -1.651 -0.762) (end -1.651 -0.635) (layer B.SilkS) (width 0.09906)) + (fp_line (start -0.508 -0.762) (end -1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -0.508 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 0.508 0.762) (end 1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397) (layers B.Cu) + (net 3 /Vdpu)) + (pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397) (layers B.Cu) + (net 45 "Net-(R25-Pad2)")) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer B.Cu) (tedit 5352F1F0) (tstamp 5352C02B) + (at 163.195 78.74 180) + (path /5352B665) + (attr smd) + (fp_text reference R26 (at 0 -1.905 180) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_text value 0 (at 0 -0.381 180) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_circle (center -1.651 -0.762) (end -1.651 -0.635) (layer B.SilkS) (width 0.09906)) + (fp_line (start -0.508 -0.762) (end -1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -0.508 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 0.508 0.762) (end 1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397) (layers B.Cu) + (net 2 GND)) + (pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397) (layers B.Cu) + (net 46 "Net-(R26-Pad2)")) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer B.Cu) (tedit 5352F231) (tstamp 5352C038) + (at 150.495 76.2 180) + (path /5352B671) + (attr smd) + (fp_text reference R27 (at 0 1.905 180) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_text value 0 (at 0 -0.381 180) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_circle (center -1.651 -0.762) (end -1.651 -0.635) (layer B.SilkS) (width 0.09906)) + (fp_line (start -0.508 -0.762) (end -1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -0.508 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 0.508 0.762) (end 1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397) (layers B.Cu) + (net 47 "Net-(R27-Pad1)")) + (pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397) (layers B.Cu) + (net 3 /Vdpu)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer B.Cu) (tedit 5352F234) (tstamp 5352C045) + (at 150.495 78.74 180) + (path /5352B66B) + (attr smd) + (fp_text reference R28 (at 0 -1.905 180) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_text value 0 (at 0 -0.381 180) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_circle (center -1.651 -0.762) (end -1.651 -0.635) (layer B.SilkS) (width 0.09906)) + (fp_line (start -0.508 -0.762) (end -1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -0.508 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 0.508 0.762) (end 1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397) (layers B.Cu) + (net 48 "Net-(R28-Pad1)")) + (pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397) (layers B.Cu) + (net 2 GND)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer F.Cu) (tedit 5352F24F) (tstamp 5352C052) + (at 153.035 85.725 180) + (path /5352B8F6) + (attr smd) + (fp_text reference R29 (at 3.175 0 180) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_text value 10k (at 0 0.381 180) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906)) + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask) + (net 42 /IN_5)) + (pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask) + (net 7 /Vc)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer B.Cu) (tedit 5352F253) (tstamp 5352C05F) + (at 153.035 83.185 180) + (path /5352B90A) + (attr smd) + (fp_text reference R30 (at 3.175 0 180) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_text value 10k (at 0 -0.381 180) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_circle (center -1.651 -0.762) (end -1.651 -0.635) (layer B.SilkS) (width 0.09906)) + (fp_line (start -0.508 -0.762) (end -1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -0.508 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 0.508 0.762) (end 1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 180) (size 0.889 1.397) (layers B.Cu) + (net 44 /IN_6)) + (pad 2 smd rect (at 0.9525 0 180) (size 0.889 1.397) (layers B.Cu) + (net 7 /Vc)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer F.Cu) (tedit 5352F255) (tstamp 5352C06C) + (at 153.035 83.185) + (path /5352B936) + (attr smd) + (fp_text reference R31 (at -3.175 0) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_text value 10k (at 0 0.381) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906)) + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask) + (net 7 /Vc)) + (pad 2 smd rect (at 0.9525 0) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask) + (net 41 "Net-(Q5-Pad1)")) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer B.Cu) (tedit 5352F251) (tstamp 5352C079) + (at 153.035 85.725) + (path /5352B904) + (attr smd) + (fp_text reference R32 (at -3.175 0) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_text value 10k (at 0 -0.381) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_circle (center -1.651 -0.762) (end -1.651 -0.635) (layer B.SilkS) (width 0.09906)) + (fp_line (start -0.508 -0.762) (end -1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -0.508 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 0.508 0.762) (end 1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0) (size 0.889 1.397) (layers B.Cu) + (net 7 /Vc)) + (pad 2 smd rect (at 0.9525 0) (size 0.889 1.397) (layers B.Cu) + (net 43 "Net-(Q6-Pad1)")) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer F.Cu) (tedit 5352F1CE) (tstamp 5352C086) + (at 161.29 84.455 90) + (path /5352B942) + (attr smd) + (fp_text reference R33 (at 0 1.905 90) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_text value 10k (at 0 0.381 90) (layer F.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922))) + ) + (fp_circle (center -1.651 0.762) (end -1.651 0.635) (layer F.SilkS) (width 0.09906)) + (fp_line (start -0.508 0.762) (end -1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -0.508 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask) + (net 40 /EIN_5)) + (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask) + (net 4 /Vipu)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SMD_Packages:SM0805 (layer B.Cu) (tedit 5352F1EA) (tstamp 5352C093) + (at 161.29 84.455 90) + (path /5352B93C) + (attr smd) + (fp_text reference R34 (at 0 1.905 270) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_text value 10k (at 0 -0.381 90) (layer B.SilkS) + (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror)) + ) + (fp_circle (center -1.651 -0.762) (end -1.651 -0.635) (layer B.SilkS) (width 0.09906)) + (fp_line (start -0.508 -0.762) (end -1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 -0.762) (end -1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start -1.524 0.762) (end -0.508 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 0.508 0.762) (end 1.524 0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 0.762) (end 1.524 -0.762) (layer B.SilkS) (width 0.09906)) + (fp_line (start 1.524 -0.762) (end 0.508 -0.762) (layer B.SilkS) (width 0.09906)) + (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers B.Cu) + (net 49 /EIN_6)) + (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers B.Cu) + (net 4 /Vipu)) + (model smd/chip_cms.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.1 0.1 0.1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SOIC_Packages:SOIC-14_Narrow (layer B.Cu) (tedit 5352F202) (tstamp 5352C0AC) + (at 156.845 74.93 270) + (descr "module CMS SOJ 14 pins etroit") + (tags "CMS SOJ") + (path /5352B616) + (attr smd) + (fp_text reference U4 (at 5.715 -0.635 360) (layer B.SilkS) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value MCP42010 (at 0 -1.016 270) (layer B.SilkS) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start -4.6 -0.6) (end -4.6 -1.8) (layer B.SilkS) (width 0.2)) + (fp_line (start -4.6 1.8) (end -4.6 0.6) (layer B.SilkS) (width 0.2)) + (fp_arc (start -4.6 0) (end -4 0) (angle -90) (layer B.SilkS) (width 0.2)) + (fp_arc (start -4.6 0) (end -4.6 0.6) (angle -90) (layer B.SilkS) (width 0.2)) + (fp_line (start -4.6 1.8) (end 4.6 1.8) (layer B.SilkS) (width 0.2)) + (fp_line (start 4.6 1.8) (end 4.6 -1.8) (layer B.SilkS) (width 0.2)) + (fp_line (start 4.6 -1.8) (end -4.6 -1.8) (layer B.SilkS) (width 0.2)) + (pad 1 smd rect (at -3.81 -2.7 270) (size 0.6 1.5) (layers B.Cu) + (net 52 /CS_56)) + (pad 2 smd rect (at -2.54 -2.7 270) (size 0.6 1.5) (layers B.Cu) + (net 5 /SCK)) + (pad 3 smd rect (at -1.27 -2.7 270) (size 0.6 1.5) (layers B.Cu) + (net 6 /MOSI)) + (pad 4 smd rect (at 0 -2.7 270) (size 0.6 1.5) (layers B.Cu) + (net 2 GND)) + (pad 5 smd rect (at 1.27 -2.7 270) (size 0.6 1.5) (layers B.Cu) + (net 45 "Net-(R25-Pad2)")) + (pad 6 smd rect (at 2.54 -2.7 270) (size 0.6 1.5) (layers B.Cu) + (net 16 /OUT5)) + (pad 7 smd rect (at 3.81 -2.7 270) (size 0.6 1.5) (layers B.Cu) + (net 46 "Net-(R26-Pad2)")) + (pad 8 smd rect (at 3.81 2.7 270) (size 0.6 1.5) (layers B.Cu) + (net 48 "Net-(R28-Pad1)")) + (pad 9 smd rect (at 2.54 2.7 270) (size 0.6 1.5) (layers B.Cu) + (net 17 /OUT6)) + (pad 10 smd rect (at 1.27 2.7 270) (size 0.6 1.5) (layers B.Cu) + (net 47 "Net-(R27-Pad1)")) + (pad 11 smd rect (at 0 2.7 270) (size 0.6 1.5) (layers B.Cu) + (net 1 /Vd)) + (pad 12 smd rect (at -1.27 2.7 270) (size 0.6 1.5) (layers B.Cu) + (net 1 /Vd)) + (pad 13 smd rect (at -2.54 2.7 270) (size 0.6 1.5) (layers B.Cu)) + (pad 14 smd rect (at -3.81 2.7 270) (size 0.6 1.5) (layers B.Cu) + (net 1 /Vd)) + (model smd/cms_so14.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.5 0.3 0.5)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Pin_Headers:Pin_Header_Straight_2x09 (layer F.Cu) (tedit 5353102F) (tstamp 5352BEAA) + (at 128.27 82.55 270) + (descr "1 pin") + (tags "CONN DEV") + (path /5352E339) + (fp_text reference P2 (at -19.05 -6.35 360) (layer F.SilkS) + (effects (font (size 1.27 1.27) (thickness 0.2032))) + ) + (fp_text value CONN_9X2 (at 0 0 270) (layer F.SilkS) hide + (effects (font (size 1.27 1.27) (thickness 0.2032))) + ) + (fp_line (start 11.43 -2.54) (end -11.43 -2.54) (layer F.SilkS) (width 0.254)) + (fp_line (start -8.89 2.54) (end 11.43 2.54) (layer F.SilkS) (width 0.254)) + (fp_line (start 11.43 -2.54) (end 11.43 2.54) (layer F.SilkS) (width 0.254)) + (fp_line (start -11.43 -2.54) (end -11.43 0) (layer F.SilkS) (width 0.254)) + (fp_line (start -11.43 2.54) (end -8.89 2.54) (layer F.SilkS) (width 0.254)) + (fp_line (start -11.43 0) (end -8.89 0) (layer F.SilkS) (width 0.254)) + (fp_line (start -8.89 0) (end -8.89 2.54) (layer F.SilkS) (width 0.254)) + (fp_line (start -11.43 2.54) (end -11.43 0) (layer F.SilkS) (width 0.254)) + (pad 1 thru_hole rect (at -10.16 1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 2 GND)) + (pad 2 thru_hole oval (at -10.16 -1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 2 GND)) + (pad 3 thru_hole oval (at -7.62 1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 5 /SCK)) + (pad 4 thru_hole oval (at -7.62 -1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 6 /MOSI)) + (pad 5 thru_hole oval (at -5.08 1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 50 /CS_12)) + (pad 6 thru_hole oval (at -5.08 -1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 51 /CS_43)) + (pad 7 thru_hole oval (at -2.54 1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 52 /CS_56)) + (pad 8 thru_hole oval (at -2.54 -1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 53 /CS_87)) + (pad 9 thru_hole oval (at 0 1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 2 GND)) + (pad 10 thru_hole oval (at 0 -1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 2 GND)) + (pad 11 thru_hole oval (at 2.54 1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 7 /Vc)) + (pad 12 thru_hole oval (at 2.54 -1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 7 /Vc)) + (pad 13 thru_hole oval (at 5.08 1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 44 /IN_6)) + (pad 14 thru_hole oval (at 5.08 -1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 42 /IN_5)) + (pad 15 thru_hole oval (at 7.62 1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 11 /IN_4)) + (pad 16 thru_hole oval (at 7.62 -1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 10 /IN_3)) + (pad 17 thru_hole oval (at 10.16 1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 9 /IN_2)) + (pad 18 thru_hole oval (at 10.16 -1.27 270) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + 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159.545 76.2) (end 162.2425 76.2) (width 0.254) (layer B.Cu) (net 45) (status 30)) + (segment (start 159.545 78.74) (end 162.2425 78.74) (width 0.254) (layer B.Cu) (net 46) (status 30)) + (segment (start 154.145 76.2) (end 151.4475 76.2) (width 0.254) (layer B.Cu) (net 47) (status 30)) + (segment (start 154.145 78.74) (end 151.4475 78.74) (width 0.254) (layer B.Cu) (net 48) (status 30)) + (segment (start 161.29 85.4075) (end 158.8081 85.4075) (width 0.254) (layer B.Cu) (net 49) (status 10)) + (segment (start 158.8081 85.4075) (end 158.5366 85.136) (width 0.254) (layer B.Cu) (net 49)) + (segment (start 158.5366 84.455) (end 158.5366 85.136) (width 0.254) (layer B.Cu) (net 49) (status 10)) + (segment (start 163.83 88.9251) (end 161.29 86.3851) (width 0.254) (layer B.Cu) (net 49)) + (segment (start 161.29 86.3851) (end 161.29 85.4075) (width 0.254) (layer B.Cu) (net 49) (status 20)) + (segment (start 163.83 90.17) (end 163.83 88.9251) (width 0.254) (layer B.Cu) (net 49) (status 10)) + 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130.7849 77.47) (width 0.254) (layer B.Cu) (net 51) (status 10)) + (segment (start 134.5949 73.66) (end 130.7849 77.47) (width 0.254) (layer B.Cu) (net 51)) + (segment (start 138.905 73.66) (end 134.5949 73.66) (width 0.254) (layer B.Cu) (net 51) (status 10)) + (segment (start 149.6718 73.0495) (end 141.4163 81.305) (width 0.254) (layer F.Cu) (net 52)) + (segment (start 141.4163 81.305) (end 129.0731 81.305) (width 0.254) (layer F.Cu) (net 52)) + (segment (start 129.0731 81.305) (end 128.2449 80.4768) (width 0.254) (layer F.Cu) (net 52)) + (segment (start 128.2449 80.4768) (end 128.2449 80.01) (width 0.254) (layer F.Cu) (net 52)) + (segment (start 127 80.01) (end 128.2449 80.01) (width 0.254) (layer F.Cu) (net 52) (status 10)) + (segment (start 149.6718 73.0495) (end 149.6718 69.7736) (width 0.254) (layer B.Cu) (net 52)) + (segment (start 149.6718 69.7736) (end 152.4613 66.9841) (width 0.254) (layer B.Cu) (net 52)) + (segment (start 152.4613 66.9841) (end 156.2257 66.9841) (width 0.254) (layer B.Cu) (net 52)) + (segment (start 156.2257 66.9841) (end 159.545 70.3034) (width 0.254) (layer B.Cu) (net 52)) + (segment (start 159.545 70.3034) (end 159.545 71.12) (width 0.254) (layer B.Cu) (net 52) (status 20)) + (via (at 149.6718 73.0495) (size 0.889) (layers F.Cu B.Cu) (net 52)) + (segment (start 153.0137 71.12) (end 151.91 72.2237) (width 0.254) (layer F.Cu) (net 53)) + (segment (start 151.91 72.2237) (end 149.3299 72.2237) (width 0.254) (layer F.Cu) (net 53)) + (segment (start 149.3299 72.2237) (end 141.5436 80.01) (width 0.254) (layer F.Cu) (net 53)) + (segment (start 141.5436 80.01) (end 129.54 80.01) (width 0.254) (layer F.Cu) (net 53) (status 20)) + (segment (start 154.145 71.12) (end 153.0137 71.12) (width 0.254) (layer F.Cu) (net 53) (status 10)) + +) diff --git a/hardware/Stimulator/Stimulator.net b/hardware/Stimulator/Stimulator.net new file mode 100644 index 0000000000..2d26aced6d --- /dev/null +++ b/hardware/Stimulator/Stimulator.net @@ -0,0 +1,679 @@ +(export (version D) + (design + (source /home/yubuntu/Stimulator/Stimulator.sch) + (date "Sat 19 Apr 2014 17:20:49 CDT") + (tool "Eeschema (2014-04-17 BZR 4805)-product")) + (components + (comp (ref Q1) + (value 2N7002) + (libsource (lib ECUStimS) (part 2N7002)) + (sheetpath (names /) (tstamps /)) + (tstamp 5351D41F)) + (comp (ref R13) + (value 10k) + (libsource (lib device) (part R)) + (sheetpath (names /) (tstamps /)) + (tstamp 5351D486)) + (comp (ref Q2) + (value 2N7002) + (libsource (lib ECUStimS) (part 2N7002)) + (sheetpath (names /) (tstamps /)) + (tstamp 5351D5DB)) + (comp (ref R14) + (value 10k) + (libsource (lib device) (part R)) + (sheetpath (names /) (tstamps /)) + (tstamp 5351D5E7)) + (comp (ref Q3) + (value 2N7002) + (libsource (lib ECUStimS) (part 2N7002)) + (sheetpath (names /) (tstamps /)) + (tstamp 5351D60F)) + (comp (ref R15) + (value 10k) + (libsource (lib device) (part R)) + (sheetpath (names /) (tstamps /)) + (tstamp 5351D61B)) + (comp (ref Q4) + (value 2N7002) + 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+RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=ECUStimS diff --git a/hardware/Stimulator/Stimulator.sch b/hardware/Stimulator/Stimulator.sch new file mode 100644 index 0000000000..1417dbfa41 --- /dev/null +++ b/hardware/Stimulator/Stimulator.sch @@ -0,0 +1,1470 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac 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a/hardware/Stimulator/Stimulator.xml b/hardware/Stimulator/Stimulator.xml new file mode 100644 index 0000000000..5fc7a5a6eb --- /dev/null +++ b/hardware/Stimulator/Stimulator.xml @@ -0,0 +1,716 @@ + + + + /home/yubuntu/Stimulator/Stimulator.sch + Sat 19 Apr 2014 00:39:45 CDT + Eeschema (2014-04-17 BZR 4805)-product + + + + 2N7002 + + + 5351D41F + + + 10k + + + 5351D486 + + + CONN_1 + + + 5351D4F3 + + + 2N7002 + + + 5351D5DB + + + 10k + + + 5351D5E7 + + + 2N7002 + + + 5351D60F + + + 10k + + + 5351D61B + + + 2N7002 + + + 5351D643 + + + 10k + + + 5351D649 + + + 10k + + + 5351D64F + + + MCP42010 + + + 5351D954 + + + CONN_1 + + + 5351D9E0 + + + 0.1uF + + + 5351DBB7 + + + CONN_1 + + + 5351DDAE + + + MCP42010 + + + 5351ED1B + + + MCP42010 + + + 5351ED74 + + + CONN_8X2 + + + 5351EEB7 + + + CONN_6X2 + + + 5351EE53 + + + CONN_1 + + + 53522B97 + + + CONN_3X2 + + + 535248BF + + + CONN_7X2 + + + 535248CC + + + CONN_1 + + + 53524ABB + + + 10k + + + 53525463 + + + 10k + + + 5352546E + + + 10k + + + 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-0,0 +1,3 @@ +EESchema-DOCLIB Version 2.0 +# +#End Doc Library diff --git a/hardware/brain_board/Pcb.pdf b/hardware/brain_board/Pcb.pdf new file mode 100644 index 0000000000..7aeaad6da0 Binary files /dev/null and b/hardware/brain_board/Pcb.pdf differ diff --git a/hardware/mazda_b_case/B3_ECU_PCB.dwg b/hardware/mazda_b_case/B3_ECU_PCB.dwg new file mode 100644 index 0000000000..6a753fefe9 Binary files /dev/null and b/hardware/mazda_b_case/B3_ECU_PCB.dwg differ diff --git a/hardware/power_supply_kb1gtt/PWR_buck_12V_switcher_PCB.pdf b/hardware/power_supply_kb1gtt/PWR_buck_12V_switcher_PCB.pdf new file mode 100644 index 0000000000..ffddf60c22 Binary files /dev/null and b/hardware/power_supply_kb1gtt/PWR_buck_12V_switcher_PCB.pdf differ diff --git a/hardware/rusefi_lib/TCPL_PCC-SMP.mod b/hardware/rusefi_lib/TCPL_PCC-SMP.mod new file mode 100644 index 0000000000..42ab274107 --- /dev/null +++ b/hardware/rusefi_lib/TCPL_PCC-SMP.mod @@ -0,0 +1,64 @@ +PCBNEW-LibModule-V1 4/25/2014 4:11:07 AM +# encoding utf-8 +Units mm +$INDEX +tcpl_PCC-SMP +$EndINDEX +$MODULE tcpl_PCC-SMP +Po 0 0 0 15 4FEEF30D 00000000 ~~ +Li tcpl_PCC-SMP +Sc 0 +AR /4E3EBB39 +Op 0 0 0 +T0 -1.778 9.779 1.524 1.524 0 0.3048 N I 21 N "TCPL1" +T1 -1.5748 4.699 1.524 1.524 900 0.3048 N V 21 N "TCPL" +T2 1.016 2.54 1.524 1.524 900 0.3048 N V 21 N "-" +T2 1.016 -2.54 1.524 1.524 0 0.3048 N V 21 N "+" +DS -3.0988 7.74954 -9.25068 7.74954 0.381 21 +DS -9.25068 7.74954 -9.25068 2.75082 0.381 21 +DS -9.25068 2.75082 -3.1496 2.75082 0.381 21 +DS -3.1496 -2.75082 -9.25068 -2.79908 0.381 21 +DS -9.25068 -2.79908 -9.25068 -7.74954 0.381 21 +DS -9.25068 -7.74954 -3.1496 -7.74954 0.381 21 +DS 5.95122 7.74954 5.95122 -7.74954 0.381 21 +DS 7.54888 -7.74954 7.54888 7.74954 0.381 21 +DS -3.1496 -7.74954 11.54938 -7.74954 0.381 21 +DS -3.1496 7.74954 -3.1496 -7.74954 0.381 21 +DS 11.54938 7.74954 -3.1496 7.74954 0.381 21 +DS 11.54938 -7.74954 11.54938 7.74954 0.381 21 +$PAD +Sh "M" C 2.99974 2.99974 0 0 0 +Dr 1.77038 0 0 +At STD N 00E0FFFF +Ne 0 "" +Po 6.74878 -7.8994 +$EndPAD +$PAD +Sh "M" C 2.99974 2.99974 0 0 0 +Dr 1.77038 0 0 +At STD N 00E0FFFF +Ne 0 "" +Po 6.74878 7.8994 +$EndPAD +$PAD +Sh "2" C 2.99974 2.99974 0 0 0 +Dr 1.77038 0 0 +At STD N 00E0FFFF +Ne 1 "/TCPL_interface/TCPL+" +Po -6.74878 -6.79958 +$EndPAD +$PAD +Sh "1" C 2.99974 2.99974 0 0 0 +Dr 1.77038 0 0 +At STD N 00E0FFFF +Ne 2 "/TCPL_interface/TCPL-" +Po -6.74878 6.79958 +$EndPAD +$SHAPE3D +Na "3D/TCPL_CONNECTOR_PCC-SMP.wrl" +Sc 10 10 10 +Of 0.46 0.315 -0.17 +Ro 0 0 180 +$EndSHAPE3D +$EndMODULE tcpl_PCC-SMP +$EndLIBRARY diff --git a/hardware/thermocouiple_module/thermocouple_module.csv b/hardware/thermocouiple_module/thermocouple_module.csv new file mode 100644 index 0000000000..84fe9e460b --- /dev/null +++ b/hardware/thermocouiple_module/thermocouple_module.csv @@ -0,0 +1,8 @@ +10nF,1,"C21",SM0603 +100nF,1,"C8",SM0603 +CONN_1,1,"P2",SIL-1 +CONN_2,1,"P4",SIL-2 +CONN_4,1,"P3",SIL-4 +CONN_2,1,"P1",tcpl_PCC-SMP +MAX31855KASA,1,"U5",SO8E,MAX31855KASA+ +VIA,2,"V801 V802",1pin diff --git a/hardware/thermocouiple_module/thermocouple_module.kicad_pcb b/hardware/thermocouiple_module/thermocouple_module.kicad_pcb new file mode 100644 index 0000000000..f73d5999c2 --- /dev/null +++ b/hardware/thermocouiple_module/thermocouple_module.kicad_pcb @@ -0,0 +1,679 @@ +(kicad_pcb (version 3) (host pcbnew "(2013-07-07 BZR 4022)-stable") + + (general + (links 13) + (no_connects 0) + (area 93.7768 56.5658 124.877288 94.6912) + (thickness 1.6002) + (drawings 15) + (tracks 42) + (zones 0) + (modules 9) + (nets 8) + ) + + (page A4) + (layers + (15 Front signal) + (0 Back signal) + (16 B.Adhes user) + (17 F.Adhes user) + (18 B.Paste user) + (19 F.Paste user) + (20 B.SilkS user) + (21 F.SilkS user) + (22 B.Mask user) + (23 F.Mask user) + (24 Dwgs.User user) + (25 Cmts.User user) + (26 Eco1.User user) + (27 Eco2.User user) + (28 Edge.Cuts user) + ) + + (setup + (last_trace_width 0.3048) + (user_trace_width 0.381) + (user_trace_width 0.508) + (user_trace_width 0.635) + (user_trace_width 1.016) + (trace_clearance 0.3048) + (zone_clearance 0.3048) + (zone_45_only no) + (trace_min 0.00762) + (segment_width 0.381) + (edge_width 0.381) + (via_size 0.508) + (via_drill 0.381) + (via_min_size 0.02032) + (via_min_drill 0.381) + (user_via 1.00076 0.89916) + (uvia_size 0.508) + (uvia_drill 0.127) + (uvias_allowed no) + (uvia_min_size 0.02032) + (uvia_min_drill 0.127) + (pcb_text_width 0.3048) + (pcb_text_size 1.524 2.032) + (mod_edge_width 0.254) + (mod_text_size 1.524 1.524) + (mod_text_width 0.3048) + (pad_size 0.762 1.27) + (pad_drill 0) + (pad_to_mask_clearance 0.254) + (aux_axis_origin 0 0) + (visible_elements FFFFFFBF) + (pcbplotparams + (layerselection 284983297) + (usegerberextensions true) + (excludeedgelayer true) + (linewidth 0.150000) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15) + (hpglpenoverlay 0) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue false) + (plotothertext false) + (plotinvisibletext false) + (padsonsilk false) + (subtractmaskfromsilk false) + (outputformat 1) + (mirror false) + (drillshape 1) + (scaleselection 1) + (outputdirectory gerbers/gerbers_Spin2/)) + ) + + (net 0 "") + (net 1 //CS) + (net 2 /MISO) + (net 3 /SCK) + (net 4 /TCPL+) + (net 5 /TCPL-) + (net 6 3.3v) + (net 7 GND) + + (net_class Default "This is the default net class." + (clearance 0.3048) + (trace_width 0.3048) + (via_dia 0.508) + (via_drill 0.381) + (uvia_dia 0.508) + (uvia_drill 0.127) + (add_net "") + (add_net //CS) + (add_net /MISO) + (add_net /SCK) + (add_net /TCPL+) + (add_net /TCPL-) + (add_net 3.3v) + (add_net GND) + ) + + (module 1pin (layer Front) (tedit 4F629911) (tstamp 4F628E0D) + (at 98.87712 65.29578) + (descr "module 1 pin (ou trou mecanique de percage)") + (tags DEV) + (path /4F629521) + (fp_text reference V802 (at 0 -3.048) (layer F.SilkS) hide + (effects (font (size 1.016 1.016) (thickness 0.254))) + ) + (fp_text value VIA (at 0 2.794) (layer F.SilkS) hide + (effects (font (size 1.016 1.016) (thickness 0.254))) + ) + (pad 1 thru_hole circle (at 0 0) (size 4.064 4.064) (drill 3.048) + (layers *.Cu *.Mask F.SilkS) + ) + ) + + (module 1pin (layer Front) (tedit 4F629903) (tstamp 4F6280CB) + (at 110.871 65.151) + (descr "module 1 pin (ou trou mecanique de percage)") + (tags DEV) + (path /4F627FCA) + (fp_text reference V801 (at 0 -3.048) (layer F.SilkS) hide + (effects (font (size 1.016 1.016) (thickness 0.254))) + ) + (fp_text value VIA (at 0 2.794) (layer F.SilkS) hide + (effects (font (size 1.016 1.016) (thickness 0.254))) + ) + (pad 1 thru_hole circle (at 0 0) (size 4.064 4.064) (drill 3.048) + (layers *.Cu *.Mask F.SilkS) + ) + ) + + (module SO8E (layer Front) (tedit 4F661D77) (tstamp 4E47F42B) + (at 104.87914 65.6971) + (descr "module CMS SOJ 8 pins etroit") + (tags "CMS SOJ") + (path /4E13FF86) + (attr smd) + (fp_text reference U5 (at 0 -0.889) (layer F.SilkS) + (effects (font (size 1.143 1.143) (thickness 0.1524))) + ) + (fp_text value MAX31855KASA (at 1.16586 1.1049) (layer F.SilkS) + (effects (font (size 0.635 0.635) (thickness 0.127))) + ) + (fp_line (start -2.667 1.778) (end -2.667 1.905) (layer F.SilkS) (width 0.127)) + (fp_line (start -2.667 1.905) (end 2.667 1.905) (layer F.SilkS) (width 0.127)) + (fp_line (start 2.667 -1.905) (end -2.667 -1.905) (layer F.SilkS) (width 0.127)) + (fp_line (start -2.667 -1.905) (end -2.667 1.778) (layer F.SilkS) (width 0.127)) + (fp_line (start -2.667 -0.508) (end -2.159 -0.508) (layer F.SilkS) (width 0.127)) + (fp_line (start -2.159 -0.508) (end -2.159 0.508) (layer F.SilkS) (width 0.127)) + (fp_line (start -2.159 0.508) (end -2.667 0.508) (layer F.SilkS) (width 0.127)) + (fp_line (start 2.667 -1.905) (end 2.667 1.905) (layer F.SilkS) (width 0.127)) + (pad 8 smd rect (at -1.905 -2.667) (size 0.508 1.143) + (layers Front F.Paste F.Mask) + ) + (pad 1 smd rect (at -1.905 2.667) (size 0.508 1.143) + (layers Front F.Paste F.Mask) + (net 7 GND) + ) + (pad 7 smd rect (at -0.635 -2.667) (size 0.508 1.143) + (layers Front F.Paste F.Mask) + (net 2 /MISO) + ) + (pad 6 smd rect (at 0.635 -2.667) (size 0.508 1.143) + (layers Front F.Paste F.Mask) + (net 1 //CS) + ) + (pad 5 smd rect (at 1.905 -2.667) (size 0.508 1.143) + (layers Front F.Paste F.Mask) + (net 3 /SCK) + ) + (pad 2 smd rect (at -0.635 2.667) (size 0.508 1.143) + (layers Front F.Paste F.Mask) + (net 5 /TCPL-) + ) + (pad 3 smd rect (at 0.635 2.667) (size 0.508 1.143) + (layers Front F.Paste F.Mask) + (net 4 /TCPL+) + ) + (pad 4 smd rect (at 1.905 2.667) (size 0.508 1.143) + (layers Front F.Paste F.Mask) + (net 6 3.3v) + ) + (model 3D/so-8.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SM0603 (layer Back) (tedit 535A1FEF) (tstamp 4E47F455) + (at 105.283 66.04 180) + (path /4E13FFE2) + (attr smd) + (fp_text reference C8 (at 0.635 1.397 180) (layer B.SilkS) + (effects (font (size 0.508 0.4572) (thickness 0.1143)) (justify mirror)) + ) + (fp_text value 100nF (at 0 0 180) (layer B.SilkS) hide + (effects (font (size 0.508 0.4572) (thickness 0.1143)) (justify mirror)) + ) + (fp_line (start -1.143 0.635) (end 1.143 0.635) (layer B.SilkS) (width 0.127)) + (fp_line (start 1.143 0.635) (end 1.143 -0.635) (layer B.SilkS) (width 0.127)) + (fp_line (start 1.143 -0.635) (end -1.143 -0.635) (layer B.SilkS) (width 0.127)) + (fp_line (start -1.143 -0.635) (end -1.143 0.635) (layer B.SilkS) (width 0.127)) + (pad 1 smd rect (at -0.762 0 180) (size 0.635 1.143) + (layers Back B.Paste B.Mask) + (net 6 3.3v) + ) + (pad 2 smd rect (at 0.762 0 180) (size 0.635 1.143) + (layers Back B.Paste B.Mask) + (net 7 GND) + ) + (model smd/resistors/R0603.wrl + (at (xyz 0 0 0.001)) + (scale (xyz 0.5 0.5 0.5)) + (rotate (xyz 0 0 0)) + ) + ) + + (module SM0603 (layer Front) (tedit 4F661D32) (tstamp 4E4C6BB1) + (at 104.87914 70.49516) + (path /4E4C6B54) + (attr smd) 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mode 100644 index 0000000000..9a367c597f --- /dev/null +++ b/hardware/thermocouiple_module/thermocouple_module.net @@ -0,0 +1,168 @@ +(export (version D) + (design + (source C:\Users\owner\Desktop\daecu\Hardware\trunk\rusefi.com\thermocouiple_module\thermocouple_module.sch) + (date "4/25/2014 4:57:35 AM") + (tool "eeschema (2013-07-07 BZR 4022)-stable")) + (components + (comp (ref V802) + (value VIA) + (footprint 1pin) + (libsource (lib thermocouple_module-cache) (part VIA)) + (sheetpath (names /) (tstamps /)) + (tstamp 4F629521)) + (comp (ref V801) + (value VIA) + (footprint 1pin) + (libsource (lib thermocouple_module-cache) (part VIA)) + (sheetpath (names /) (tstamps /)) + (tstamp 4F627FCA)) + (comp (ref C21) + (value 10nF) + (footprint SM0603) + (libsource (lib device) (part C)) + (sheetpath (names /) (tstamps /)) + (tstamp 4E4C6B54)) + (comp (ref C8) + (value 100nF) + (footprint SM0603) + (libsource (lib device) (part C)) + (sheetpath (names /) (tstamps /)) + (tstamp 4E13FFE2)) + (comp (ref U5) + (value MAX31855KASA) + (footprint SO8E) + (fields + (field (name mfg#) MAX31855JASA+)) + (libsource (lib max31855) (part MAX31855)) + (sheetpath (names /) (tstamps /)) + (tstamp 4E13FF86)) + (comp (ref P1) + (value CONN_2) + (footprint tcpl_PCC-SMP) + (libsource (lib conn) (part CONN_2)) + (sheetpath (names /) (tstamps /)) + (tstamp 535A15DB)) + (comp (ref P3) + (value CONN_4) + (footprint SIL-4) + (libsource (lib conn) (part CONN_4)) + (sheetpath (names /) (tstamps /)) + (tstamp 535A166C)) + (comp (ref P2) + (value CONN_1) + (footprint SIL-1) + (libsource (lib conn) (part CONN_1)) + (sheetpath (names /) (tstamps /)) + (tstamp 535A1737)) + (comp (ref P4) + (value CONN_2) + (footprint SIL-2) + (libsource (lib conn) (part CONN_2)) + (sheetpath (names /) (tstamps /)) + (tstamp 535A1B1D))) + (libparts + (libpart (lib device) (part C) + (description "Condensateur non polarise") + (footprints + (fp SM*) + (fp C?) + (fp C1-1)) + (fields + (field (name Reference) C) + (field (name Value) C) + (field (name Footprint) ~) + (field (name Datasheet) ~)) + (pins + (pin (num 1) (name ~) (type passive)) + (pin (num 2) (name ~) (type passive)))) + (libpart (lib conn) (part CONN_1) + (description "1 pin") + (fields + (field (name Reference) P) + (field (name Value) CONN_1)) + (pins + (pin (num 1) (name 1) (type passive)))) + (libpart (lib conn) (part CONN_2) + (description "Symbole general de connecteur") + (fields + (field (name Reference) P) + (field (name Value) CONN_2)) + (pins + (pin (num 1) (name P1) (type passive)) + (pin (num 2) (name PM) (type passive)))) + (libpart (lib conn) (part CONN_4) + (description "Symbole general de connecteur") + (fields + (field (name Reference) P) + (field (name Value) CONN_4)) + (pins + (pin (num 1) (name P1) (type passive)) + (pin (num 2) (name P2) (type passive)) + (pin (num 3) (name P3) (type passive)) + (pin (num 4) (name P4) (type passive)))) + (libpart (lib max31855) (part MAX31855) + (fields + (field (name Reference) U) + (field (name Value) MAX31855) + (field (name Footprint) ~) + (field (name Datasheet) ~)) + (pins + (pin (num 1) (name GND) (type BiDi)) + (pin (num 2) (name T-) (type BiDi)) + (pin (num 3) (name T+) (type BiDi)) + (pin (num 4) (name VCC) (type BiDi)) + (pin (num 5) (name SCK) (type BiDi)) + (pin (num 6) (name /CS) (type BiDi)) + (pin (num 7) (name SO) (type BiDi)) + (pin (num 8) (name DNC) (type BiDi)))) + (libpart (lib thermocouple_module-cache) (part VIA) + (fields + (field (name Reference) V) + (field (name Value) VIA) + (field (name Footprint) ~) + (field (name Datasheet) ~)) + (pins + (pin (num 1) (name Via) (type passive))))) + (libraries + (library (logical device) + (uri "C:\\Program Files (x86)\\KiCad\\share\\library\\device.lib")) + (library (logical conn) + (uri "C:\\Program Files (x86)\\KiCad\\share\\library\\conn.lib")) + (library (logical max31855) + (uri ..\rusefi_lib\max31855.lib)) + (library (logical thermocouple_module-cache) + (uri C:\Users\owner\Desktop\daecu\Hardware\trunk\rusefi.com\thermocouiple_module\thermocouple_module-cache.lib))) + (nets + (net (code 1) (name /MISO) + (node (ref U5) (pin 7)) + (node (ref P3) (pin 1))) + (net (code 2) (name "") + (node (ref U5) (pin 8))) + (net (code 3) (name /SCK) + (node (ref U5) (pin 5)) + (node (ref P3) (pin 3))) + (net (code 4) (name //CS) + (node (ref U5) (pin 6)) + (node (ref P3) (pin 2))) + (net (code 5) (name "") + (node (ref V802) (pin 1))) + (net (code 6) (name "") + (node (ref V801) (pin 1))) + (net (code 7) (name /TCPL+) + (node (ref C21) (pin 2)) + (node (ref P4) (pin 1)) + (node (ref P1) (pin 2)) + (node (ref U5) (pin 3))) + (net (code 8) (name /TCPL-) + (node (ref P1) (pin 1)) + (node (ref C21) (pin 1)) + (node (ref U5) (pin 2)) + (node (ref P4) (pin 2))) + (net (code 9) (name GND) + (node (ref U5) (pin 1)) + (node (ref C8) (pin 2)) + (node (ref P2) (pin 1))) + (net (code 10) (name 3.3v) + (node (ref U5) (pin 4)) + (node (ref P3) (pin 4)) + (node (ref C8) (pin 1))))) \ No newline at end of file diff --git a/hardware/thermocouiple_module/thermocouple_module.pro b/hardware/thermocouiple_module/thermocouple_module.pro new file mode 100644 index 0000000000..43fb62c5d4 --- /dev/null +++ b/hardware/thermocouiple_module/thermocouple_module.pro @@ -0,0 +1,84 @@ +update=4/25/2014 4:16:35 AM +version=1 +last_client=pcbnew +[general] +version=1 +RootSch= +BoardNm= +[cvpcb] +version=1 +NetIExt=net +[cvpcb/libraries] +EquName1=devcms +[eeschema] +version=1 +LibDir=../rusefi_lib +NetFmtName= +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=max31855 +[pcbnew] +version=1 +LastNetListRead=thermocouple_module.net +UseCmpFile=0 +PadDrill=0.000000000000 +PadDrillOvalY=0.000000000000 +PadSizeH=0.762000000000 +PadSizeV=1.270000000000 +PcbTextSizeV=2.032000000000 +PcbTextSizeH=1.524000000000 +PcbTextThickness=0.304800000000 +ModuleTextSizeV=1.524000000000 +ModuleTextSizeH=1.524000000000 +ModuleTextSizeThickness=0.304800000000 +SolderMaskClearance=0.254000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.381000000000 +BoardOutlineThickness=0.381000000000 +ModuleOutlineThickness=0.254000000000 +[pcbnew/libraries] +LibDir=../rusefi_lib +LibName1=sockets +LibName2=connect +LibName3=discret +LibName4=pin_array +LibName5=divers +LibName6=libcms +LibName7=display +LibName8=valves +LibName9=led +LibName10=dip_sockets +LibName11=TCPL_PCC-SMP diff --git a/hardware/thermocouiple_module/thermocouple_module.sch b/hardware/thermocouiple_module/thermocouple_module.sch new file mode 100644 index 0000000000..73eab30925 --- /dev/null +++ b/hardware/thermocouiple_module/thermocouple_module.sch @@ -0,0 +1,240 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:max31855 +LIBS:thermocouple_module-cache +EELAYER 27 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "Electronic Industrial Temperature Interface (EITI)" +Date "25 apr 2014" +Rev ".001" +Comp "Mrk Industries" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +NoConn ~ 4075 4350 +NoConn ~ 3875 4350 +$Comp +L VIA V802 +U 1 1 4F629521 +P 3875 4350 +F 0 "V802" V 3900 4450 20 0000 C CNN +F 1 "VIA" H 3875 4550 60 0001 C CNN +F 2 "1pin" H 3875 4650 60 0001 C CNN +F 3 "" H 3875 4350 60 0001 C CNN + 1 3875 4350 + 0 1 1 0 +$EndComp +Text Notes 3900 4950 0 40 ~ 0 +We want a big mass of copper in the\nTCPL joints, to dampen the cold junction\ntemperature and to make it more measurable\nwith this IC +Text Notes 3725 4450 0 40 ~ 0 +Via for cable tie +$Comp +L VIA V801 +U 1 1 4F627FCA +P 4075 4350 +F 0 "V801" V 4100 4450 20 0000 C CNN +F 1 "VIA" H 4075 4550 60 0001 C CNN +F 2 "1pin" H 4075 4350 60 0001 C CNN +F 3 "" H 4075 4350 60 0001 C CNN + 1 4075 4350 + 0 1 1 0 +$EndComp +Connection ~ 4800 4650 +Wire Wire Line + 4800 4550 4800 4650 +Wire Wire Line + 4700 4050 5150 4050 +Wire Wire Line + 5150 4050 5150 4350 +Wire Wire Line + 5150 4350 5400 4350 +Wire Wire Line + 4700 4650 5150 4650 +Wire Wire Line + 5150 4650 5150 4450 +Wire Wire Line + 5150 4450 5400 4450 +Wire Wire Line + 4800 4150 4800 4050 +Connection ~ 4800 4050 +$Comp +L C C21 +U 1 1 4E4C6B54 +P 4800 4350 +F 0 "C21" H 4850 4450 50 0000 L CNN +F 1 "10nF" H 4850 4250 50 0000 L CNN +F 2 "SM0603" H 4850 4350 50 0001 C CNN +F 3 "" H 4800 4350 60 0001 C CNN + 1 4800 4350 + 1 0 0 -1 +$EndComp +Text Notes 7250 4350 0 30 ~ 0 +Care must be taken with the conector\nchosen for the TCPL to avoid inaccuracies.\n\nAlso, the connector must be as close as\npossible to the cold-juntion compensation. +Text Notes 5500 3650 0 40 ~ 0 +MAX31855\nCold-Junction Compensated\nThermocouple-to-Digital Converter +Text Notes 5600 4900 0 30 ~ 0 +Datasheet:\nhttp://datasheets.maxim-ic.com/en/ds/MAX31855.pdf +NoConn ~ 6500 4250 +$Comp +L GND #PWR01 +U 1 1 4E13FFF9 +P 7000 4000 +F 0 "#PWR01" H 7000 4000 30 0001 C CNN +F 1 "GND" H 7000 3930 30 0001 C CNN +F 2 "" H 7000 4000 60 0001 C CNN +F 3 "" H 7000 4000 60 0001 C CNN + 1 7000 4000 + 1 0 0 -1 +$EndComp +Text GLabel 7000 3600 0 40 Input ~ 0 +3.3v +$Comp +L C C8 +U 1 1 4E13FFE2 +P 7000 3800 +F 0 "C8" H 7050 3900 50 0000 L CNN +F 1 "100nF" H 7050 3700 50 0000 L CNN +F 2 "SM0603" H 7050 3800 50 0001 C CNN +F 3 "" H 7000 3800 60 0001 C CNN + 1 7000 3800 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 4E13FFDB +P 5400 4250 +F 0 "#PWR02" H 5400 4250 30 0001 C CNN +F 1 "GND" H 5400 4180 30 0001 C CNN +F 2 "" H 5400 4250 60 0001 C CNN +F 3 "" H 5400 4250 60 0001 C CNN + 1 5400 4250 + 1 0 0 -1 +$EndComp +Text GLabel 5400 4550 0 40 Input ~ 0 +3.3v +$Comp +L MAX31855 U5 +U 1 1 4E13FF86 +P 5950 4400 +F 0 "U5" H 5950 4650 60 0000 C CNN +F 1 "MAX31855KASA" H 5950 4150 60 0000 C CNN +F 2 "SO8E" H 5950 4200 60 0001 C CNN +F 3 "" H 5950 4400 60 0001 C CNN +F 4 "MAX31855KASA+" H 5950 4400 60 0001 C CNN "mfg#" + 1 5950 4400 + 1 0 0 -1 +$EndComp +$Comp +L CONN_2 P1 +U 1 1 535A15DB +P 4350 4350 +F 0 "P1" V 4300 4350 40 0000 C CNN +F 1 "CONN_2" V 4400 4350 40 0000 C CNN +F 2 "tcpl_PCC-SMP" H 4350 4350 60 0001 C CNN +F 3 "" H 4350 4350 60 0000 C CNN + 1 4350 4350 + -1 0 0 -1 +$EndComp +Wire Wire Line + 4700 4450 4700 4650 +Wire Wire Line + 4700 4250 4700 4050 +$Comp +L CONN_4 P3 +U 1 1 535A166C +P 7100 4550 +F 0 "P3" V 7050 4550 50 0000 C CNN +F 1 "CONN_4" V 7150 4550 50 0000 C CNN +F 2 "SIL-4" H 7100 4550 60 0001 C CNN +F 3 "" H 7100 4550 60 0000 C CNN + 1 7100 4550 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6500 4350 6500 4400 +Wire Wire Line + 6500 4400 6750 4400 +Wire Wire Line + 6500 4450 6500 4500 +Wire Wire Line + 6500 4500 6750 4500 +Wire Wire Line + 6500 4550 6500 4600 +Wire Wire Line + 6500 4600 6750 4600 +Wire Wire Line + 5400 4550 5400 4700 +Wire Wire Line + 5400 4700 6750 4700 +$Comp +L CONN_1 P2 +U 1 1 535A1737 +P 5400 4100 +F 0 "P2" H 5480 4100 40 0000 L CNN +F 1 "CONN_1" H 5400 4155 30 0001 C CNN +F 2 "SIL-1" H 5400 4100 60 0001 C CNN +F 3 "" H 5400 4100 60 0000 C CNN + 1 5400 4100 + 0 -1 -1 0 +$EndComp +Connection ~ 5400 4250 +$Comp +L CONN_2 P4 +U 1 1 535A1B1D +P 4350 3650 +F 0 "P4" V 4300 3650 40 0000 C CNN +F 1 "CONN_2" V 4400 3650 40 0000 C CNN +F 2 "SIL-2" H 4350 3650 60 0001 C CNN +F 3 "" H 4350 3650 60 0000 C CNN + 1 4350 3650 + -1 0 0 1 +$EndComp +Text Label 4700 4250 1 40 ~ 0 +TCPL- +Text Label 4700 4650 1 40 ~ 0 +TCPL+ +Text Label 4700 3550 0 40 ~ 0 +TCPL- +Text Label 4700 3750 0 40 ~ 0 +TCPL+ +Text Label 6500 4350 2 40 ~ 0 +MISO +Text Label 6500 4450 2 40 ~ 0 +/CS +Text Label 6500 4550 2 40 ~ 0 +SCK +$EndSCHEMATC