frankenso progress
This commit is contained in:
parent
83d45f79a0
commit
e44e8d8039
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@ -1059,10 +1059,10 @@ NoConn ~ 6850 4650
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Text Label 12425 4475 1 60 ~ 0
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12V-SWITCH
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$Comp
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L GND #PWR0187
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L GND #PWR0188
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U 1 1 58A6F0E6
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P 12425 4575
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F 0 "#PWR0187" H 12425 4575 30 0001 C CNN
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F 0 "#PWR0188" H 12425 4575 30 0001 C CNN
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F 1 "GND" H 12425 4505 30 0001 C CNN
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F 2 "" H 12425 4575 60 0000 C CNN
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F 3 "" H 12425 4575 60 0000 C CNN
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@ -1070,10 +1070,10 @@ F 3 "" H 12425 4575 60 0000 C CNN
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1 0 0 -1
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$EndComp
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$Comp
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L GND #PWR0188
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L GND #PWR0189
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U 1 1 58A6F179
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P 12425 5175
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F 0 "#PWR0188" H 12425 5175 30 0001 C CNN
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F 0 "#PWR0189" H 12425 5175 30 0001 C CNN
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F 1 "GND" H 12425 5105 30 0001 C CNN
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F 2 "" H 12425 5175 60 0000 C CNN
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F 3 "" H 12425 5175 60 0000 C CNN
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@ -1086,4 +1086,69 @@ Text Notes 4300 10400 0 60 ~ 0
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See below links about barriers in GND planes. The current loops in the layout do not appear to need barriers. \n\nhttp://rusefi.com/wiki/index.php?title=Manual:Hardware:PCB_design_rules\nhttp://www.maximintegrated.com/en/app-notes/index.mvp/id/5450
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Text GLabel 2525 9200 2 60 Input ~ 0
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12V-SNUB
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$Comp
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L MINI-USB-5P-3400020P1 test_module1501
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U 1 1 592613E7
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P 11025 7750
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F 0 "test_module1501" H 11025 8200 60 0000 C CNN
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F 1 "MINI-USB_RCTP_V-T_B_and_HW-MU-5F-23" V 11025 7750 50 0001 C CNN
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F 2 "rusEFI_LIB:MINI-USB_RCTP_V-T_B_and_HW-MU-5F-23" H 11025 7750 60 0001 C CNN
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F 3 "" H 11025 7750 60 0000 C CNN
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1 11025 7750
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1 0 0 -1
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$EndComp
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$Comp
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L CONN_01X01 P1502
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U 1 1 59261A29
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P 11425 7700
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F 0 "P1502" H 11625 7700 50 0000 C CNN
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F 1 "CONN_01X01" V 11525 7700 50 0001 C CNN
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F 2 "Pin_Headers:Pin_Header_Straight_1x01_Pitch1.27mm" H 11425 7700 50 0001 C CNN
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F 3 "" H 11425 7700 50 0000 C CNN
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1 11425 7700
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1 0 0 -1
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$EndComp
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$Comp
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L CONN_01X02 P1504
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U 1 1 59261B2F
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P 11425 8050
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F 0 "P1504" H 11625 8050 50 0000 C CNN
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F 1 "CONN_01X01" V 11525 8050 50 0001 C CNN
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F 2 "Pin_Headers:Pin_Header_Straight_1x02_Pitch1.27mm" H 11425 8050 50 0001 C CNN
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F 3 "" H 11425 8050 50 0000 C CNN
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1 11425 8050
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1 0 0 1
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$EndComp
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$Comp
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L CONN_01X02 P1501
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U 1 1 5926248F
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P 11425 7550
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F 0 "P1501" H 11625 7550 50 0000 C CNN
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F 1 "CONN_01X01" V 11525 7550 50 0001 C CNN
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F 2 "Pin_Headers:Pin_Header_Straight_1x02_Pitch1.27mm" H 11425 7550 50 0001 C CNN
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F 3 "" H 11425 7550 50 0000 C CNN
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1 11425 7550
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1 0 0 -1
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$EndComp
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$Comp
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L CONN_01X02 P1503
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U 1 1 59262549
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P 11425 7850
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F 0 "P1503" H 11625 7850 50 0000 C CNN
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F 1 "CONN_01X01" V 11525 7850 50 0001 C CNN
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F 2 "Pin_Headers:Pin_Header_Straight_1x02_Pitch1.27mm" H 11425 7850 50 0001 C CNN
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F 3 "" H 11425 7850 50 0000 C CNN
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1 11425 7850
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1 0 0 1
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$EndComp
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Text Label 11225 8100 2 60 ~ 0
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GND
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Wire Notes Line
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10550 7200 11850 7200
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Wire Notes Line
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11850 7200 11850 8200
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Wire Notes Line
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11850 8200 10550 8200
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Wire Notes Line
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10550 8200 10550 7200
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$EndSCHEMATC
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@ -76,6 +76,7 @@ P57 P58 ,2,CONN_8X2,Pin_Headers:Pin_Header_Straight_1x08_Pitch2.54mm,
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P604 P605 P606 P607 ,4,CONN_3,PIN_ARRAY_3X1,
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P15 P24 P25 P26 P59 P60 P61 P62 P63 P64 P65 P66 P67 P68 P69 P70 P71 P72 P73 P74 P75 P76 P77 ,23,CONN_1,Pin_Headers:Pin_Header_Straight_1x01_Pitch2.00mm,,DO NOT POPULATE,DNP,DO NOT POPULATE,DNP,,,,,,,,,,,,,
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P14 P7 P8 ,3,pin_array_12x2,pin_array_12x2,,dnp,dnp,dnp,dnp,,,,,,,,,,,,,
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P701 ,1,CONN_01X04,Pin_Headers:Pin_Header_Straight_1x05_Pitch1.27mm,
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P10 P1002 P101 P11 P12 P13 P16 P17 P18 P19 P20 P21 P22 P23 P30 P51 P52 P6 P9 P901 P902 W63 W64 ,23,CONN_1,SIL-1,,DO NOT POPULATE,DNP,DO NOT POPULATE,DNP,,,,,,,,,,,,,
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P99 ,1,176122-6_2ND,176122-6_2nd,DOCUMENTATION,TE,176122-6,DIGI,176122-6_2ND,,,,,,,,,,,,,
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Q1001 ,1,20V,SOT23,,Vishay,SQ2301ES-T1-GE3,Newark,64T4128,,,,,Mouser,78-SQ2301ES-T1_GE3,,,,,,,,
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Load Diff
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Load Diff
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@ -1,4 +1,4 @@
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update=5/6/2017 8:11:09 PM
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update=5/7/2017 11:59:23 AM
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version=1
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last_client=kicad
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[cvpcb]
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@ -93,7 +93,7 @@ PageLayoutDescrFile=../rusefi_lib/Border.kicad_wks
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PlotDirectoryName=
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SubpartIdSeparator=0
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SubpartFirstId=65
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NetFmtName=
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NetFmtName=Pcbnew
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SpiceForceRefPrefix=0
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SpiceUseNetNumbers=0
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LabSize=60
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@ -62,7 +62,7 @@ $Descr B 17000 11000
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encoding utf-8
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Sheet 1 15
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Title "frankenso"
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Date "2017-04-22"
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Date "2017-05-07"
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Rev "0.5"
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Comp "rusEFI.com"
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Comment1 ""
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Binary file not shown.
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@ -420,6 +420,7 @@ Reference, Value, Footprint, Datasheet, MFG,MFG#, VEND1,VEND1#, Field4, Field5,
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"W701","TEST","SM0805_jumper","","DNP,DNP","DNP,DNP","","","","","","","","","","","","",""
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"W702","TEST","SM0805","","DNP,DNP","DNP,DNP","","","","","","","","","","","","",""
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"W703","TEST","SM0805","","DNP,DNP","DNP,DNP","","","","","","","","","","","","",""
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"P701","CONN_01X04","Pin_Headers:Pin_Header_Straight_1x05_Pitch1.27mm",""
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"C104","0.1uF","SM0805","","AVX,08055C104KAT2A","DIGI,478-1395-1-ND","","","","","","","","","","","","",""
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"R107","5k","SM0805","","STACKPOLE,RNCP0805FTD4K99","DIGI,RNCP0805FTD4K99CT-ND","","","","","","","","","","","","",""
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"R102","5k","SM0805","","STACKPOLE,RNCP0805FTD4K99","DIGI,RNCP0805FTD4K99CT-ND","","","","","","","","","","","","",""
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Can't render this file because it has a wrong number of fields in line 2.
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@ -147,6 +147,9 @@
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144) RESOLVED IN R0.5 HL7 & HL8 silkscreen is missing
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145) RESOLVED IN R0.4.3 HI/LO net names are confusing, and jumbled.
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146) RESOLVED IN R0.5 HI/LO 2 silk screen is on wrong harness pin.
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147) RESOLVED IN R0.5 Add 232 TX and RX connection points for external MAX232 or equiv chip SEE P701
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For honda add-on / rewiring board
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-- Add 2A high side solinoid drive for VTec sol
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@ -267,8 +267,6 @@ F 5 "DIGI,768-1007-2-ND" V 1130 3425 60 0001 C CNN "VEND1,VEND1#"
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1 5975 2850
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1 0 0 -1
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$EndComp
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NoConn ~ 6875 2350
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NoConn ~ 6875 2450
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$Comp
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L GND #PWR097
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U 1 1 52A5A5A0
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@ -382,9 +380,9 @@ Wire Wire Line
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3975 3025 3975 2950
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Connection ~ 3975 2950
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Wire Wire Line
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7025 2250 6875 2250
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7175 2250 6875 2250
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Wire Wire Line
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6875 2150 7025 2150
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6875 2150 7175 2150
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Wire Wire Line
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3875 5000 3700 5000
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Wire Wire Line
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@ -526,9 +524,9 @@ Text HLabel 3875 5200 2 60 Input ~ 0
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SPI_MISO
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Wire Wire Line
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3700 5100 3900 5100
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Text HLabel 7025 2250 2 60 Input ~ 0
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Text HLabel 7175 2250 2 60 Input ~ 0
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USART_RX
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Text HLabel 7025 2150 2 60 Input ~ 0
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Text HLabel 7175 2150 2 60 Input ~ 0
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USART_TX
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$Comp
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L MINI-USB-5P-3400020P1 J352
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@ -844,4 +842,28 @@ F 3 "" H 2750 1675 60 0000 C CNN
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1 2750 1675
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0 1 1 0
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$EndComp
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$Comp
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L CONN_01X05 P701
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U 1 1 591101CE
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P 7075 2250
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F 0 "P701" H 7100 2575 50 0000 C CNN
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F 1 "CONN_01X04" V 7175 2250 50 0001 C CNN
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F 2 "Pin_Headers:Pin_Header_Straight_1x05_Pitch1.27mm" H 7075 2250 50 0001 C CNN
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F 3 "" H 7075 2250 50 0000 C CNN
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1 7075 2250
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1 0 0 -1
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$EndComp
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Connection ~ 6875 2250
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Connection ~ 6875 2150
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$Comp
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L GND #PWR0108
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U 1 1 5911FDF1
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P 6875 2050
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F 0 "#PWR0108" H 6875 2050 30 0001 C CNN
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F 1 "GND" H 6875 1980 30 0001 C CNN
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F 2 "" H 6875 2050 60 0001 C CNN
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F 3 "" H 6875 2050 60 0001 C CNN
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1 6875 2050
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0 1 1 0
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$EndComp
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$EndSCHEMATC
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