STM32F7.ld has 768 hard-coded

This commit is contained in:
rusefillc 2024-06-07 02:19:54 -04:00 committed by rusefillc
parent 4378eb4d18
commit edd9e5ca83
8 changed files with 4 additions and 11 deletions

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@ -30,9 +30,6 @@ DDEFS += -DTRIGGER_SCOPE
ifeq ($(PROJECT_CPU),ARCH_STM32F7)
DDEFS += -DSTATIC_BOARD_ID=STATIC_BOARD_ID_ALPHAX_4CHAN_F7
# TODO: why do I struggle to fit into flash? compare with Proteus
#Linker options, flash size
USE_OPT += -Wl,--defsym=FLASH_SIZE=768k
# TODO do we only support serial on F7 but not UART?
DDEFS += -DEFI_CONSOLE_TX_BRAIN_PIN=Gpio::D6 -DEFI_CONSOLE_RX_BRAIN_PIN=Gpio::D5
DDEFS += -DTS_PRIMARY_UxART_PORT=SD2 -DEFI_TS_PRIMARY_IS_SERIAL=TRUE -DSTM32_SERIAL_USE_USART2=TRUE -DSTM32_UART_USE_USART2=FALSE

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@ -12,7 +12,6 @@ DDEFS += -DADC_MUX_PIN=Gpio::B3
include $(BOARDS_DIR)/hellen/hellen-common144.mk
ifeq ($(PROJECT_CPU),ARCH_STM32F7)
# TODO: why do I struggle to fit into flash? compare with Proteus
DDEFS += -DCH_DBG_ENABLE_ASSERTS=FALSE
DDEFS += -DENABLE_PERF_TRACE=FALSE
else ifeq ($(PROJECT_CPU),ARCH_STM32F4)

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@ -14,10 +14,8 @@ LED_CRITICAL_ERROR_BRAIN_PIN = -DLED_CRITICAL_ERROR_BRAIN_PIN=H176_MCU_MEGA_LED1
include $(BOARDS_DIR)/hellen/hellen-common176.mk
ifeq ($(PROJECT_CPU),ARCH_STM32F7)
# TODO: why do I struggle to fit into flash? compare with Proteus
DDEFS += -DCH_DBG_ENABLE_ASSERTS=FALSE
DDEFS += -DENABLE_PERF_TRACE=FALSE
USE_OPT += -Wl,--defsym=FLASH_SIZE=768k
else ifeq ($(PROJECT_CPU),ARCH_STM32F4)
# This board has trigger scope hardware!
DDEFS += -DTRIGGER_SCOPE

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@ -15,7 +15,7 @@ DDEFS += -DBOARD_MC33810_COUNT=1
DDEFS += -DCH_DBG_ENABLE_ASSERTS=FALSE
DDEFS += -DENABLE_PERF_TRACE=FALSE
USE_OPT += -Wl,--defsym=FLASH_SIZE=768k
# Add them all together

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@ -2,5 +2,5 @@ SHORT_BOARD_NAME=hellen154hyundai_f7
PROJECT_CPU=ARCH_STM32F7
_USE_OPENBLT=yes
EXTRA_PARAMS=-DEFI_LUA=FALSE -DEFI_LUA_LOOKUP=FALSE
_DEBUG_LEVEL_OPT=-O0 -ggdb -g -Wl,--defsym=FLASH_SIZE=768k
_DEBUG_LEVEL_OPT=-O0 -ggdb -g
_INCLUDE_ELF=yes

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@ -49,7 +49,6 @@ DDEFS += -DSTM32_SERIAL_USE_USART3=TRUE
DDEFS += -DHW_MICRO_RUSEFI=1
ifeq ($(PROJECT_CPU),ARCH_STM32F7)
USE_OPT += -Wl,--defsym=FLASH_SIZE=768k
DDEFS += -DSTATIC_BOARD_ID=STATIC_BOARD_ID_MRE_F7
else ifeq ($(PROJECT_CPU),ARCH_STM32F4)
DDEFS += -DSTATIC_BOARD_ID=STATIC_BOARD_ID_MRE_F4

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@ -3,6 +3,6 @@ PROJECT_CPU=ARCH_STM32F7
USE_FATFS=no
__OOOPS_NO_MULTI_LINE_SYNTAX_HERE?!
EXTRA_PARAMS=-DSTM32F767xx -DEFI_INJECTOR_PIN3=Gpio::Unassigned -DSTM32_HSE_BYPASS=TRUE -DEFI_ENABLE_ASSERTS=FALSE -DCH_DBG_ENABLE_CHECKS=FALSE -DCH_DBG_ENABLE_ASSERTS=FALSE -DCH_DBG_ENABLE_STACK_CHECK=FALSE -DCH_DBG_FILL_THREADS=FALSE -DCH_DBG_THREADS_PROFILING=FALSE -DEFI_LUA=FALSE -DEFI_HPFP=FALSE -DEFI_ALTERNATOR_CONTROL=FALSE -DEFI_LOGIC_ANALYZER=FALSE
DEBUG_LEVEL_OPT=-O0 -ggdb -g -Wl,--defsym=FLASH_SIZE=768k
DEBUG_LEVEL_OPT=-O0 -ggdb -g
INCLUDE_ELF=yes
SKIP_RATE=50

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@ -1,6 +1,6 @@
SHORT_BOARD_NAME=proteus_f7
PROJECT_CPU=ARCH_STM32F7
EXTRA_PARAMS=-DEFI_ENABLE_ASSERTS=FALSE -DCH_DBG_ENABLE_CHECKS=FALSE -DCH_DBG_ENABLE_ASSERTS=FALSE -DCH_DBG_ENABLE_STACK_CHECK=FALSE -DCH_DBG_FILL_THREADS=FALSE -DCH_DBG_THREADS_PROFILING=FALSE -DEFI_LUA=FALSE -DEFI_HPFP=FALSE -DEFI_ALTERNATOR_CONTROL=FALSE -DEFI_LOGIC_ANALYZER=FALSE -DEFI_TOOTH_LOGGER=FALSE -DRAMDISK_INVALID
DEBUG_LEVEL_OPT=-O0 -ggdb -g -Wl,--defsym=FLASH_SIZE=768k
DEBUG_LEVEL_OPT=-O0 -ggdb -g
INCLUDE_ELF=yes
SKIP_RATE=0