197 lines
3.8 KiB
C
197 lines
3.8 KiB
C
/*
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* @file config/boards/kinetis/rusefi_hw_enums.h
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*
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* @date Jun 2, 2019
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* @author Andrey Belomutskiy, (c) 2012-2020
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* @author andreika <prometheus.pcb@gmail.com>
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*/
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#ifndef RUSEFI_HW_ENUMS_H_
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#define RUSEFI_HW_ENUMS_H_
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// todo: migrate/unify with pin_output_mode_e? rename? something is messy here
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// this enum is currently only used for SPI pins
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typedef enum __attribute__ ((__packed__)) {
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// todo: here we have a rare example of stm32-specific enum, todo: make this not stm32 specific?
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PO_DEFAULT = 0,
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PO_OPENDRAIN = 4, // PAL_STM32_OTYPE_OPENDRAIN
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PO_PULLUP = 32, // PAL_STM32_PUDR_PULLUP
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PO_PULLDOWN = 64 // PAL_STM32_PUPDR_PULLDOWN
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} pin_mode_e;
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/**
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* Hardware pin. This enum is platform-specific.
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*/
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typedef enum __attribute__ ((__packed__)) {
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GPIO_UNASSIGNED = 0,
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GPIO_INVALID = 1,
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GPIOA_0 = 2,
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GPIOA_1 = 3,
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GPIOA_2 = 4,
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GPIOA_3 = 5,
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GPIOA_4 = 6,
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GPIOA_5 = 7,
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GPIOA_6 = 8,
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GPIOA_7 = 9,
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GPIOA_8 = 10,
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GPIOA_9 = 11,
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GPIOA_10 = 12,
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GPIOA_11 = 13,
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GPIOA_12 = 14,
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GPIOA_13 = 15,
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GPIOA_14 = 16,
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GPIOA_15 = 17,
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GPIOA_16 = 18,
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GPIOA_17 = 19,
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GPIOB_0 = 20,
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GPIOB_1 = 21,
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GPIOB_2 = 22,
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GPIOB_3 = 23,
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GPIOB_4 = 24,
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GPIOB_5 = 25,
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GPIOB_6 = 26,
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GPIOB_7 = 27,
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GPIOB_8 = 28,
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GPIOB_9 = 29,
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GPIOB_10 = 30,
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GPIOB_11 = 31,
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GPIOB_12 = 32,
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GPIOB_13 = 33,
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GPIOB_14 = 34,
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GPIOB_15 = 35,
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GPIOB_16 = 36,
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GPIOB_17 = 37,
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GPIOC_0 = 38,
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GPIOC_1 = 39,
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GPIOC_2 = 40,
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GPIOC_3 = 41,
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GPIOC_4 = 42,
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GPIOC_5 = 43,
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GPIOC_6 = 44,
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GPIOC_7 = 45,
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GPIOC_8 = 46,
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GPIOC_9 = 47,
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GPIOC_10 = 48,
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GPIOC_11 = 49,
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GPIOC_12 = 50,
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GPIOC_13 = 51,
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GPIOC_14 = 52,
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GPIOC_15 = 53,
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GPIOC_16 = 54,
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GPIOC_17 = 55,
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GPIOD_0 = 56,
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GPIOD_1 = 57,
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GPIOD_2 = 58,
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GPIOD_3 = 59,
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GPIOD_4 = 60,
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GPIOD_5 = 61,
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GPIOD_6 = 62,
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GPIOD_7 = 63,
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GPIOD_8 = 64,
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GPIOD_9 = 65,
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GPIOD_10 = 66,
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GPIOD_11 = 67,
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GPIOD_12 = 68,
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GPIOD_13 = 69,
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GPIOD_14 = 70,
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GPIOD_15 = 71,
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GPIOD_16 = 72,
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GPIOD_17 = 73,
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GPIOE_0 = 74,
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GPIOE_1 = 75,
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GPIOE_2 = 76,
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GPIOE_3 = 77,
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GPIOE_4 = 78,
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GPIOE_5 = 79,
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GPIOE_6 = 80,
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GPIOE_7 = 81,
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GPIOE_8 = 82,
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GPIOE_9 = 83,
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GPIOE_10 = 84,
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GPIOE_11 = 85,
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GPIOE_12 = 86,
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GPIOE_13 = 87,
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GPIOE_14 = 88,
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GPIOE_15 = 89,
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GPIOE_16 = 90,
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GPIOE_17 = 91,
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// TLE6240 pins go right after on chips
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//#define TLE6240_PIN(n) ((brain_pin_e)((int)BRAIN_PIN_LAST_ONCHIP + 1 + (n)))
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TLE6240_PIN_1 = 130,
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TLE6240_PIN_2 = 131,
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TLE6240_PIN_3 = 132,
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TLE6240_PIN_4 = 133,
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TLE6240_PIN_5 = 134,
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TLE6240_PIN_6 = 135,
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TLE6240_PIN_7 = 136,
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TLE6240_PIN_8 = 137,
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TLE6240_PIN_9 = 138,
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TLE6240_PIN_10 = 139,
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TLE6240_PIN_11 = 140,
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TLE6240_PIN_12 = 141,
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TLE6240_PIN_13 = 142,
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TLE6240_PIN_14 = 143,
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TLE6240_PIN_15 = 144,
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TLE6240_PIN_16 = 145,
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} brain_pin_e;
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/* Plase keep updating this define */
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#define BRAIN_PIN_LAST_ONCHIP GPIOE_17
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/* diagnostic for brain pins
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* can be combination of few bits
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* defined as bit mask */
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typedef enum __attribute__ ((__packed__))
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{
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PIN_OK = 0,
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PIN_OPEN = 0x01,
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PIN_SHORT_TO_GND = 0x02,
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PIN_SHORT_TO_BAT = 0x04,
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PIN_OVERLOAD = 0x08,
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PIN_DRIVER_OVERTEMP = 0x10,
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PIN_INVALID = 0x80
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} brain_pin_diag_e;
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typedef enum __attribute__ ((__packed__)) {
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EFI_ADC_0 = 0,
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EFI_ADC_1 = 1,
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EFI_ADC_2 = 2,
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EFI_ADC_3 = 3,
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EFI_ADC_4 = 4,
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EFI_ADC_5 = 5,
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EFI_ADC_6 = 6,
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EFI_ADC_7 = 7,
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EFI_ADC_8 = 8,
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EFI_ADC_9 = 9,
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EFI_ADC_10 = 10,
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EFI_ADC_11 = 11,
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EFI_ADC_12 = 12,
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EFI_ADC_13 = 13,
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EFI_ADC_14 = 14,
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EFI_ADC_15 = 15,
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// todo: bad choice of value since now we have ADC_CHANNEL_SENSOR and could end up with 17 and 18 also
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EFI_ADC_NONE = 16,
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EFI_ADC_ERROR = 17,
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#if EFI_UNIT_TEST
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/**
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* these values are unfortunately visible to BoardReader
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* and TunerStudio would need these ordinals to fit into field size
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*/
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TEST_MAF_CHANNEL = 18,
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TEST_CLT_CHANNEL = 19,
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TEST_IAT_CHANNEL = 20,
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#endif /* EFI_UNIT_TEST */
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} adc_channel_e;
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#define INCOMPATIBLE_CONFIG_CHANGE EFI_ADC_0
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#endif /* RUSEFI_HW_ENUMS_H_ */
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