61 lines
2.0 KiB
C
61 lines
2.0 KiB
C
/**
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* @file microsecond_timer.c
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*
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* Here we have a 1MHz timer dedicated to event scheduling. We are using one of the 32-bit timers here,
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* so this timer can schedule events up to 4B/100M ~ 4000 seconds ~ 1 hour from current time.
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*
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* @date Apr 14, 2014
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* @author Andrey Belomutskiy, (c) 2012-2013
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*/
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#include "main.h"
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#include "signal_executor.h"
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#include "microsecond_timer.h"
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// https://my.st.com/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=https%3a%2f%2fmy.st.com%2fpublic%2fSTe2ecommunities%2fmcu%2fLists%2fcortex_mx_stm32%2fInterrupt%20on%20CEN%20bit%20setting%20in%20TIM7&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F0FFD06506F5B¤tviews=474
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#if EFI_PROD_CODE
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static TIM_TypeDef *TIM = TIM5;
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schfunc_t globalTimerCallback;
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/**
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* sets the alarm to the specified number of microseconds from now
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*/
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void setHardwareUsTimer(int timeUs) {
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TIM->ARR = timeUs - 1;
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TIM->EGR |= TIM_EGR_UG; // generate an update event to reload timer's counter value
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TIM->CR1 |= TIM_CR1_CEN; // restart timer
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}
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static void callback(void) {
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if (globalTimerCallback == NULL) {
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firmwareError("NULL globalTimerCallback");
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return;
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}
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globalTimerCallback(NULL);
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}
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// if you decide to move this to .cpp do not forget to make that a C method
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CH_IRQ_HANDLER(STM32_TIM5_HANDLER) {
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CH_IRQ_PROLOGUE();
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if (((TIM->SR & 0x0001) != 0) && ((TIM->DIER & 0x0001) != 0)) {
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callback();
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}
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TIM->SR = (int) ~STM32_TIM_SR_UIF; // Interrupt has been handled
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CH_IRQ_EPILOGUE();
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}
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void initMicrosecondTimer(void) {
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RCC ->APB1ENR |= RCC_APB1ENR_TIM5EN; // Enable TIM5 clock
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nvicEnableVector(TIM5_IRQn, CORTEX_PRIORITY_MASK(12));
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TIM->DIER |= TIM_DIER_UIE; // Enable interrupt on update event
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TIM->CR1 |= TIM_CR1_OPM; // one pulse mode: count down ARR and stop
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TIM->CR1 &= ~TIM_CR1_ARPE; /* ARR register is NOT buffered, allows to update timer's period on-fly. */
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TIM->PSC = 84 - 1; // 168MHz / 2 / 84 = 1MHz, each tick is a microsecond
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}
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#endif /* EFI_PROD_CODE */
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