123 lines
3.9 KiB
C
123 lines
3.9 KiB
C
/*
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ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#ifndef _MCUCONF_H_
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#define _MCUCONF_H_
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#include "clock_config.h"
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#define KE1xF_MCUCONF
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/*
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* HAL driver system settings.
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*/
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/* Select the MCU clocking mode below by enabling the appropriate block. */
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#define KINETIS_PLL_FREQ 168000000UL // 168MHz
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#define KINETIS_CLK 8000000U // 8MHz
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#define KINETIS_DEFAULT_CLK kinetis_clock_int_osc_hs /* kinetis_clock_ext_osc_hs */
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/* External OSC */
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#define KINETIS_EXT_PLL_MUL 26
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#define KINETIS_EXT_PLL_DIV 0
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/* Internal OSC */
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#define KINETIS_INT_PLL_MUL 26
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#define KINETIS_INT_PLL_DIV 5
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/* Used by drivers */
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#define KINETIS_PLLCLK_FREQUENCY KINETIS_PLL_FREQ
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#define KINETIS_SYSCLK_FREQUENCY KINETIS_PLL_FREQ
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#define KINETIS_SPLL_DIV1_FREQENCY 2625000U
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#define KINETIS_SPLL_DIV2_FREQENCY 21000000U
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#define KINETIS_CLKDIV1_OUTDIV4 7 // FLASHCLK=24000000
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#define KINETIS_CLKDIV1_OUTDIV2 8 // BUSCLK=21000000
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#define KINETIS_UART_FREQUENCY KINETIS_SPLL_DIV2_FREQENCY
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#define KINETIS_SPI_FREQUENCY KINETIS_SPLL_DIV2_FREQENCY
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#define KINETIS_FTM_FREQUENCY KINETIS_SPLL_DIV1_FREQENCY
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/*
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* GPIO driver system settings.
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*/
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#define KINETIS_HAS_GPIOA TRUE
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#define KINETIS_HAS_GPIOB TRUE
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#define KINETIS_HAS_GPIOC TRUE
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#define KINETIS_HAS_GPIOD TRUE
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#define KINETIS_HAS_GPIOE TRUE
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#define KINETIS_HAS_GPIOF FALSE
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#define KINETIS_HAS_GPIOG FALSE
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#define KINETIS_HAS_GPIOH FALSE
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#define KINETIS_GPIO_IRQ_PRIORITY 3
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/*
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* UART driver system settings.
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*/
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#define KINETIS_UART_USE_UART1 TRUE
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#define KINETIS_UART_USE_UART2 TRUE
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#define KINETIS_UART0_IRQ_PRIORITY 6
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#define KINETIS_UART1_IRQ_PRIORITY 6
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#define KINETIS_UART2_IRQ_PRIORITY 6
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#define KINETIS_UART_DMA_IRQ_PRIORITY 3
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/*
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* GPT/PIT driver system settings.
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*/
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#define KINETIS_GPT_USE_PIT0 TRUE
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#define KINETIS_GPT_PIT0_IRQ_PRIORITY 4
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/*
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* PWM/FTM driver system settings.
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*/
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#define KINETIS_PWM_USE_FTM0 TRUE
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#define KINETIS_PWM_USE_FTM1 TRUE
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//#define KINETIS_PWM_USE_FTM2 FALSE
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//#define KINETIS_PWM_USE_FTM3 FALSE
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#define KINETIS_PWM_FTM0_PRIORITY 7
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#define KINETIS_PWM_FTM1_PRIORITY 7
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#define KINETIS_PWM_FTM2_PRIORITY 7
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#define KINETIS_PWM_FTM3_PRIORITY 7
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/*
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* SPI driver system settings.
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*/
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#define KINETIS_SPI_USE_SPI0 TRUE
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#define KINETIS_SPI_SPI0_IRQ_PRIORITY 10
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#define KINETIS_SPI_SPI0_DMA_PRIORITY 1
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//#define KINETIS_SPI_USE_SPI1 TRUE
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//#define KINETIS_SPI_SPI1_IRQ_PRIORITY 10
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//#define KINETIS_SPI_SPI1_DMA_PRIORITY 1
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/*
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* ADC driver system settings.
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*/
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#define KINETIS_ADC_USE_ADC0 TRUE
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#define KINETIS_ADC_USE_ADC1 TRUE
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#define KINETIS_ADC_USE_ADC2 TRUE
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#define KINETIS_ADC_IRQ_PRIORITY 6
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/*
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* COMP driver system settings.
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*/
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#define KINETIS_COMP_USE_COMP0 TRUE
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#define KINETIS_COMP_USE_COMP1 TRUE
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#define KINETIS_COMP_USE_COMP2 TRUE
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#define KINETIS_COMP_IRQ_PRIORITY 2
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#endif /* _MCUCONF_H_ */
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